MAXIM MAX9750CETI

19-3006; Rev 0; 1/04
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
The MAX9750/MAX9751/MAX9755 combine a stereo,
2.6W audio power amplifier and stereo DirectDrive
110mW headphone amplifier in a single device. The
headphone amplifier uses Maxim’s patented DirectDrive
architecture that produces a ground-referenced output
from a single supply, eliminating the need for large DCblocking capacitors, saving cost, space, and component
height. A high 90dB PSRR and low 0.01% THD+N
ensures clean, low-distortion amplification of the audio
signal.
The MAX9750 features an analog volume control, and a
BEEP input. The MAX9751 features a 2:1 input multiplexer,
allowing multiple audio sources to be selected. All devices
feature a single-supply voltage, a shutdown mode, logicselectable gain, and a headphone sense input. Industryleading click-and-pop suppression eliminates audible
transients during power and shutdown cycles.
The MAX9750/MAX9751/MAX9755 are offered in spacesaving, thermally efficient 28-pin thin QFN (5mm x 5mm
x 0.8mm) and 28-pin TSSOP-EP packages. Both devices
have thermal-overload and output short-circuit protection, and are specified over the extended -40°C to +85°C
temperature range.
Applications
Notebook PCs
Flat-Panel TVs
Tablet PCs
PC Displays
Portable DVD
LCD Projectors
Features
♦ No DC-Blocking Capacitors Required—Provides
Industry’s Most Compact Notebook Audio
Solution
♦ PC2001 Compliant
♦ 5V Single-Supply Operation
♦ Class AB 2.6W Stereo BTL Speaker Amplifiers
♦ 110mW DirectDrive Headphone Amplifiers
♦ High 90dB PSRR
♦ Low-Power Shutdown Mode
♦ Industry-Leading Click-and-Pop Suppression
♦ Low 0.01% THD+N at 1kHz
♦ Short-Circuit and Thermal Protection
♦ Selectable Gain Settings
♦ Analog Volume Control (MAX9750)
♦ Beep Input with Glitch Filter (MAX9750)
♦ 2:1 Stereo Input MUX (MAX9751)
♦ ±8kV ESD-Protected Headphone Driver Outputs
♦ Available in Space-Saving, Thermally Efficient
Packages
28-Pin Thin QFN (5mm x 5mm x 0.8mm)
28-Pin TSSOP-EP
Ordering Information
Simplified Block Diagrams
PART
TEMP RANGE
MAX9750AETI*†
PINPACKAGE
MAXIMUM
GAIN (dB)
-40°C to +85°C 28 Thin QFN
13.5
MAX9750BETI*†
-40°C to +85°C 28 Thin QFN
19.5
-40°C to +85°C 28 TSSOP-EP**
19.5
MAX9750BEUI*
†
MAX9750CETI†
-40°C to +85°C 28 Thin QFN
MAX9750CEUI*† -40°C to +85°C 28 TSSOP-EP**
VOL
10.5
10.5
MAX9751ETI*†
-40°C to +85°C 28 Thin QFN
10.5
MAX9751EUI*†
-40°C to +85°C 28 TSSOP-EP**
10.5
-40°C to +85°C 28 Thin QFN
10.5
-40°C to +85°C 28 TSSOP-EP**
10.5
MAX9755AETI*†
MAX9755AEUI*
BEEP
13.5
MAX9750AEUI*† -40°C to +85°C 28 TSSOP-EP**
†
*Future product—contact factory for availability.
**EP = Exposed Paddle.
MAX9750
†Lead-free
package.
Simplifed Block Diagrams continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX9750/MAX9751/MAX9755
General Description
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VDD, PVDD, HPVDD, CPVDD to GND)..........+6V
GND to PGND.....................................................................±0.3V
CPVSS, C1N, VSS to GND .........................-6.0V to (GND + 0.3V)
HPOUT_ to GND ....................................................................±3V
Any Other Pin .............................................-0.3V to (VDD + 0.3V)
Duration of OUT_ Short Circuit to GND or PVDD ........Continuous
Duration of OUT_+ Short Circuit to OUT_- .................Continuous
Duration of HPOUT_ Short Circuit to GND,
VSS or HPVDD .........................................................Continuous
Continuous Current (PVDD, OUT_, PGND) ...........................1.7A
Continuous Current (CPVDD, C1N, C1P, CPVSS, VSS, HPVDD,
HPOUT_) .......................................................................850mA
Continuous Input Current (All Other Pins) ........................±20mA
Continuous Power Dissipation (TA = +70°C)
28-Pin Thin QFN (derate 20.8mW/°C above +70°C) ..1667mW
28-Pin TSSOP-EP (derate 23.8mW/°C above +70°C).1904mW
Junction Temperature ......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = PVDD = CPVDD = HPVDD = 5V, GND = PGND = CPGND = 0V, SHDN = VDD, CBIAS = 1µF, C1 = C2 = 1µF, speaker load terminated between OUT_+ and OUT_-, headphone load terminated between HPOUT_ and GND, MAX9750: GAIN1 = GAIN2 = VOL =
RL = 33kΩ = GND, MAX9751/MAX9755: GAIN = VDD = IN1/2 = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL
Supply Voltage Range
Headphone Supply Voltage
VDD, PVDD
Inferred from PSRR test
4.5
5.5
V
CPVDD,
HPVDD
Inferred from PSRR test
3
5.5
V
Quiescent Supply Current
IDD
Shutdown Supply Current
ISHDN
Bias Voltage
VBIAS
HPS = GND, speaker mode, RL = ∞
14
29
HPS = VDD, headphone mode, RL = ∞
7
13
0.2
5
1.8
1.9
SHDN = GND
1.7
Switching Time
tSW
Gain or input switching
Input Resistance
RIN
Amplifier inputs (Note 2)
Turn-On Time
10
10
tSON
20
mA
µA
V
µs
30
25
kΩ
ms
SPEAKER AMPLIFIER (HPS = GND)
Output Offset Voltage
Power-Supply Rejection Ratio
(Note 3)
2
VOS
PVDD or VDD = 4.5V to 5.5V (TA = +25°C)
PSRR
±0.4
Measured between OUT_+ - OUT_75
±6
mV
90
f = 1kHz, VRIPPLE = 200mVP-P
80
f = 10kHz, VRIPPLE = 200mVP-P
55
_______________________________________________________________________________________
dB
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
(VDD = PVDD = CPVDD = HPVDD = 5V, GND = PGND = CPGND = 0V, SHDN = VDD, CBIAS = 1µF, C1 = C2 = 1µF, speaker load terminated between OUT_+ and OUT_-, headphone load terminated between HPOUT_ and GND, MAX9750: GAIN1 = GAIN2 = VOL =
RL = 33kΩ = GND, MAX9751/MAX9755: GAIN = VDD = IN1/2 = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
RL = 8Ω
Output Power
POUT
THD+N = 1%,
f = 1kHz, TA =
+25°C
RL = 4Ω
MIN
MAX9750A/
MAX9750B/
MAX9751/
MAX9755
MAX9750C
RL = 3Ω
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
THD+N
SNR
MAX9750A/
MAX9750B/
MAX9751/
MAX9755
MAX9750C
MAX
UNITS
1.4
0.65
MAX9750A/
MAX9750B/
MAX9751/
MAX9755
MAX9750C
TYP
0.8
2.3
W
1.2
1.5
2.6
2.2
RL = 8Ω, POUT = 500mW, f = 1kHz
0.01
RL = 4Ω, POUT = 1W, f = 1kHz
0.02
%
RL = 8Ω, POUT = 1W, BW = 22Hz to 22kHz
90
dB
Noise
Vn
BW = 22Hz to 22kHz, A-weighted
80
µVRMS
Capacitive-Load Drive
CL
No sustained oscillations
200
pF
L to R, R to L, f = 10kHz
75
Any unselected input to any active input,
f = 10kHz (MAX9751)
60
Crosstalk
Slew Rate
SR
1.4
MAX9750A
Gain (Maximum Volume Setting)
AVMAX(SPKR) MAX9750B
MAX9750C
Gain (MAX9751/MAX9755)
AV
GAIN1 = 0, GAIN2 = 0
9
GAIN1 = 1, GAIN2 = 0
10.5
GAIN1 = 0, GAIN2 = 1
12
GAIN1 = 1, GAIN2 = 1
13.5
GAIN1 = 0, GAIN2 = 0
15
GAIN1 = 1, GAIN2 = 0
16.5
GAIN1 = 0, GAIN2 = 1
18
GAIN1 = 1, GAIN2 = 1
19.5
GAIN1 = 0, GAIN2 = 0
6
GAIN1 = 1, GAIN2 = 0
7.5
GAIN1 = 0, GAIN2 = 1
9
GAIN1 = 1, GAIN2 = 1
10.5
GAIN = 1
9
GAIN = 0
10.5
dB
V/µs
dB
dB
_______________________________________________________________________________________
3
MAX9750/MAX9751/MAX9755
ELECTRICAL CHARACTERISTICS (continued)
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = CPVDD = HPVDD = 5V, GND = PGND = CPGND = 0V, SHDN = VDD, CBIAS = 1µF, C1 = C2 = 1µF, speaker load terminated between OUT_+ and OUT_-, headphone load terminated between HPOUT_ and GND, MAX9750: GAIN1 = GAIN2 = VOL =
RL = 33kΩ = GND, MAX9751/MAX9755: GAIN = VDD = IN1/2 = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
±2
±7
mV
HEADPHONE AMPLIFIER (HPS = VDD)
Output Offset Voltage
Power-Supply Rejection Ratio
(Note 3)
VOS
TA = +25°C
HPVDD = 3V to 5.5V, TA = +25°C
PSRR
f = 1kHz, VRIPPLE = 200mVP-P
POUT
THD+N = 1%,
f = 1kHz,
TA = +25°C
70
Output Power
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
THD+N
SNR
dB
73
f = 10kHz, VRIPPLE = 200mVP-P
RL = 32Ω
75
63
40
RL = 16Ω
50
mW
110
RL = 32Ω, POUT = 20mW, f = 1kHz
0.007
RL = 16Ω, POUT = 75mW, f = 1kHz
0.03
RL = 32Ω, POUT = 50mW,
BW = 22Hz to 22kHz
%
95
dB
Noise
Vn
BW = 22Hz to 22kHz
12
µVRMS
Capacitive-Load Drive
CL
No sustained oscillations
200
pF
L to R, R to L, f = 10kHz
88
Any unselected input to any active input,
f = 10kHz (MAX9751)
88
Crosstalk
Slew Rate
ESD
Gain
SR
ESD
AV
IEC air discharge
dB
0.4
V/µs
±8
kV
GAIN2 = GAIN = 1, GAIN1 = X
0
GAIN2 = GAIN = 0, GAIN1 = X
3
dB
CHARGE PUMP
Charge-Pump Frequency
fOSC
500
550
600
kHz
VOLUME CONTROL (MAX9750_)
VOL Input Impedance
RVOL
VOL Input Hysteresis
Full Mute Input Voltage
(Note 4)
Channel Matching
AV = -25dB to +13.5dB
100
MΩ
10
mV
0.858 x
HPVDD
V
±0.2
dB
BEEP INPUT (MAX9750_)
Beep Signal Minimum Amplitude
VBEEP
0.8
VP-P
Beep Signal Minimum Frequency
fBEEP
200
Hz
4
_______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
(VDD = PVDD = CPVDD = HPVDD = 5V, GND = PGND = CPGND = 0V, SHDN = VDD, CBIAS = 1µF, C1 = C2 = 1µF, speaker load terminated between OUT_+ and OUT_-, headphone load terminated between HPOUT_ and GND, MAX9750: GAIN1 = GAIN2 = VOL =
RL = 33kΩ = GND, MAX9751/MAX9755: GAIN = VDD = IN1/2 = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC INPUT (SHDN, GAIN1, GAIN2, GAIN, VOL, IN1/2, HPS)
Logic Input High Voltage
VIH
Logic Input Low Voltage
VIL
0.8
V
Logic Input Current
IIN
±1
µA
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
2
V
All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design.
Guaranteed by design. Not production tested.
PSRR is specified with the amplifier input connected to GND through CIN.
See Table 3 for details of the mute levels.
The value of RB dictates the minimum beep signal amplitude (see the Beep Input section).
_______________________________________________________________________________________
5
MAX9750/MAX9751/MAX9755
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(Measurement BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
OUTPUT POWER = 1.25W
THD+N (%)
0.01
0.1
0.01
OUTPUT POWER = 500mW
0.0001
10k
100k
MAX9750/51 toc03
0.01
0.0001
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
0.01
MAX9750/51 toc05
1
fIN = 10kHz
0.1
10
0.01
fIN = 20Hz
fIN = 20Hz
fIN = 20Hz
1.0
1.5
2.0
2.5
3.0
0
0.5
OUTPUT POWER (W)
2.5
MAX9750/51 toc07
VCC = 5V
f = 1kHz
AV = 10.5dB
MAX9750C
2.0
THD+N = 10%
1.5
1.0
THD+N = 1%
5
POWER DISSIPATION (mW)
3.0
VDD = 5V
f = 1kHz
POUT = POUTL + POUTR
MAX9750C
4
0.2
0.4
0.6
0.8
OUTPUT POWER (W)
1.0
1.2
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SPEAKER MODE)
0
VRIPPLE = 200mVP-P
AV = 10.5dB
OUTPUT REFERRED
-10
-20
-30
RL = 4Ω
3
2
-40
-50
-60
-70
RL = 8Ω
1
0.5
0
2.0
1.0
1.5
OUTPUT POWER (W)
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
OUTPUT POWER
vs. LOAD RESISTANCE (SPEAKER MODE)
fIN = 1kHz
0.001
PSRR (dB)
0.5
fIN = 10kHz
0.1
fIN = 1kHz
0.001
0
1
0.01
fIN = 1kHz
0.001
VCC = 5V
RL = 8Ω
AV = 10.5dB
MAX9750C
MAX9750/51 toc09
fIN = 10kHz
0.1
100
THD+N (%)
1
VCC = 5V
RL = 4Ω
AV = 10.5dB
MAX9750C
10
THD+N (%)
10
100
MAX9750/51 toc04
VCC = 5V
RL = 3Ω
AV = 10.5dB
MAX9750C
MAX9750/51 toc06
FREQUENCY (Hz)
100
THD+N (%)
OUTPUT POWER = 100mW
0.1
0.001
0.0001
1k
1
OUTPUT POWER = 600mW
0.001
100
VCC = 5V
RL = 8Ω
AV = 10.5dB
OUTPUT POWER = 500mW
0.001
10
10
MAX9750/51 toc08
THD+N (%)
OUTPUT POWER = 1.5W
0.1
VCC = 5V
RL = 4Ω
AV = 10.5dB
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
THD+N (%)
VCC = 5V
RL = 3Ω
AV = 10.5dB
1
10
MAX9750/51 toc01
10
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
MAX9750/51 toc02
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
OUTPUT POWER (W)
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
-80
-90
0
0
1
10
LOAD RESISTANCE (Ω)
6
100
-100
0
0.5
1.0
1.5
2.0
2.5
OUTPUT POWER (W)
3.0
3.5
4.0
10
100
1k
FREQUENCY (Hz)
_______________________________________________________________________________________
10k
100k
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
TURN-ON RESPONSE
(SPEAKER MODE)
CROSSTALK vs. FREQUENCY
(SPEAKER MODE)
VCC = 5V
VRIPPLE = 200mVP-P
RL = 4Ω
-10
-20
CROSSTALK (dB)
MAX9750/51 toc10
MAX9750/51 toc11
0
-30
-40
-50
5V/div
SHDN
OUT_+
AND
OUT_-
-60
-70
-80
2V/div
LEFT TO RIGHT
-90
-100
-110
OUT_+
- OUT_-
RIGHT TO LEFT
100mV/div
RL = 8Ω
-120
10
100
1k
10k
100k
20ms/div
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
MAX9750/51 toc12
VDD = 5V
RL = 16Ω
AV = 3dB
5V/div
1
SHDN
10
MAX9750/51 toc13
10
VDD = 5V
RL = 32Ω
AV = 3dB
1
OUTPUT POWER = 45mW
OUT_+
- OUT_-
THD+N (%)
2V/div
THD+N (%)
OUTPUT POWER = 90mW
OUT_+
AND
OUT_-
0.1
0.01
MAX9750/51 toc14
TURN-OFF RESPONSE
(SPEAKER MODE)
OUTPUT POWER = 30mW
0.1
0.01
OUTPUT POWER = 10mW
20mV/div
0.001
0.001
RL = 8Ω
0.0001
0.0001
10
20ms/div
100
1k
10k
10
100k
100
OUTPUT POWER = 45mW
0.1
0.01
VDD = 3.3V
RL = 32Ω
AV = 3dB
1
THD+N (%)
THD+N (%)
OUTPUT POWER = 30mW
100k
MAX9750/51 toc16
1
10
MAX9750/51 toc15
VDD = 3.3V
RL = 16Ω
AV = 3dB
10k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
10
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
OUTPUT POWER = 10mW
0.1
0.01
OUTPUT POWER = 10mW
0.001
0.001
0.0001
0.0001
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
_______________________________________________________________________________________
7
MAX9750/MAX9751/MAX9755
Typical Operating Characteristics (continued)
(Measurement BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(Measurement BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
fIN = 10kHz
fIN = 1kHz
1
fIN = 10kHz
0.1
0.1
75
100
OUTPUT POWER (mW)
125
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
100
10
fIN = 1kHz
1
fIN = 20Hz
fIN = 10kHz
0.1
60
80
100
THD+N = 10%
120
100
80
60
225
20
40
30
50
60 70
OUTPUT POWER (mW)
80
125
100
RL = 32Ω
75
VDD = 5V
f = 1kHz
POUT = POUTL + POUTR
0
1000
100
0
25 50 75 100 125 150 175 200 225 250
OUTPUT POWER (mW)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (HEADPHONE MODE)
0
MAX9750/51 toc23
RL = 16Ω
100
VRIPPLE = 200mVP-P
AV = 10.5dB
OUTPUT REFERRED
-10
-20
-30
75
PSRR (dB)
OUTPUT POWER (mW)
150
LOAD RESISTANCE (Ω)
125
RL = 32Ω
50
-40
-50
-60
-70
25
-80
-90
f = 1kHz
0
-100
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE (V)
5.0
60
175
25
10
90
RL = 16Ω
200
50
THD+N = 1%
OUTPUT POWER vs. SUPPLY VOLTAGE
(HEADPHONE MODE)
8
250
0
10
50
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
20
0
40
30
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE)
40
0.001
20
OUTPUT POWER (mW)
140
0.01
10
0
OUTPUT POWER (mW)
160
OUTPUT POWER (mW)
VDD = 3.3V
RL = 32Ω
AV = 3dB
40
180
MAX9750/51 toc20
1000
0.001
20
0
150
MAX9750/51 toc24
50
MAX9750/51 toc21
25
fIN = 10kHz
0.01
0.001
0.001
0
fIN = 20Hz
0.1
fIN = 20Hz
0.01
fIN = 1kHz
fIN = 20Hz
fIN = 1kHz
1
POWER DISSIPATION (mW)
0.01
MAX9750/51 toc19
10
THD+N (%)
THD+N (%)
1
VDD = 3.3V
RL = 16Ω
AV = 3dB
100
10
10
THD+N (%)
VDD = 5V
RL = 32Ω
AV = 3dB
100
1000
MAX9750/51 toc18
VDD = 5V
RL = 16Ω
AV = 3dB
100
1000
MAX9750/51 toc17
1000
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
MAX9750/51 toc22
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
THD+N (%)
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
5.5
10
100
1k
10k
FREQUENCY (Hz)
_______________________________________________________________________________________
100k
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
-60
-80
RIGHT TO LEFT
140
120
C1 = C2 = 2.2µF
100
80
60
-120
-80
-100
-120
-140
0
100
-60
20
LEFT TO RIGHT
10
-40
C1 = C2 = 1µF
40
-100
VDD = 5V
f = 1kHz
VOUT = -60dB
RL = 32Ω
-20
MAGNITUDE (dB)
OUTPUT POWER (mW)
160
-40
1k
10k
100k
10
20
FREQUENCY (Hz)
30
0
50
40
5
10
20
TURN-OFF RESPONSE
(HEADPHONE MODE)
MAX9750/51 toc29
MAX9750/51 toc28
5V/div
5V/div
SHDN
SHDN
20mV/div
HPOUT_
20mV/div
HPOUT_
RL = 32Ω
RL = 32Ω
10ms/div
10ms/div
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
12
HPS = VDD
10
8
6
MAX9750/51 toc31
HPS = GND
14
0.35
0.30
SUPPLY CURRENT (µA)
MAX9750/51 toc30
18
16
15
FREQUENCY (Hz)
LOAD RESISTANCE (Ω)
TURN-ON RESPONSE
(HEADPHONE MODE)
SUPPLY CURRENT (mA)
CROSSTALK (dB)
VDD = 5V
f = 1kHz
THD+N = 1%
180
HEADPHONE OUTPUT SPECTRUM
0
MAX9750/51 toc26
VCC = 5V
VRIPPLE = 200mVP-P
RL = 32Ω
-20
200
MAX9750/51 toc25
0
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCE
MAX9750/51 toc27
CROSSTALK vs. FREQUENCY
(HEADPHONE MODE)
0.25
0.20
0.15
0.10
4
0.05
2
0
0
4.50
4.75
5.00
5.25
SUPPLY VOLTAGE (V)
5.50
4.50
4.75
5.00
5.25
5.50
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
9
MAX9750/MAX9751/MAX9755
Typical Operating Characteristics (continued)
(Measurement BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
Pin Description
PIN
MAX9750
THIN
QFN
TSSOP
MAX9751
THIN
QFN
TSSOP
MAX9755
THIN
QFN
NAME
FUNCTION
TSSOP
1
5
—
—
2
6
INL
Left-Channel Audio Input
2
6
—
—
—
—
BEEP
Audible Alert Beep Input
3, 19
7, 23
3, 19
7, 23
3, 19
7, 23
PGND
Power Ground
4
8
4
8
4
8
OUTL+
Left-Channel Positive Speaker Output
5
9
5
9
5
9
OUTL-
Left-Channel Negative Speaker Output
6, 16
10, 20
6, 16
10, 20
6, 16
10, 20
PVDD
Speaker Amplifier Power Supply
7
11
7
11
7
11
CPVDD
8
12
8
12
8
12
C1P
10
Charge-Pump Power Supply
Charge-Pump Flying-Capacitor Positive Terminal
9
13
9
13
9
13
CPGND
10
14
10
14
10
14
C1N
Charge-Pump Ground
11
15
11
15
11
15
CPVSS
12
16
12
16
12
16
VSS
13
17
13
17
13
17
HPOUTR
Right-Channel Headphone Output
14
18
14
18
14
18
HPOUTL
Left-Channel Headphone Output
Charge-Pump Flying-Capacitor Negative Terminal
Charge-Pump Output. Connect to VSS.
Headphone Amplifier Negative Power Supply
15
19
15
19
15
19
HPVDD
Headphone Positive Power Supply
17
21
17
21
17
21
OUTR-
Right-Channel Negative Speaker Output
18
22
18
22
18
22
OUTR+
20
24
20
24
20
24
HPS
Headphone Sense Input
Right-Channel Positive Speaker Output
21
25
21
25
21
25
BIAS
Common-Mode Bias Voltage. Bypass with a 1µF
capacitor to GND.
22
26
22
26
22
26
SHDN
Shutdown. Drive SHDN low to disable the device.
Connect SHDN to VDD for normal operation.
23
27
—
—
—
—
GAIN2
Gain Control Input 2
24
28
—
—
—
—
GAIN1
Gain Control Input 1
25
1
25
1
25
1
VDD
26
2
26
2
23, 26
2, 27
GND
Ground
27
3
—
—
28
4
INR
Right-Channel Audio Input
28
4
—
—
—
—
VOL
Analog Volume Control Input
—
—
1
5
—
—
INL1
Left-Channel Audio Input 1
—
—
2
6
—
—
INL2
Left-Channel Audio Input 2
—
—
23
27
—
—
IN1/2
Input Select
—
—
24
28
24
28
GAIN
Gain Select
—
—
27
3
—
—
INR1
Right-Channel Audio Input 1
—
—
28
4
—
—
INR2
Right-Channel Audio Input 2
—
—
—
—
1, 27
3, 5
N.C.
No Connection. Not internally connected.
Power Supply
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
VDD
VOUT
VDD/2
GND
OUT_+
BIAS
BIAS
CONVENTIONAL DRIVER-BIASING SCHEME
+VDD
VOL
VOLUME
CONTROL
OUT_
BIAS
GND
HPOUT_
-VDD
GND
DirectDrive BIASING SCHEME
Figure 1. MAX9750/MAX9751 Signal Path
Detailed Description
The MAX9750/MAX9751/MAX9755 combine a 2.6W BTL
speaker amplifier and a 110mW DirectDrive headphone
amplifier with integrated headphone sensing and comprehensive click-and-pop suppression. The MAX9750
features an analog volume control, BEEP input, and
four-level gain control. The MAX9751 features a 2:1
input stereo multiplexer and two-level gain control. All
devices feature high 90dB PSRR, low 0.01% THD+N,
industry-leading click-pop performance, and a lowpower shutdown mode.
Each signal path consists of an input amplifier that sets
the gain of the signal path and feeds both the speaker
and headphone amplifier (Figure 1). The speaker
amplifier uses a BTL architecture, doubling the voltage
drive to the speakers and eliminating the need for DCblocking capacitors. The output consists of two signals,
identical in magnitude, but 180° out of phase.
The headphone amplifiers use Maxim’s patented
DirectDrive architecture that eliminates the bulky output
DC-blocking capacitors required by traditional headphone amplifiers. A charge pump inverts the positive
supply (CPVDD), creating a negative supply (CPVSS).
The headphone amplifiers operate from these bipolar
supplies with their outputs biased about GND (Figure 2).
Figure 2. Traditional Headphone Amplifier Output Waveform
vs. DirectDrive Headphone Amplifier Output Waveform
The amplifiers have almost twice the supply range
compared to other single-supply amplifiers, nearly quadrupling the available output power. The benefit of the
GND bias is that the amplifier outputs no longer have a
DC component (typically VDD / 2). This eliminates the
large DC-blocking capacitors required with conventional headphone amplifiers, conserving board space and
system cost, and improving frequency response.
The MAX9750 features an analog volume control that
varies the gain of the amplifiers based on the DC voltage applied at VOL. Both devices feature an undervoltage lockout that prevents operation from an insufficient
power supply and click-and-pop suppression that eliminates audible transients on startup and shutdown. The
amplifiers include thermal-overload and short-circuit
protection, and can withstand ±8kV ESD strikes on the
headphone amplifier outputs (IEC air discharge). An
additional feature of the speaker amplifiers is that there
is no phase inversion from input to output.
DirectDrive
Conventional single-supply headphone amplifiers have
their outputs biased about a nominal DC voltage (typically half the supply) for maximum dynamic range.
Large coupling capacitors are needed to block this DC
bias from the headphones. Without these capacitors, a
______________________________________________________________________________________
11
MAX9750/MAX9751/MAX9755
MAX9750 ONLY
IN_
significant amount of DC current flows to the headphone,
resulting in unnecessary power dissipation and possible
damage to both headphone and headphone amplifier.
Maxim’s patented DirectDrive architecture uses a charge
pump to create an internal negative supply voltage. This
allows the MAX9750/MAX9751/MAX9755 headphone
amplifier output to be biased about GND, almost doubling the dynamic range while operating from a single
supply. With no DC component, there is no need for the
large DC-blocking capacitors. Instead of two large
capacitors (220µF typ), the MAX9750/MAX9751/
MAX9755 charge pump requires only two small ceramic
capacitors (1µF typ), conserving board space, reducing
cost, and improving the frequency response of the headphone amplifier. See the Output Power vs. Charge-Pump
Capacitance and Load Resistance graph in the Typical
Operating Characteristics for details of the possible
capacitor values.
Previous attempts to eliminate the output coupling
capacitors involved biasing the headphone return
(sleeve) to the DC bias voltage of the headphone
amplifiers. This method raised some issues:
1) The sleeve is typically grounded to the chassis. Using
this biasing approach, the sleeve must be isolated
from system ground, complicating product design.
2) During an ESD strike, the amplifier’s ESD structures
are the only path to system ground. The amplifier
must be able to withstand the full ESD strike.
3) When using the headphone jack as a lineout to other
equipment, the bias voltage on the sleeve may conflict with the ground potential from other equipment,
resulting in large ground-loop current and possible
damage to the amplifiers.
Low-Frequency Response
In addition to the cost and size disadvantages, the DCblocking capacitors limit the low-frequency response of
the amplifier and distort the audio signal:
1) The impedance of the headphone load to the DCblocking capacitor forms a highpass filter with the
-3dB point determined by:
f−3dB =
1
2πRLCOUT
where RL is the impedance of the headphone and
COUT is the value of the DC-blocking capacitor.
The highpass filter is required by conventional single-ended, single-supply headphone amplifiers to
block the midrail DC component of the audio signal
from the headphones. Depending on the -3dB point,
12
LOW-FREQUENCY ROLLOFF
(RL = 16Ω)
0
-3
DirectDrive
-6
ATTENUATION (dB)
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
-9
330µF
-12
220µF
-15
100µF
-18
33µF
-21
-24
-27
-30
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 3. Low-Frequency Attenuation of Common DC-Blocking
Capacitor Values
the filter can attenuate low-frequency signals within
the audio band. Larger values of COUT reduce the
attenuation but are physically larger, more expensive capacitors. Figure 3 shows the relationship
between the size of COUT and the resulting low-frequency attenuation. Note that the -3dB point for a
16Ω headphone with a 100µF blocking capacitor is
100Hz, well within the audio band.
2) The voltage coefficient of the capacitor, the change
in capacitance due to a change in the voltage
across the capacitor, distorts the audio signal. At
frequencies around the -3dB point, the reactance of
the capacitor dominates, and the voltage coefficient
appears as frequency-dependent distortion. Figure
4 shows the THD+N introduced by two different
capacitor dielectrics. Note that around the -3dB
point, THD+N increases dramatically.
The combination of low-frequency attenuation and frequency-dependent distortion compromises audio
reproduction. DirectDrive improves low-frequency
reproduction in portable audio equipment that emphasizes low-frequency effects such as multimedia laptops, and MP3, CD, and DVD players.
Charge Pump
The MAX9750/MAX9751/MAX9755 feature a low-noise
charge pump. The 550kHz switching frequency is well
beyond the audio range, and does not interfere with the
audio signals. The switch drivers feature a controlled
switching speed that minimizes noise generated by turnon and turn-off transients. Limiting the switching speed of
the charge pump minimizes the di/dt noise caused by the
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
VDD
MAX9750/
MAX9751/
MAX9755
10
THD+N (%)
1
10µA
SHUTDOWN
CONTROL
0.1
20
HPS
14
HPOUTL
TANTALUM
0.01
13
HPOUTR
1kΩ
0.001
1kΩ
ALUM/ELEC
0.0001
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 4. Distortion Contributed by DC-Blocking Capacitors
parasitic bond wire and trace inductance. Although not
typically required, additional high-frequency ripple attenuation can be achieved by increasing the size of C2 (see
the Typical Application Circuit).
Headphone Sense Input (HPS)
The headphone sense input (HPS) monitors the headphone jack and automatically configures the device
based upon the voltage applied at HPS. A voltage of
less than 0.8V sets the device to speaker mode. A voltage of greater than 2V disables the bridge amplifiers
and enables the headphone amplifiers.
For automatic headphone detection, connect HPS to the
control pin of a 3-wire headphone jack as shown in
Figure 5. With no headphone present, the output impedance of the headphone amplifier pulls HPS low. When a
headphone plug is inserted into the jack, the control pin
is disconnected from the tip contact and HPS is pulled
to VDD through a 10µA current source.
BIAS
The MAX9750/MAX9751/MAX9755 feature an internally
generated, power-supply independent, common-mode
bias voltage of 1.8V referenced to GND. BIAS provides
both click-and-pop suppression and sets the DC bias
level for the amplifiers. Choose the value of the bypass
capacitor as described in the BIAS Capacitor section.
No external load should be applied to BIAS. Any load
lowers the BIAS voltage, affecting the overall performance of the device.
Figure 5. HPS Configuration
Gain Selection
MAX9750
The MAX9750 features an internally set, selectable gain.
The GAIN1 and GAIN2 inputs set the maximum gain of
the MAX9750 speaker and headphone amplifiers (Table
1). The gain of the device can vary based upon the voltage at VOL (see the Analog Volume Control section).
However, the maximum gain cannot be exceeded.
MAX9751/MAX9755
The gain of the MAX9751/MAX9755 is set by the GAIN
input. Driving GAIN high sets the gain of the speaker
amplifiers to 9dB and the gain of the headphone amplifiers to 0dB. Driving GAIN low sets the gain of the
speaker amplifiers to 10.5dB, and the gain of the headphone amplifiers to 3dB (Table 2).
Analog Volume Control (VOL)
The MAX9750 features an analog volume control that
varies the gain of the device in 31 discrete steps based
upon the DC voltage applied to VOL. The input range of
VVOL is from 0 (full volume) to 0.858 x HPVDD (full mute),
with example step sizes shown in Table 3. Connect the
reference of the device driving VOL (Figure 6) to HPVDD.
Since the volume control ADC is ratiometric to HPVDD,
any changes in HPVDD are negated. The gain step sizes
are not constant; the step sizes are 0.5dB/step at the
upper extreme, 2dB/step in the midrange, and 4dB/step
at the lower extreme. Figure 7 shows the transfer function
of the volume control for a 3.3V supply.
______________________________________________________________________________________
13
MAX9750/MAX9751/MAX9755
ADDITIONAL THD+N DUE
TO DC-BLOCKING CAPACITORS
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
Table 1. MAX9750 Maximum Gain Settings
GAIN1
GAIN2
0
0
0
1
1
0
1
1
SPEAKER MODE GAIN (dB)
MAX9750A
HEADPHONE MODE GAIN (dB)
MAX9750B
MAX9750C
9
15
6
0
12
18
9
0
10.5
16.5
7.5
3
13.5
19.5
10.5
3
Table 2. MAX9751 Gain Settings
GAIN
SPEAKER MODE
GAIN (dB)
HEADPHONE
MODE GAIN (dB)
0
10.5
3
1
9
0
MAX9750
HPVDD
VREF
DAC
VOL
BEEP Input
The MAX9750 features an audible alert beep input
(BEEP) that accepts a mono system alert signal and
mixes it into the stereo audio path. When the amplitude
of VBEEP(OUT) exceeds 800mVP-P (Figure 8) and the
frequency of the beep signal is greater than 300Hz, the
beep signal is mixed into the active audio path (speaker
or headphone). If the signal at VBEEP(OUT) is either
<800mVP-P or <300Hz, the BEEP signal is not mixed into
the audio path. The amplitude of the BEEP signal at the
device output is roughly the amplitude of VBEEP(OUT)
times the gain of the selected signal path.
The input resistor (RB) sets the gain of the BEEP input
amplifier, and thus the amplitude of VBEEP(OUT). Choose
RB based on:
RB ≤
VIN × RINT
0.8
where RINT is the value of the BEEP amplifier feedback
resistor (47kΩ) and VIN is the BEEP input amplitude.
Note that the BEEP amplifier can be set up as either an
attenuator, if the original alert signal amplitude is too
large, or set to gain up the alert signal if it is below
800mVP-P. AC couple the alert signal to BEEP. Choose
the value of the coupling capacitor as described in the
Input Filtering section. Multiple beep inputs can be
summed (Figure 8).
14
Figure 6. Volume Control Circuit
Input Multiplexer
The MAX9751 features a 2:1 input multiplexer on each
amplifier, allowing input selection between two stereo
sources. The logic input IN1/2 controls both multiplexers. A logic high selects input IN_1 and a logic low
selects input IN_2.
Shutdown
The MAX9750/MAX9751/MAX9755 features a 0.2µA,
low-power shutdown mode that reduces quiescent current consumption and extends battery life. Driving
SHDN low disables the drive amplifiers, bias circuitry,
and charge pump, and drives BIAS and all outputs to
GND. Connect SHDN to VDD for normal operation.
Click-and-Pop Suppression
Speaker Amplifier
The MAX9750/MAX9751/MAX9755 speaker amplifiers
feature Maxim’s comprehensive, industry-leading clickand-pop suppression. During startup, the click-pop
suppression circuitry eliminates any audible transient
sources internal to the device. When entering shutdown, both amplifier outputs ramp to GND quickly and
simultaneously.
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
VVOL (V)
VMIN*
VMAX*
SPEAKER MODE GAIN (dB)
HPVDD*
GAIN1 = 0,
GAIN2 = 0
GAIN1 = 1,
GAIN2 = 0
HEADPHONE MODE GAIN (dB)
GAIN1 = 0,
GAIN2 = 1
GAIN1 = 1
GAIN2 = 1
GAIN1 = X,
GAIN2 = 0
GAIN1 = X,
GAIN2 = 1
0
0.49
0.074
9
10.5
12
13.5
0
3
0.49
0.5673
0.160
8
10
11.5
13
-1
2.5
0.5673
0.6447
0.183
7
9
11
12.5
-2
2
0.6447
0.722
0.207
6
8
10.5
12
-3
1.5
0.722
0.7994
0.230
4
7
10
11.5
-5
1
0.7994
0.8767
0.253
2
6
9
11
-7
0
0.8767
0.9541
0.277
0
4
8
10.5
-9
-
0.9541
1.0314
0.300
-2
2
7
10
-11
-2
1.0314
1.1088
0.324
-4
0
6
9
-13
-3
1.1088
1.1861
0.347
-6
-2
4
8
-15
-5
1.1861
1.2635
0.371
-8
-4
2
7
-17
-7
1.2635
1.3408
0.394
-10
-6
0
6
-19
-9
1.3408
1.4182
0.418
-12
-8
-2
4
-21
-11
1.4182
1.4955
0.441
-14
-10
-4
2
-23
-13
1.4955
1.5728
0.464
-16
-12
-6
0
-25
-15
1.5728
1.6502
0.488
-18
-14
-8
-2
-27
-17
1.6502
1.7275
0.511
-20
-16
-10
-4
-29
-19
1.7275
1.8049
0.535
-22
-18
-12
-6
-31
-21
1.8094
1.8822
0.558
-24
-20
-14
-8
-33
-23
1.8822
1.9596
0.582
-26
-22
-16
-10
-35
-25
1.9596
2.0369
0.605
-28
-24
-18
-12
-37
-27
2.0369
2.1143
0.628
-30
-26
-20
-14
-39
-29
2.1143
2.1916
0.652
-32
-28
-22
-16
-41
-31
2.1916
2.269
0.675
-34
-30
-24
-18
-3
-33
2.269
2.3463
0.699
-38
-32
-26
-20
-47
-35
2.3463
2.4237
0.722
-42
-34
-28
-22
-51
-37
2.4237
2.501
0.746
-46
-38
-30
-24
-55
-39
2.501
2.5783
0.769
-50
-42
-32
-26
-59
-41
2.5783
2.6557
0.793
-54
-46
-34
-28
-63
-43
2.6557
2.733
0.816
-58
-50
-38
-30
-67
-47
2.733
2.8104
0.839
-62
-54
-42
-32
-71
-51
2.8104
3.3
0.858
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
*Based on HPVDD = 3.3V
X = Don’t care.
______________________________________________________________________________________
15
MAX9750/MAX9751/MAX9755
Table 3a. MAX9750A Volume Levels
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
Table 3B. MAX9750B Volume Levels
VVOL (V)
VMIN*
VMAX*
HEADPHONE MODE GAIN
(dB)
SPEAKER MODE GAIN (dB)
HPVDD*
GAIN1 = 0,
GAIN2 = 0
GAIN1 = 1,
GAIN2 = 0
GAIN1 = 0,
GAIN2 = 1
GAIN1 = 1
GAIN2 = 1
GAIN1 = X,
GAIN2 = 0
GAIN1 = X,
GAIN2 = 1
0
0.49
0.074
15
16.5
18
19.5
0
3
0.49
0.5673
0.160
14
16
17.5
19
-1
2.5
0.5673
0.6447
0.183
13
15
17
18.5
-2
2
0.6447
0.722
0.207
12
14
16.5
18
-3
1.5
0.722
0.7994
0.230
10
13
16
17.5
-5
1
0.7994
0.8767
0.253
8
12
15
17
-7
0
0.8767
0.9541
0.277
6
10
14
16.5
-9
-1
0.9541
1.0314
0.300
4
8
13
16
-11
-2
1.0314
1.1088
0.324
2
6
12
15
-13
-3
1.1088
1.1861
0.347
0
4
10
14
-15
-5
1.1861
1.2635
0.371
-2
2
8
13
-17
-7
1.2635
1.3408
0.394
-4
0
6
12
-19
-9
1.3408
1.4182
0.418
-6
-2
4
10
-21
-11
1.4182
1.4955
0.441
-8
-4
2
8
-23
-13
1.4955
1.5728
0.464
-10
-6
0
6
-25
-15
1.5728
1.6502
0.488
-12
-8
-2
4
-27
-17
1.6502
1.7275
0.511
-14
-10
-4
2
-29
-19
1.7275
1.8049
0.535
-16
-12
-6
0
-31
-21
1.8049
1.8822
0.558
-18
-14
-8
-2
-33
-23
1.8822
1.9596
0.582
-20
-16
-10
-4
-35
-25
1.9596
2.0369
0.605
-22
-18
-12
-6
-37
-27
2.0369
2.1143
0.628
-24
-20
-14
-8
-39
-29
2.1143
2.1916
0.652
-26
-22
-16
-10
-41
-31
2.1916
2.269
0.675
-28
-24
-18
-12
-43
-33
2.269
2.3463
0.699
-32
-26
-20
-14
-47
-35
2.3463
2.4237
0.722
-36
-28
-22
-16
-51
-37
2.4237
2.501
0.746
-40
-32
-24
-18
-55
-39
2.501
2.5783
0.769
-44
-36
-26
-20
-59
-41
2.5783
2.6557
0.793
-48
-40
-28
-22
-63
-43
2.6557
2.733
0.816
-52
-44
-32
-24
-67
-47
2.733
2.8104
0.839
-56
-48
-36
-26
-71
-51
2.8104
3.3
0.858
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
*Based on HPVDD = 3.3V
X = Don’t care.
16
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
VVOL (V)
VMIN*
VMAX*
SPEAKER MODE GAIN (dB)
HPVDD*
GAIN1 = 0,
GAIN2 = 0
GAIN1 = 1,
GAIN2 = 0
HEADPHONE MODE GAIN (dB)
GAIN1 = 0,
GAIN2 = 1
GAIN1 = 1
GAIN2 = 1
GAIN1 = X,
GAIN2 = 0
GAIN1 = X,
GAIN2 = 1
0
0.49
0.074
6
7.5
9
10.5
0
3
0.49
0.5673
0.160
5
7
8.5
10
-1
2.5
0.5673
0.6447
0.183
4
6
8
9.5
-2
2
0.6447
0.722
0.207
3
5
7.5
9
-3
1.5
0.722
0.7994
0.230
1
4
7
8.5
-5
1
0.7994
0.8767
0.253
-1
3
6
8
-7
0
0.8767
0.9541
0.277
-3
1
5
7.5
-9
-1
0.9541
1.0314
0.300
-5
-1
4
7
-11
-2
1.0314
1.1088
0.324
-7
-3
3
6
-13
-3
1.1088
1.1861
0.347
-9
-5
1
5
-15
-5
1.1861
1.2635
0.371
-11
-7
-1
4
-17
-7
1.2635
1.3408
0.394
-13
-9
-3
3
-19
-9
1.3408
1.4182
0.418
-15
-11
-5
1
-21
-11
1.4182
1.4955
0.441
-17
-13
-7
-1
-23
-13
1.4955
1.5728
0.464
-19
-15
-9
-3
-25
-15
1.5728
1.6502
0.488
-21
-17
-11
-5
-27
-17
1.6502
1.7275
0.511
-23
-19
-13
-7
-29
-19
1.7275
1.8049
0.535
-25
-21
-15
-9
-31
-21
1.8049
1.8822
0.558
-27
-23
-17
-11
-33
-23
1.8822
1.9596
0.582
-29
-25
-9
-13
-35
-25
1.9596
2.0369
0.605
-31
-27
-21
-15
-37
-27
2.0369
2.1143
0.628
-33
-29
-23
-17
-39
-29
2.1143
2.1916
0.652
-35
-31
-2
-19
-41
-31
2.1916
2.269
0.675
-37
-3
-27
-21
-43
-33
2.269
2.3463
0.699
-41
-35
-29
-23
-47
-35
2.3463
2.4237
0.722
-45
-37
-31
-25
-51
-37
2.4237
2.501
0.746
-48
-41
-33
-27
-55
-39
2.501
2.5783
0.769
-53
-45
-35
-29
-59
-41
2.5783
2.6557
0.793
-57
-49
-37
-31
-63
-43
2.6557
2.733
0.816
-61
-53
-41
-33
-67
-47
2.733
2.8104
0.839
-65
-57
-45
-35
-71
-51
2.8104
3.3
0.858
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
*Based on HPVDD = 3.3V
X = Don’t care.
______________________________________________________________________________________
17
MAX9750/MAX9751/MAX9755
Table 3C. MAX9750C Volume Levels
MAX9750A
VOLUME CONTROL TRANSFER FUNCTION
MAX9750B
VOLUME CONTROL TRANSFER FUNCTION
20
20
GAIN1 = GAIN2 = 0
10
0
SPEAKER MODE
AUDIO
TAPER
-20
-30
-40
-50
SPEAKER MODE
-10
GAIN (dB)
GAIN (dB)
GAIN1 = GAIN2 = 0
10
0
-10
AUDIO
TAPER
-20
-30
-40
-50
HEADPHONE MODE
-60
-60
-70
-70
-80
HEADPHONE MODE
-80
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
0.5
1.0
1.5
VVOL (V)
GAIN1 = GAIN2 = 0
0
SPEAKER MODE
-20
AUDIO
TAPER
-30
-40
-50
HEADPHONE MODE
-60
-70
-80
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VVOL (V)
Figure 7c. Volume Control Transfer Function
0.47µF
3.0
RS1
47kΩ
RINT
47kΩ
SOURCE 1
0.47µF
RS2
47kΩ
0.47µF
RS3
47kΩ
SOURCE 2
BEEP
SOURCE 3
VOUT(BEEP)
SPEAKER/HEADPHONE
AMPLIFER INPUTS
WINDOW
DETECTOR
(0.3VP-P THRESHOLD)
BIAS
FREQUENCY
DETECTOR
(300Hz THRESHOLD)
MAX9750
Figure 8. Beep Input
18
3.5
4.0
Headphone Amplifier
In conventional single-supply headphone amplifiers,
the output-coupling capacitor is a major contributor of
audible clicks and pops. Upon startup, the amplifier
charges the coupling capacitor to its bias voltage, typically half the supply. Likewise, during shutdown, the
capacitor is discharged to GND. A DC shift across the
capacitor results, which in turn appears as an audible
transient at the speaker. Since the MAX9750/MAX9751/
MAX9755 do not require output-coupling capacitors, no
audible transient occurs.
Additionally, the MAX9750/MAX9751/MAX9755 features
extensive click-and-pop suppression that eliminates
any audible transient sources internal to the device.
The Power-Up/Down Waveform in the Typical
Operating Characteristics shows that there are minimal
spectral components in the audible range at the output
upon startup and shutdown.
20
-10
2.5
Figure 7b. Volume Control Transfer Function
MAX9750C
VOLUME CONTROL TRANSFER FUNCTION
10
2.0
VVOL (V)
Figure 7a. Volume Control Transfer Function
GAIN (dB)
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
VDD = 5V
RL = 16Ω
AV = 3dB
100
VOUT(P-P)
2 x VOUT(P-P)
10
THD+N (%)
+1
OUTPUTS IN PHASE
1
0.1
-1
VOUT(P-P)
0.01
OUTPUTS 180° OUT OF PHASE
0.001
0
25
50
75
100
125
150
OUTPUT POWER (mW)
Figure 9. Bridge-Tied Load Configuration
Applications Information
BTL Speaker Amplifiers
The MAX9750/MAX9751/MAX9755 feature speaker
amplifiers designed to drive a load differentially, a configuration referred to as bridge-tied load (BTL). The BTL
configuration (Figure 9) offers advantages over the single-ended configuration, where one side of the load is
connected to ground. Driving the load differentially
doubles the output voltage compared to a singleended amplifier under similar conditions. Thus, the
device’s differential gain is twice the closed-loop gain
of the input amplifier. The effective gain is given by:
A VD = 2 ×
RF
RIN
Substituting 2 X VOUT(P-P) into the following equation
yields four times the output power due to double the
output voltage:
VRMS =
VOUT(P−P)
2 2
2
V
POUT = RMS
RL
Since the differential outputs are biased at midsupply,
there is no net DC voltage across the load. This eliminates the need for DC-blocking capacitors required for
single-ended amplifiers. These capacitors can be large
and expensive, can consume board space, and can
degrade low-frequency performance.
Figure 10. Total Harmonic Distortion Plus Noise vs. Output Power
with Inputs In/Out of Phase (Headphone Mode)
Power Dissipation and Heat Sinking
Under normal operating conditions, the MAX9750/
MAX9751/MAX9755 can dissipate a significant amount
of power. The maximum power dissipation for each
package is given in the Absolute Maximum Ratings
under Continuous Power Dissipation, or can be calculated by the following equation:
PDISSPKG(MAX) =
TJ(MAX) − TA
θJA
where TJ(MAX) is +150°C, TA is the ambient temperature, and θJA is the reciprocal of the derating factor in
°C/W as specified in the Absolute Maximum Ratings
section. For example, θJA of the thin QFN package is
+42°C/W. For optimum power dissipation, the exposed
paddle of the package should be connected to the
ground plane (see the Layout and Grounding section).
Output Power (Speaker Amplifier)
The increase in power delivered by the BTL configuration directly results in an increase in internal power dissipation over the single-ended configuration. The
maximum power dissipation for a given VDD and load is
given by the following equation:
PDISS(MAX) =
2VDD2
π 2RL
If the power dissipation for a given application exceeds
the maximum allowed for a given package, either reduce
VDD, increase load impedance, decrease the ambient
temperature, or add heatsinking to the device. Large
output, supply, and ground PC board traces improve the
maximum power dissipation in the package.
______________________________________________________________________________________
19
MAX9750/MAX9751/MAX9755
1000
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
Table 4. Suggested Capacitor Manufacturers
PHONE
FAX
Taiyo Yuden
SUPPLIER
800-348-2496
847-925-0899
www.t-yuden.com
TDK
807-803-6100
847-390-4405
www.component.tdk.com
Thermal-overload protection limits total power dissipation in these devices. When the junction temperature
exceeds +160°C, the thermal-protection circuitry disables the amplifier output stage. The amplifiers are
enabled once the junction temperature cools by 15°C.
This results in a pulsing output under continuous thermal-overload conditions as the device heats and cools.
Output Power (Headphone Amplifier)
The headphone amplifiers have been specified for the
worst-case scenario—when both inputs are in phase.
Under this condition, the drivers simultaneously draw
current from the charge pump, leading to a slight loss in
headroom of VSS. In typical stereo audio applications,
the left and right signals have differences in both magnitude and phase, subsequently leading to an increase in
the maximum attainable output power. Figure 10 shows
the two extreme cases for in and out of phase. In reality,
the available power lies between these extremes.
Power Supplies
The MAX9750/MAX9751/MAX9755 have different supplies for each portion of the device, allowing for the optimum combination of headroom and power dissipation
and noise immunity. The speaker amplifiers are powered from PVDD. PVDD ranges from 4.5V to 5.5V. The
headphone amplifiers are powered from HPV DD and
VSS. HPVDD is the positive supply of the headphone
amplifiers and ranges from 3V to 5.5V. VSS is the negative supply of the headphone amplifiers. Connect VSS to
CPV SS . The charge pump is powered by CPV DD .
CPVDD ranges from 3V to 5.5V and should be the same
potential as HPVDD. The charge pump inverts the voltage at CPVDD, and the resulting voltage appears at
CPVSS. The remainder of the device is powered by VDD.
Component Selection
Input Filtering
The input capacitor (CIN), in conjunction with the amplifier input resistance (RIN), forms a highpass filter that
removes the DC bias from an incoming signal (see the
Typical Application Circuit). The AC-coupling capacitor
allows the amplifier to bias the signal to an optimum DC
level. Assuming zero source impedance, the -3dB point
of the highpass filter is given by:
20
WEBSITE
f−3DB =
1
2πRINCIN
RIN is the amplifier’s internal input resistance value
given in the Electrical Characteristics. Choose CIN such
that f-3dB is well below the lowest frequency of interest.
Setting f-3dB too high affects the amplifier’s low-frequency response. Use capacitors with low-voltage
coefficient dielectrics, such as tantalum or aluminum
electrolytic. Capacitors with high-voltage coefficients,
such as ceramics, may result in increased distortion at
low frequencies.
BIAS Capacitor
BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, CBIAS, improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker amplifiers. Bypass
BIAS with a 1µF capacitor to GND.
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mΩ for optimum performance. Low-ESR ceramic capacitors minimize the output resistance of the charge pump. For
best performance over the extended temperature
range, select capacitors with an X7R dielectric. Table 4
lists suggested manufacturers.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the load
regulation and output resistance of the charge pump. A
C1 value that is too small degrades the device’s ability
to provide sufficient current drive, which leads to a loss
of output voltage. Increasing the value of C1 improves
load regulation and reduces the charge-pump output
resistance to an extent. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance
graph in the Typical Operating Characteristics. Above
2.2µF, the on-resistance of the switches and the ESR of
C1 and C2 dominate.
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
OUTL+
1µF
OUTLINL
1µF
INR
MAX9750
22µF
OUTR+
OUTR-
20kΩ
20kΩ
Layout and Grounding
10kΩ
22nF
10kΩ
IN
10nF
MAX9711
OUTOUT+
Figure 11. Stereo Plus Subwoofer Application Circuit
Output Capacitor (C2)
The output capacitor value and ESR directly affect the
ripple at CPVSS. Increasing the value of C2 reduces
output ripple. Likewise, decreasing the ESR of C2
reduces both ripple and output resistance. Lower
capacitance values can be used in systems with low
maximum output power levels. See the Output Power
vs. Charge-Pump Capacitance and Load Resistance
graph in the Typical Operating Characteristics.
CPVDD Bypass Capacitor
The CPVDD bypass capacitor (C3) lowers the output
impedance of the power supply and reduces the
impact of the MAX9750/MAX9751/MAX9755’s chargepump switching transients. Bypass CPVDD with C3, the
same value as C1, and place it physically close to
CPVDD and PGND (refer to the MAX9750 Evaluation Kit
for a suggested layout).
Powering Other Circuits from a
Negative Supply
An additional benefit of the MAX9750/MAX9751/
MAX9755 is the internally generated negative supply
voltage (CPV SS ). CPV SS is used by the MAX9750/
Proper layout and grounding are essential for optimum
performance. Use large traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance, as well as route head away
from the device. Good grounding improves audio performance, minimizes crosstalk between channels, and
prevents any switching noise from coupling into the
audio signal. Connect CPGND, PGND and GND
together at a single point on the PC board. Route
CPGND and all traces that carry switching transients
away from GND, PGND, and the traces and components in the audio signal path.
Connect all components associated with the charge
pump (C2 and C3) to the CPGND plane. Connect VSS
and CPVSS together at the device. Place the chargepump capacitors (C1, C2, and C3) as close to the
device as possible. Bypass HPVDD and PVDD with a
0.1µF capacitor to GND. Place the bypass capacitors
as close to the device as possible.
Use large, low-resistance output traces. As load impedance decreases, the current drawn from the device outputs increase. At higher current, the resistance of the
output traces decrease the power delivered to the load.
For example, when compared to a 0Ω trace, a 100mΩ
trace reduces the power delivered to a 4Ω load from
2.1W to 2W. Large output, supply, and GND traces also
improve the power dissipation of the device.
The MAX9750/MAX9751/MAX9755 thin QFN and
TSSOP-EP packages feature exposed thermal pads on
their undersides. This pad lowers the package’s thermal resistance by providing a direct heat conduction
path from the die to the printed circuit board. Connect
the exposed thermal pad to GND by using a large pad
and multiple vias to the GND plane.
______________________________________________________________________________________
21
MAX9750/MAX9751/MAX9755
MAX9751/MAX9755 to provide the negative supply for
the headphone amplifiers. It can also be used to power
other devices within a design. Current draw from
CPVSS should be limited to 5mA, exceeding this affects
the operation of the headphone amplifier. A typical
application is a negative supply to adjust the contrast
of LCD modules.
When considering the use of CPVSS in this manner,
note that the charge-pump voltage of CPVSS is roughly
proportional to CPVDD and is not a regulated voltage.
The charge-pump output impedance plot appears in
the Typical Operating Characteristics.
22µF
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
MAX9750/MAX9751/MAX9755
Simplified Block Diagrams (continued)
MUX
MAX9751
22
MAX9755
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
4.5V TO 5.5V
0.1µF
VDD
25
(1)
6, 16
(10, 20) PVDD
MAX9750
CIN
1µF
LEFT-CHANNEL
AUDIO INPUT
CIN
1µF
RIGHT-CHANNEL
AUDIO INPUT
CBIAS
1µF
1
INL (5)
27
INR (3)
21
BIAS (25)
28
VOL (4)
VDD GAIN1
VDD GAIN2
0.47µF
47kΩ
BEEP
VDD SHDN
3V TO 5.5V
1µF
24
(28)
23
(27)
2
(6)
22
(26)
7
CPVDD (11)
8
C1P (12)
C1
10
1µF
(14)
C1N
9
CPGND (13)
GAIN/
VOLUME
CONTROL
GAIN/
VOLUME
CONTROL
BTL
AMPLIFIER
4
(8) OUTL+
5
(9) OUTL-
BTL
AMPLIFIER
18
(22) OUTR+
17
(21) OUTR-
15
(19) HPVDD
GAIN/
VOLUME
CONTROL
20
(24) HPS
HEADPHONE
DETECTION
4.5V TO 5.5V
0.1µF
3V TO 5.5V
0.1µF
14
(18) HPOUTL
BEEP
DETECTION
13
(17) HPOUTR
SHUTDOWN
CONTROL
CHARGE
PUMP
26
(2)
11 12
(15) (16)
CPVSS
VSS
C2
1µF
3, 19
(7, 23)
GND
PGND
( ) TSSOP PIN.
______________________________________________________________________________________
23
MAX9750/MAX9751/MAX9755
Block Diagrams
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
MAX9750/MAX9751/MAX9755
Block Diagrams (continued)
4.5V TO 5.5V
0.1µF
VDD
25
(1)
6, 16 (10, 20)
PVDD
MAX9751
CIN
LEFT CHANNEL 1µF
AUDIO INPUT CIN
LEFT CHANNEL 1µF
AUDIO INPUT
CIN
RIGHT CHANNEL 1µF
AUDIO INPUT C
IN
RIGHT CHANNEL 1µF
AUDIO INPUT
1
INL1 (5)
2
INL2 (6)
VDD
VDD
3V TO 5.5V
1µF
BTL
AMPLIFIER
BTL
AMPLIFIER
18
(22) OUTR+
17
(21) OUTR-
27
INR1 (3)
28
INR2 (4)
INPUT
MUX
21
BIAS (25)
CBIAS
1µF
VDD
INPUT
MUX
4
(8) OUTL+
5
(9) OUTL-
24
GAIN (28)
23
IN1/2 (27)
22
SHDN (26)
15
(19) HPVDD
20
(24) HPS
MUX AND
GAIN
CONTROL
3V TO 5.5V
0.1µF
14
(18) HPOUTL
HEADPHONE
DETECTION
SHUTDOWN
CONTROL
13
(17) HPOUTR
7
CPVDD (11)
8
C1P (12)
C1
10
1µF
(14)
C1N
9
CPGND (13)
4.5V TO 5.5V
0.1µF
CHARGE
PUMP
26
(2)
11 12
(15) (16)
CVSS
VSS
C2
1µF
3, 19
(7, 23)
GND
PGND
( ) TSSOP PIN.
LOGIC PINS CONFIGURED FOR:
GAIN = 1, 9dB SPEAKER GAIN/0dB HEADPHONE GAIN.
IN1/2 = 1, SELECTED INPUT LINE 1.
SHDN = 1, PART ACTIVE.
24
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
4.5V TO 5.5V
0.1µF
VDD
25
(1)
6, 16
(10, 20) PVDD
MAX9755
CIN
LEFT CHANNEL 1µF
AUDIO INPUT
2
INL (6)
CIN
RIGHT CHANNEL 1µF
AUDIO INPUT
28
INR (4)
BTL
AMPLIFIER
4
(8) OUTL+
5
(9) OUTL-
BTL
AMPLIFIER
18
(22) OUTR+
17
(21) OUTR-
21
BIAS (25)
CBIAS
1µF
VDD
VDD
3V TO 5.5V
1µF
24
GAIN (28)
22
SHDN (26)
15
(19) HPVDD
20
(24) HPS
GAIN
CONTROL
3V TO 5.5V
0.1µF
14
(18) HPOUTL
HEADPHONE
DETECTION
SHUTDOWN
CONTROL
13
(17) HPOUTR
7
CPVDD (11)
8
C1P (12)
C1
10
1µF
(14)
C1N
9
CPGND (13)
4.5V TO 5.5V
0.1µF
CHARGE
PUMP
23, 26
(2, 27)
11 12
(15) (16)
CPVSS
VSS
C2
1µF
GND
3, 19
(7, 23)
PGND
( ) TSSOP PIN.
LOGIC PINS CONFIGURED FOR:
GAIN = 1, 9dB SPEAKER GAIN/0dB HEADPHONE GAIN.
SHDN = 1, PART ACTIVE.
______________________________________________________________________________________
25
MAX9750/MAX9751/MAX9755
Block Diagrams (continued)
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
MAX9750/MAX9751/MAX9755
System Diagrams
4.5V TO 5.5V
3V TO 5.5V
0.1µF
0.1µF
VDD
PVDD
HPVDD
BIAS
OUTL+
1µF
OUTL-
MAX9750
1µF
1µF
AUX_IN
OUTR+
INL
1µF
OUT
OUTR-
CODEC
INR
1µF
2kΩ
HPS
33kΩ
MAX4060
BEEP
BIAS
HPOUTL
HPOUTR
2kΩ
SHDN
1µF
1µF
IN+
IN-
µC
HPVDD
GAIN1
3V TO 5.5V
1µF
GAIN2
VOL
CPVDD
CPVSS
VSS
C1P
1µF
CPGND
C1N
GND
26
PGND
______________________________________________________________________________________
1µF
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
4.5V TO 5.5V
3V TO 5.5V
0.1µF
0.1µF
VDD
PVDD
HPVDD
1µF
OUTL+
INL1
OUTL-
CODEC
INL2
MAX9751
1µF
AUX_IN
OUTR+
1µF
INR1
OUT
OUTR-
INR2
2kΩ
HPS
MAX4060
BIAS
HPOUTL
HPOUTR
SHDN
µC
2kΩ
1µF
1µF
IN1/2
GAIN
IN+
3V TO 5.5V
IN-
CPVSS
CPVDD
1µF
VSS
C1P
1µF
1µF
CPGND
C1N
BIAS
GND
PGND
1µF
Chip Information
MAX9750 TRANSISTOR COUNT: 9591
MAX9751 TRANSISTOR COUNT: 8632
MAX9755 TRANSISTOR COUNT: 7834
PROCESS: BiCMOS
______________________________________________________________________________________
27
MAX9750/MAX9751/MAX9755
System Diagrams (continued)
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
MAX9750/MAX9751/MAX9755
Pin Configurations
TOP VIEW
VDD 1
28 GAIN1
VDD 1
28 GAIN1
VDD 1
28 GAIN1
GND 2
27 GAIN2
GND 2
27 IN1/2
GND 2
27 GND
INR 3
26 SHDN
INR1 3
26 SHDN
N.C. 3
26 SHDN
VOL 4
25 BIAS
INR2 4
25 BIAS
INR 4
25 BIAS
INL 5
24 HPS
INL1 5
24 HPS
N.C. 5
23 PGND
INL2 6
PGND 7
22 OUTR+
PGND 7
22 OUTR+
PGND 7
22 OUTR+
OUTL+ 8
21 OUTR-
OUTL+ 8
21 OUTR-
OUTL+ 8
21 OUTR-
OUTL- 9
20 PVDD
OUTL- 9
20 PVDD
OUTL- 9
20 PVDD
MAX9750
BEEP 6
MAX9751
24 HPS
MAX9755
INL 6
23 PGND
23 PGND
PVDD 10
19 HPVDD
PVDD 10
19 HPVDD
PVDD 10
19 HPVDD
CPVDD 11
18 HPOUTL
CPVDD 11
18 HPOUTL
CPVDD 11
18 HPOUTL
C1P 12
17 HPOUTR
C1P 12
17 HPOUTR
C1P 12
17 HPOUTR
CPGND 13
CPGND 13
16 VSS
C1N 14
C1N 14
15 CPVSS
16 VSS
C1N 14
15 CPVSS
15 CPVSS
TSSOP-EP
VDD
GAIN
IN1/2
SHDN
23
22
SHDN
22
24
GAIN2
23
25
GAIN1
24
GND
VDD
25
26
GND
26
INR1
INR
27
INR2
VOL
28
27
INL1
1
21
BIAS
INL2
2
20
HPS
PGND
3
19
PGND
18
OUTR+
INL
1
21
BIAS
BEEP
2
20
HPS
PGND
3
19
PGND
18
OUTR+
OUTL+
4
MAX9750
28
TSSOP-EP
TSSOP-EP
TOP VIEW
CPGND 13
16 VSS
MAX9751
INR
N.C.
GND
VDD
GAIN
GND
SHDN
28
27
26
25
24
23
22
THIN QFN
10
11
12
13
14
C1N
CPVSS
VSS
HPOUTR
HPOUTL
HPVDD
9
15
CPGND
7
8
CPVDD
C1P
HPVDD
14
15
13
7
HPOUTL
CPVDD
HPOUTR
PVDD
12
OUTR-
16
VSS
17
6
11
5
PVDD
CPVSS
OUTL-
PVDD
9
OUTR-
16
10
17
6
C1N
5
PVDD
CPGND
OUTL-
8
4
C1P
OUTL+
THIN QFN
N.C.
1
21
BIAS
INL
2
20
HPS
PGND
3
19
PGND
MAX9755
13
14
HPOUTL
HPVDD
12
15
VSS
7
HPOUTR
CPVDD
11
PVDD
10
16
C1N
6
CPVSS
OUTR-
PVDD
9
OUTR+
17
CPGND
18
5
8
4
OUTL-
C1P
OUTL+
THIN QFN
28
______________________________________________________________________________________
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
b
CL
D/2
PIN # 1
I.D.
QFN THIN.EPS
D2
0.15 C A
D
0.10 M C A B
D2/2
k
0.15 C B
PIN # 1 I.D.
0.35x45∞
E/2
E2/2
CL
(NE-1) X e
E
E2
k
L
DETAIL A
e
(ND-1) X e
CL
CL
L
L
e
e
0.10 C
A
C
0.08 C
A1 A3
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL
COMMON DIMENSIONS
DOCUMENT CONTROL NO.
REV.
21-0140
C
1
2
EXPOSED PAD VARIATIONS
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL
DOCUMENT CONTROL NO.
REV.
21-0140
C
2
2
______________________________________________________________________________________
29
MAX9750/MAX9751/MAX9755
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
TSSOP 4.4mm BODY.EPS
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
PACKAGE OUTLINE, TSSOP, 4.40 MM BODY
EXPOSED PAD
21-0108
C
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.