MAXIM MAX9729

19-0857; Rev 0; 7/07
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
The MAX9729 stereo DirectDrive™ headphone amplifier features bass boost, volume control, an input mux,
and an I2C/SMBus™-compatible serial interface. This
makes the MAX9729 ideal for portable audio applications where space is at a premium and performance is
essential. The MAX9729 operates from a single 1.8V to
3.6V, and uses Maxim’s patented† DirectDrive architecture, eliminating the need for large DC-blocking capacitors. The headphone amplifiers deliver 52mW into a
32Ω load, feature low 0.03% THD+N, and high 90dB
PSRR. Maxim’s industry-leading click-and-pop suppression circuitry reduces audible transients during
power and shutdown cycles.
The BassMax feature boosts the bass response of the
amplifier, improving audio reproduction for low-end
headphones. The integrated volume control features 32
discrete volume levels along with a ramping function to
ensure smooth transitions during shutdown cycles and
input selection. The MAX9729’s eight programmable
maximum gain settings allow for a wide range of input
signal levels. A 3:1 multiplexer/mixer allows the selection
and summation of multiple stereo input signal sources.
The MAX9729 also includes a dedicated BEEP input
with independent attenuation control. BassMax, volume
control, gain settings, and input selection are controlled
using the I2C/SMBus-compatible serial interface. A lowpower, 5µA shutdown mode is controlled through an
external logic input or the serial interface.
The MAX9729 consumes only 4.8mA of supply current,
provides short-circuit and thermal-overload protection,
and is specified over the -40°C to +85°C extended temperature range. The MAX9729 is available in a spacesaving 28-pin thin QFN package (5mm x 5mm x 0.8mm).
Pin Configuration appears at end of data sheet.
Features
♦ DirectDrive Headphone Amplifier Eliminates
Bulky DC-Blocking Capacitors
♦ 3:1 Input Multiplexer with Digital-Fade Circuitry
♦ Software-Enabled Bass Boost
♦ 32-Step Integrated Volume Control
♦ Beep Input with Programmable Output Level
♦ Low Quiescent Current
♦ Industry-Leading Click-and-Pop Suppression
♦ I2C-Compatible 2-Wire Interface
♦ Short-Circuit Protection
♦ 1.8V to 3.6V Single-Supply Operation
♦ Available in Space-Saving, Thermally Efficient
28-Pin TQFN-EP (5mm x 5mm x 0.8mm)
Applications
Portable CD/DVD/MD
Players
Automotive Rear Seat
Entertainment (RSE)
Cell Phones
Flat-Panel TVs
MP3/PMP Players
Ordering Information
PART
MAX9729ETI+
PINPACKAGE
28 TQFN-EP**
SLAVE
ADDRESS*
PKG
CODE
101000_
T2855-5
Note: This device is specified over the -40°C to +85°C operating
temperature range.
+Denotes lead-free package.
*Last digit of slave address is pin programmable.
**EP = Exposed pad.
SMBus is a trademark of Intel Corp.
†U.S. Patent # 7,061,327
Simplified Block Diagram
1.8V TO 3.6V
BML
BassMax
SCL
SDA
I2C INTERFACE
MAX9729
INL1
INL2
INL3
MIXER
INR1
MUX
INR2
FADER
CONTROL
INR3
BEEP
PGA
Σ
OUTL
Σ
OUTR
VOLUME
CONTROL
PGA
BMR
BassMax
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX9729
General Description
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
ABSOLUTE MAXIMUM RATINGS
VDD, PVDD to PGND or SGND .................................-0.3V to +4V
VDD to PVDD ................................................Internally Connected
PVSS to SVSS .......................................................................±0.3V
SGND to PGND...................................................................±0.3V
C1P to PGND..............................................-0.3V to (VDD + 0.3V)
C1N to PGND............................................(PVSS - 0.3V) to +0.3V
PVSS, SVSS to PGND ................................................+0.3V to -4V
INL_, INR_, BEEP to SGND............(SVSS - 0.3V) to (VDD + 0.3V)
SDA, SCL, BEEP_EN to PGND.................................-0.3V to +4V
SHDN to PGND ..........................................-0.3V to (VDD + 0.3V)
OUT_ to PGND ............................................................-3V to +3V
BM_ to SGND ..............................................................-2V to +2V
Duration of OUT_ Short Circuit to PGND....................Continuous
Continuous Current Into/Out of:
VDD, C1P, C1N, PGND, PVSS, SVSS, or OUT_ .............±0.85A
All other pins.................................................................±20mA
Continuous Power Dissipation (TA = +70°C, multilayer board)
28-Pin Thin QFN (derate 28.6mW/°C above +70°C) 0.2286mW
Junction-to-Ambient Thermal Resistance (θJA)
28-Pin TQFN.................................................................35°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
OUT_ ESD Protection (Human Body Model) .......................±8kV
ESD Protection of All Other Pins ..........................................±2kV
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (3V Supply)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N
measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL
Supply Voltage Range
Charge-Pump and Logic Supply
Voltage
VDD
(Note 2)
1.8
3.6
V
PVDD
(Note 2)
1.8
3.6
V
5.5
8
mA
5
10
µA
Quiescent Supply Current
IDD
Shutdown Supply Current
IDD_SHDN
Turn-On Time
Beep Enable Time
tON
No load, BEEP_EN = VDD (Note 3)
VSHDN = 0V
From shutdown mode to full operation
200
µs
µs
tON_BEEP
12
Thermal Shutdown Threshold
TTHRES
146
°C
Thermal Shutdown Hysteresis
THYST
13
°C
HEADPHONE AMPLIFIER
Input Resistance
Output Offset Voltage
BMR, BML Input Bias Current
2
RIN
VOSHP
IBIAS_BM
Applicable to all maximum gain and
volume settings
Measured between OUT_ and SGND,
overall gain = -10dB (Note 3)
14
25
35
kΩ
±0.7
±3.5
mV
±10
±100
nA
_______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N
measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
VDD = 1.8V to 3.6V, overall
gain = 6dB
Power-Supply Rejection Ratio
Output Power
PSRR
POUT
Total Harmonic Distortion Plus
Noise
Maximum Gain
THD+N
AVMAX
Beep Input Attenuation
Signal-to-Noise Ratio
Slew Rate
AV_BEEP
SNR
(Note 3)
72
95
90
f = 1kHz, 100mVP-P ripple,
overall gain = 26dB
82
f = 20kHz, 100mVP-P
ripple, overall gain = 26dB
58
THD+N = 1%,
fIN = 1kHz, overall
gain = 1.8dB,
TA = +25°C (Note 4)
fIN = 1kHz, overall
gain = 3.5dB
(Note 4)
12
49
RL = 32Ω
21
52
UNITS
mW
RL = 16Ω,
POUT = 42mW
0.04
RL = 32Ω,
POUT = 40mW
0.04
%
Register 0x01, B[2:0] = 000
3.5
Register 0x01, B[2:0] = 001
6
Register 0x01, B[2:0] = 010
8
Register 0x01, B[2:0] = 011
10
Register 0x01, B[2:0] = 100
19.5
Register 0x01, B[2:0] = 101
22
Register 0x01, B[2:0] = 110
24
Register 0x01, B[2:0] = 111
26
Register 0x01, B[7:5] = 000
10
Register 0x01, B[7:5] = 001
20
Register 0x01, B[7:5] = 010
30
Register 0x01, B[7:5] = 011
40
Register 0x01, B[7:5] = 100
50
Register 0x01, B[7:5] = 101
52
Register 0x01, B[7:5] = 110
54
Register 0x01, B[7:5] = 111
56
RL = 32Ω,
VOUT = 1VRMS
MAX
dB
RL = 16Ω
BW = 22Hz to 22kHz
99
BW = 22Hz to 22kHz
and A-weighted
101
No sustained oscillations
Output Resistance in Shutdown
TYP
f = 217Hz, 100mVP-P
ripple, overall gain = 26dB
SR
Capacitive Drive
MIN
VSHDN = 0V, measured from OUT_ to
ROUT_SHDN
SGND
dB
dB
dB
0.5
V/µs
200
pF
20
kΩ
_______________________________________________________________________________________
3
MAX9729
ELECTRICAL CHARACTERISTICS (3V Supply) (continued)
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
ELECTRICAL CHARACTERISTICS (3V Supply) (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N
measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Click-and-Pop Level
Charge-Pump Switching Frequency
SYMBOL
KCP
CONDITIONS
Peak voltage, Aweighted, 32 samples
per second
(Notes 3 and 5)
MIN
Into shutdown
MAX
UNITS
81
dBV
Out of shutdown
fCP
80
505
L to R, or R to L, f = 10kHz, VOUT =
1VRMS, RL = 32Ω, both channels loaded
Crosstalk
TYP
600
730
78
kHz
dB
DIGITAL INPUTS (SHDN, SDA, SCL, BEEP_EN)
Input High Voltage
VIH
Input Low Voltage
VIL
1.4
Input Leakage Current
V
-1
0.4
V
+1
µA
DIGITAL OUTPUTS (SDA)
Output Low Voltage
VOL
IOL = 3mA
Output High Current
IOH
VSDA = VDD
0.4
V
1
µA
ELECTRICAL CHARACTERISTICS (2.4V Supply)
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N
measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
Quiescent Current
IDD
Shutdown Current
ISHDN
VSHDN = 0V
POUT
THD+N = 1%,
fIN = 1kHz, overall
gain = 3.5dB,
TA = +25°C
(Note 4)
Output Power
Total Harmonic Distortion Plus
Noise
Power-Supply Rejection Ratio
4
THD+N
PSRR
No load (Note 3)
fIN = 1kHz, overall
gain = 3.5dB
(Note 4)
100mVP-P ripple
(Note 3)
RL = 16Ω
MIN
TYP
MAX
UNITS
4.5
mA
4
µA
32
mW
RL = 32Ω
32
RL = 16Ω,
POUT = 23mW
0.03
RL = 32Ω,
POUT = 23mW
0.03
%
f = 217Hz
90
f = 1kHz
85
f = 10kHz
61
_______________________________________________________________________________________
dB
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N
measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Signal-to-Noise Ratio
Click-and-Pop Level
CONDITIONS
RL = 32Ω,
VOUT = 1VRMS,
overall gain =
3.5dB
SNR
Peak voltage,
A-weighted,
32 samples per
second
(Notes 3 and 5)
KCP
MIN
BW = 22Hz to 22kHz
TYP
MAX
UNITS
98
dB
BW = 22Hz to 22kHz
and A-weighted
101
Into shutdown
79
dBV
Out of shutdown
79
TIMING CHARACTERISTICS
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, BM_ = 0V, maximum gain setting = 6dB, volume setting = -16dB
(overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1 and 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
400
kHz
Serial Clock Frequency
fSCL
0
Bus Free Time Between a STOP and a
START Condition
tBUF
1.3
µs
tHD:STA
0.6
µs
Low Period of the SCL Clock
tLOW
1.3
µs
High Period of the SCL Clock
tHIGH
0.6
µs
Setup Time for a Repeated START
Condition
tSU:STA
0.6
µs
Data Hold Time
tHD:DAT
0
Data Setup Time
tSU:DAT
100
Hold Time Repeated for a START
Condition
0.9
ns
Rise Time of Both SDA and SCL Signals
tr
300
Fall Time of Both SDA and SCL Signals
tf
300
Setup Time for STOP Condition
Pulse Width of Suppressed Spike
Capacitive Load for Each Bus Line
tSU:STO
tSP
CL_BUS
µs
0.6
ns
ns
µs
50
ns
400
pF
All specifications are 100% tested at TA = +25°C. Temperature limits are guaranteed by design.
VDD and PVDD must be connected together.
Inputs AC-coupled to SGND.
Both channels loaded and driven in phase.
Headphone testing performed with a 32Ω resistive load connected to PGND. Mode transitions are controlled by SHDN. KCP
level is calculated as 20log[(peak voltage during mode transition, no input signal)/1VRMS]. Units are expressed in dBV.
Note 6: Guaranteed by design.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
_______________________________________________________________________________________
5
MAX9729
ELECTRICAL CHARACTERISTICS (2.4V Supply) (continued)
Typical Operating Characteristics
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, CIN = 1µF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load
connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven
in phase. TA = +25°C, unless otherwise noted.)
VDD = 3V
RL = 16Ω
VDD = 3V
RL = 32Ω
10
1
fIN = 5kHz
1
fIN = 5kHz
fIN = 1kHz
fIN = 100Hz
0.01
20
30
40
50
60
70
80
0
50
60
70
5
10 15 20 25 30 35 40 45 50
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
VDD = 3V
RL = 16Ω
POUT = 42mW
fIN = 100Hz
5
POUT = 40mW
THD+N (%)
0.01
POUT = 9mW
10
10 15 20 25 30 35 40 45 50
POUT = 5mW
0.001
0.001
0.01
VDD = 3V
RL = 32Ω
0.1
THD+N (%)
0.01
fIN = 1kHz
1
MAX9729 toc05
1
MAX9729 toc06
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
fIN = 5kHz
100
1k
10k
10
100k
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
POWER DISSIPATION
vs. OUTPUT POWER
POUT = 23mW
VDD = 2.4V
RL = 32Ω
POUT = 23mW
THD+N (%)
0.1
0.01
POUT = 8mW
350
POUT = 3mW
VDD = 3V
fIN = 1kHz
POUT = POUTL + POUTR
300
POWER DISSIPATION (mW)
MAX9729 toc07
1
100k
MAX9729 toc09
OUTPUT POWER PER CHANNEL (mW)
VDD = 2.4V
RL = 16Ω
0.01
0
80
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
1
0.1
40
OUTPUT POWER PER CHANNEL (mW)
0.1
1
30
OUTPUT POWER PER CHANNEL (mW)
10
0
20
OUTPUT POWER PER CHANNEL (mW)
VDD = 2.4V
RL = 32Ω
0.1
10
fIN = 100Hz
0.01
MAX9729 toc08
100
10
MAX9729 toc04
0
fIN = 5kHz
0.1
fIN = 100Hz
0.01
1
fIN = 1kHz
fIN = 1kHz
0.1
0.1
THD+N (%)
THD+N (%)
THD+N (%)
VDD = 2.4V
RL = 16Ω
10
10
THD+N (%)
100
MAX9729 toc02
100
MAX9729 toc01
100
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
MAX9729 toc03
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
THD+N (%)
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
250
RL = 16Ω
200
150
RL = 32Ω
100
50
10
100
1k
FREQUENCY (Hz)
6
0
0.001
0.001
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
0
20
40
60
80 100 120 140 160 180
OUTPUT POWER (mW)
_______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, CIN = 1µF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load
connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven
in phase. TA = +25°C, unless otherwise noted.)
150
RL = 16Ω
100
RL = 32Ω
50
0
20
40
60
80
100
60
50
THD+N = 10%
40
30
20
10
THD+N = 1%
35
30
20
15
10
100
10
1000
1000
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
0
MAX9729 toc14
100
fIN = 1kHz
RL = 32Ω
-20
-40
80
PSRR (dB)
THD+N = 10%
60
20
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
-20
-40
R TO L
-60
-80
L TO R
-100
HPL
100k
10k
GAIN = 19.5dB
VOUT = 1VP-P
RL = 32Ω
-20
-40
-60
L TO R
-80
-100
R TO L
-120
-120
-120
FREQUENCY (Hz)
1k
CROSSTALK vs. FREQUENCY
0
CROSSTALK (dB)
CROSSTALK (dB)
-80
GAIN = 3.5dB
VOUT = 1VP-P
RL = 32Ω
100
FREQUENCY (Hz)
MAX9729 toc17
0
MAX9729 toc16
HPR
1k
10
CROSSTALK vs. FREQUENCY
-40
100
HPL
-120
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
-100
HPR
-100
THD+N = 1%
0
-60
-60
-80
40
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
VDD = 2.4V
SUPPLY RIPPLE 100mVP-P
RL = 32Ω
VDD = 3V
SUPPLY RIPPLE 100mVP-P
RL = 32Ω
MAX9729 toc18
THD+N = 1%
OUTPUT POWER PER CHANNEL (mW)
20
120
MAX9729 toc15
OUTPUT POWER
vs. SUPPLY VOLTAGE
40
10
100
OUTPUT POWER
vs. SUPPLY VOLTAGE
60
-20
THD+N = 1%
5
LOAD RESISTANCE (Ω)
THD+N = 10%
0
THD+N = 10%
25
LOAD RESISTANCE (Ω)
0
PSRR (dB)
40
OUTPUT POWER (mW)
fIN = 1kHz
RL = 16Ω
80
VDD = 2.4V
fIN = 1kHz
45
0
10
120
MAX9729 toc13
OUTPUT POWER PER CHANNEL (mW)
100
70
50
0
0
120
VDD = 3V
fIN = 1kHz
80
OUTPUT POWER PER CHANNEL (mW)
200
90
MAX9729 toc11
MAX9729 toc10
VDD = 2.4V
fIN = 1kHz
POUT = POUTL + POUTR
OUTPUT POWER PER CHANNEL (mW)
POWER DISSIPATION (mW)
250
OUTPUT POWER
vs. LOAD RESISTANCE
OUTPUT POWER
vs. LOAD RESISTANCE
MAX9729 toc12
POWER DISSIPATION
vs. OUTPUT POWER
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
_______________________________________________________________________________________
7
MAX9729
Typical Operating Characteristics (continued)
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, CIN = 1µF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load
connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven
in phase. TA = +25°C, unless otherwise noted.)
-40
-50
L TO R
-60
L TO R
-80
-100
R TO L
-5
1k
100k
10k
1k
10k
100k
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCE
50
C1 = C2 = 0.68μF
30
20
-120
VDD = 3V
fIN = 1kHz
THD+N = 1%
10
6
8
10 12 14 16 18 20
25
15
10
10
20
30
40
50
0
60
20
30
50
60
MAX9729 toc27
MAX9729 toc26
VDD
2V/div
VSHDN
2V/div
VSHDN
2V/div
VOUT_
10mV/div
VOUT_
2V/div
VOUT_
2V/div
40μs/div
40
ENTERING SHUTDOWN
EXITING SHUTDOWN
MAX9729 toc25
100ms/div
10
LOAD RESISTANCE (Ω)
LOAD RESISTANCE (Ω)
POWER-UP/POWER-DOWN
WAVEFORM
C1 = C2 = 0.68μF
20
0
0
FREQUENCY (kHz)
30
5
0
-160
VDD = 2.4V
fIN = 1kHz
THD+N = 1%
C1 = C2 = 1μF
35
OUTPUT POWER (mW)
OUTPUT POWER (mW)
-100
C1 = C2 = 1μF
40
40
MAX9729 toc23
60
MAX9729 toc24
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCE
-140
8
10k
OUTPUT SPECTRUM
-80
4
1k
FREQUENCY (Hz)
-60
2
100
FREQUENCY (Hz)
-40
0
10
100k
FREQUENCY (Hz)
VDD = 3V
fIN = 1kHz
RL = 32Ω
-20
100
10
MAX9729 toc22
0
100
DISABLED
-10
-120
10
R2 = 10kΩ
C6 = 0.22μF
5
0
-100
R TO L
-90
R2 = 22kΩ
C6 = 0.1μF
10
-60
NO LOAD
R1 = 47kΩ
R2 = 36kΩ
C4 = 0.068μF
15
-40
-70
-80
20
MAX9729 toc21
-20
CROSSTALK (dB)
CROSSTALK (dB)
-30
GAIN = 19.5dB
VOUT = 1VP-P
RL = 16Ω
GAIN (dB)
GAIN = 3.5dB
VOUT = 1VP-P
RL = 16Ω
-20
0
MAX9729 toc19
0
-10
BASS BOOST FREQUENCY
RESPONSE
CROSSTALK vs. FREQUENCY
MAX9729 toc20
CROSSTALK vs. FREQUENCY
OUTPUT MAGNITUDE (dBV)
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
40μs/div
_______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1µF, CIN = 1µF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load
connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven
in phase. TA = +25°C, unless otherwise noted.)
NO LOAD
INPUTS AC-GROUNDED
100mV/div
5
6
SUPPLY CURRENT (μA)
SUPPLY CURRENT (mA)
200mV/div
7
MAX9729 toc29
6
4
3
MAX9729 toc30
MAX9729 toc28
200mV/div
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
FADER OPERATION
5
4
3
2
1
0
2
20ms/div
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Pin Description
PIN
NAME
FUNCTION
1
INR2
Right-Channel Input 2
2
INR3
Right-Channel Input 3
3
SGND
4, 8, 15,
22
N.C.
No Connection. Not internally connected.
5
ADD
Slave Address Selection Input. Connect ADD to VDD to set the device slave address to 1010001 or to
PGND to set the device slave address to 1010000.
6
PVSS
Charge-Pump Output. Connect to SVSS.
7
SDA
Serial Data Input. Connect a pullup resistor greater than 500Ω from SDA to PVDD.
Signal Ground. Connect SGND to PGND at a single point on the PCB near the device.
9
C1N
10
PGND
Charge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P and C1N.
11
C1P
12
SCL
Serial Clock Input. Connect a pullup resistor greater than 500Ω from SCL to PVDD.
13
PVDD
Charge-Pump and Logic Power-Supply Input. Bypass PVDD to PGND with a 1µF capacitor and connect
to VDD. PVDD and VDD are internally connected and should each have a 1µF bypass capacitor located
as close to the device as possible.
14
SVSS
Headphone Amplifier Negative Power-Supply Input. Connect to PVSS and bypass with a 1µF capacitor
to PGND.
Power Ground. Connect PGND to SGND at a single point on the PCB near the device.
Charge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P and C1N.
_______________________________________________________________________________________
9
MAX9729
Typical Operating Characteristics (continued)
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
MAX9729
Pin Description (continued)
PIN
NAME
FUNCTION
16
BMR
Right BassMax Input. Connect an external passive network between OUTR and BMR to apply bass
boost to the right-channel output. See the BassMax Gain-Setting Components section. Connect BMR to
SGND if BassMax is not used.
17
OUTR
Right Headphone Output
18
OUTL
Left Headphone Output
19
BML
Left BassMax Input. Connect an external passive network between OUTL and BML to apply bass boost
to the left-channel output. See the BassMax Gain-Setting Components section. Connect BML to SGND,
if BassMax is not used.
20
BEEP_EN
Beep Enable Input. Connect BEEP_EN to PVDD to enable the beep amplifier or to PGND to disable the
beep amplifier.
21
SHDN
Active-Low Shutdown Input. Drive SHDN low to disable the MAX9729. Connect SHDN to VDD while B7
in command register 0x00 is equal to 1 for normal operation (see Command Registers section).
23
VDD
Power-Supply Input. Bypass VDD to PGND with a 1µF capacitor and connect to PVDD. VDD and PVDD
are internally connected and should each have a 1µF bypass capacitor located as to close to the
device as possible.
24
BEEP
Beep Input
25
INL1
Left-Channel Input 1
26
INL2
Left-Channel Input 2
27
INL3
Left-Channel Input 3
28
INR1
EP
EP
Right-Channel Input 1
Exposed Paddle. Connect EP to SVSS or leave unconnected.
Detailed Description
The MAX9729 stereo headphone amplifier features
Maxim’s patented DirectDrive architecture, eliminating
the large output-coupling capacitors required by conventional single-supply headphone amplifiers. The
MAX9729 consists of two 52mW Class AB headphone
amplifiers, 3:1 stereo input multiplexer/mixer, two
adjustable gain preamplifiers, a dedicated beep amplifier with independent gain control, hardware/software
shutdown control, inverting charge pump, integrated
32-level volume control, BassMax circuitry, comprehensive click-and-pop suppression circuitry, and an
I2C/SMBus-compatible interface (see the Functional
Diagram/Typical Operating Circuit). A negative power
supply (PVSS) is created internally by inverting the positive supply (PVDD). Powering the amplifiers from VDD
and PVSS increases the dynamic range of the amplifiers
to almost twice that of other single-supply amplifiers,
increasing the total available output power.
An I2C/SMBus-compatible interface allows serial communication between the MAX9729 and a microcon-
10
troller. The MAX9729’s slave address is programmed to
one of two different values using the ADD input allowing
two MAX9729 ICs to share the same bus (see Table 1).
The internal command registers control the shutdown
mode of the MAX9729, select/mix input signal sources,
enable the BassMax circuitry, headphone and beep
amplifier gains, and set the volume level (see Table 2).
The MAX9729’s BassMax circuitry improves audio
reproduction by boosting the bass response of the
amplifier, compensating for any low-frequency attenuation introduced by the headphone. External components set the MAX9729’s overall gain allowing for
custom gain settings (see the BassMax Gain-Setting
Components section).
DirectDrive
Traditional single-supply headphone amplifiers have
their outputs biased about a nominal DC voltage, typically half the supply, for maximum dynamic range.
Large coupling capacitors are needed to block this DC
bias from the headphone. Without these capacitors, a
significant amount of DC current flows to the head-
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
MAX9729
phone, resulting in unnecessary power dissipation and
possible damage to both headphone and headphone
amplifier. In addition to the cost and size disadvantages, the DC-blocking capacitors required by conventional headphone amplifiers limit low-frequency
response and can distort the audio signal.
Maxim’s patented DirectDrive architecture uses a
charge pump to create an internal negative supply voltage. This allows the MAX9729 headphone amplifier
outputs to be biased about ground, almost doubling
the dynamic range while operating from a single supply
(see Figure 1). With no DC component, there is no
need for the large DC-blocking capacitors. Instead of
two large (up to 220µF) tantalum capacitors, the
MAX9729 charge pump requires only two small 1µF
ceramic capacitors, conserving board space, reducing
cost, and improving the frequency response of the
headphone amplifier. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance
graph in the Typical Operating Characteristics for
details of the possible capacitor sizes.
VOUT
VDD
VDD / 2
VDD
GND
CONVENTIONAL DRIVER BIASING SCHEME
VOUT
+VDD
GND
2VDD
Charge Pump
The MAX9729 features a low-noise charge pump. The
610kHz switching frequency is well beyond the audio
range, and does not interfere with the audio signals.
This enables the MAX9729 to achieve an SNR of 99dB.
The switch drivers feature a controlled switching speed
that minimizes noise generated by turn-on and turn-off
transients. Limiting the switching speed of the charge
pump also minimizes di/dt noise caused by the parasitic bond wire and trace inductances.
Click-and-Pop Suppression
In conventional single-supply headphone amplifiers,
the output-coupling capacitor is a major contributor of
audible clicks and pops. The amplifier charges the
coupling capacitor to its output bias voltage at startup.
During shutdown, the capacitor is discharged. The
charging and discharging results in a DC shift across
the capacitor, which appears as an audible transient at
the headphone speaker. Since the MAX9729 headphone amplifier does not require output-coupling
capacitors, no audible transients occur.
Additionally, the MAX9729 features extensive click-andpop suppression that eliminates any audible transient
sources internal to the device. The Power-Up/PowerDown Waveform in the Typical Operating Characteristics
shows that there are minimal transients at the output
upon startup or shutdown.
In most applications, the preamplifier driving the
MAX9729 has a DC bias of typically half the supply.
The input-coupling capacitor is charged to the pream-
-VDD
DirectDrive BIASING SCHEME
Figure 1. Traditional Amplifier Output vs. MAX9729 DirectDrive
Output
plifier’s bias voltage through the MAX9729’s input resistor (RIN) during startup. The resulting shift across the
capacitor creates a voltage transient that must settle
before the 50ms turn-on time has elapsed. Delay the
rise of SHDN by at least 4 time constants (4 x RIN x
CIN) relative to the start of the preamplifier to avoid
clicks/pops caused by the input filter.
Shutdown
The MAX9729 features a 5µA, low-power shutdown
mode that reduces quiescent current consumption and
extends battery life. Shutdown is controlled by the
SHDN logic input or software interface. Driving the
SHDN input low disables the drive amplifiers, bias circuitry, charge pump, and sets the headphone amplifier
output resistance to 20kΩ. Similarly, the MAX9729
enters shutdown when bit seven (B7) in the command
register, 0x00, is set to 0 (see the Command Registers
section). SHDN and B7 must be high to enable the
MAX9729. The I2C/SMBus interface is active and the
______________________________________________________________________________________
11
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
contents of the command register are not affected
when in shutdown. This allows the master device to
write to the MAX9729 while in shutdown.
When a shutdown is activated, either hardware (SHDN
pin) or software (I2C register), the volume is smoothly
reduced, according to a constant slope ramp. Similarly,
when a shutdown is deactivated, either hardware or
software, the volume is smoothly increased, according
to a constant slope ramp, until the volume programmed
in the register file is reached.
BassMax (Bass Boost)
Typical headphones do not have a flat-frequency
response. The small physical size of the diaphragm
does not allow the headphone speaker to efficiently
reproduce low frequencies. This physical limitation
results in attenuated bass response. The MAX9729
includes a bass boost feature that compensates for the
headphone’s poor bass response by increasing the
amplifier gain at low frequencies.
The DirectDrive output of the MAX9729 has more headroom than typical single-supply headphone amplifiers.
This additional headroom allows boosting the bass frequencies without the output signal clipping.
Program the BassMax gain and cutoff frequency with
external components connected between OUT_ and
BM_ (see the BassMax Gain-Setting Components section and the Functional Diagram/Typical Operating
Circuit). Use the I2C-compatible interface to program the
command register to enable/disable the BassMax circuit.
BM_ is connected to the noninverting input of the output amplifier when BassMax is enabled. BM_ is pulled
to SGND when BassMax is disabled. The typical application of the BassMax circuit involves feeding a lowpass-filtered version of the output signal back to the
R
FROM
VOLUME
ATTENUATOR
STAGE
R
OUT_
TO HEADPHONE
SPEAKER
R1
BM_
MAX9729
BassMax
ENABLE
R2
C6
amplifier. This is realized using positive feedback from
OUT_ to BM_. Figure 2 shows the connections needed
to implement BassMax.
Maximum Gain Control
The MAX9729 features eight different programmable
maximum gain settings ranging from +3.5dB to +26dB
(see Table 8). Bits [2:0] in command register 0x01 control the maximum gain setting (AV_MAX).
Volume Control
The MAX9729 includes a 32-level volume control that
adjusts the total voltage gain of the headphone amplifier according to the values of bits [4:0] in the 0x00 command register. With BassMax disabled, the total
voltage gain of the MAX9729 is equal to:
A V _ TOTAL = A V _ MAX − ATTEN (dB)
where AV_TOTAL is the total voltage gain in dB, AV_MAX
is the maximum gain setting in dB, and ATTEN is the
volume attenuation in dB.
Tables 5a, 5b, 5c show all the possible volume attenuation settings and the resulting AV_TOTAL with BassMax
disabled. Figure 8 shows the volume control transfer
function. Mute attenuation is typically better than 100dB
when driving a 32Ω load. To perform smooth-sounding
volume changes, step through all intermediate volume
settings at a rate of approximately 2ms per step when a
volume change occurs.
Automatic Volume Ramping During Mode
Transitions and Input Source Selection
The MAX9729 implements an automatic volume rampup/ramp-down function when exiting/entering shutdown
and when selecting different input signal paths with the
internal 3:1 multiplexer. The automatic volume rampup/ramp-down function steps through each intermediate volume setting at a rate of 1.5ms per step allowing
for smooth sounding volume transitions. When
exiting/entering shutdown, the volume ramp-up/rampdown function is implemented regardless of whether
the shutdown command is initiated by an I2C command
or the SHDN input. When exiting shutdown, the volume
is ramped up to the value stored in register 0x00 (see
Table 2). When selecting a new input signal path with
the multiplexer, the MAX9729 first ramps down the volume, selects the new input source, and then ramps the
volume back up to the value stored in register 0x00.
This prevents any audible clicks and pops due to
abrupt changes in signal amplitude when selecting a
different input signal source.
Figure 2. BassMax External Connections
12
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Input Multiplexer/Mixer
The MAX9729 includes a stereo 3:1 multiplexer/mixer,
allowing selection and mixing of three different stereo
input sources. Bits [6:5] in register 0x00 control the
selection/mixing of the input signal sources (see Tables
2 and 4). When all three stereo inputs are selected (Bits
[6:5] = 11), the stereo signals are summed (mixed)
together and connected to the signal path. The
MAX9729 implements the automatic volume ramping
function when an input source change occurs to ensure
smooth sounding transitions. Clipping may occur if
three high level signals are summed. Reprogram the
preamplifier maximum gain setting to compensate.
Serial Interface
The MAX9729 features an I2C/SMBus-compatible 2-wire
serial interface consisting of a serial data line (SDA) and
a serial clock line (SCL). SDA and SCL facilitate bidirectional communication between the MAX9729 and the
master at clock rates up to 400kHz. Figure 3 shows the
2-wire interface timing diagram. The MAX9729 is a
transmit/receive slave-only device, relying upon a master device to generate the clock signal. The master
device, typically a microcontroller, initiates data transfer
on the bus and generates SCL to permit that transfer.
A master device communicates to the MAX9729 by
transmitting the slave address with the Read/Write
(R/W) bit followed by the data word. Each transmit
sequence is framed by a START (S) or REPEATED
START (Sr) condition and a STOP (P) condition. Each
word transmitted over the bus is 8 bits long and is
always followed by an acknowledge or not acknowledge clock pulse.
The MAX9729 SDA line operates as both an input and
an open-drain output. A pullup resistor, greater than
500Ω, is required on the SDA bus. The MAX9729 SCL
line operates as an input only. A pullup resistor, greater
than 500Ω, is required on SCL unless the MAX9729 is
operating in a single-master system where the master
device has a push-pull SCL output. Series resistors in
line with SDA and SCL are optional. Series resistors
protect the digital inputs of the MAX9729 from highvoltage spikes on the bus lines, and minimize crosstalk
and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse since changes in SDA while SCL is
high are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
SDA
tBUF
tSU, STA
tSU, DAT
tHD, STA
tHD, DAT
tLOW
tSP
tSU, STO
SCL
tHIGH
tHD, STA
tR
tF
START
CONDITION
REPEATED
START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 3. 2-Wire Serial-Interface Timing Diagram
______________________________________________________________________________________
13
MAX9729
BEEP Input
The MAX9729 features a BEEP input with eight different
attenuation settings (see Table 6). The BEEP input is
useful for applications requiring the routing of a system
alert signal to the stereo audio path. The attenuation
value of the BEEP input is set by bits [7:5] in the 0x01
command register (see Tables 2 and 6). The attenuation settings of the BEEP input are independent of the
volume settings stored in register 0x00 (see Table 2).
The BEEP input is enabled when BEEP_EN is connected to V DD and disabled when driven low. When
BEEP_EN is high, the selected INL_ and INR_ inputs
are disconnected from the signal path and the BEEP
input signal is routed to both headphone outputs after
being attenuated by the value set by bits [7:5] in register 0x01. When BEEP_EN is low, the BEEP input is disconnected from the signal path and the selected INL_
and INR_ inputs are reconnected.
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
S
Sr
P
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
SCL
SCL
1
2
8
9
NOT ACKNOWLEDGE
SDA
SDA
ACKNOWLEDGE
Figure 4. START, STOP, and REPEATED START Conditions
Figure 5. Acknowledge
START and STOP Conditions
SDA and SCL idle high when the bus is not in use. A
master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (see
Figure 4). A START condition from the master signals
the beginning of a transmission to the MAX9729. The
master terminates transmission, and frees the bus, by
issuing a STOP condition. The bus remains active if a
REPEATED START condition is generated instead of a
STOP condition.
the write condition, R/W = 1 selects the read condition).
After receiving the proper address, the MAX9729 issues
an ACK by pulling SDA low for one clock cycle.
Early STOP Conditions
The MAX9729 recognizes a STOP condition at any
point during data transmission except if the STOP condition occurs in the same high clock pulse as a START
condition. At least one clock pulse must separate any
START and STOP conditions.
Slave Address
The slave address of the MAX9729 is pin programmable
using the ADD input to one of two different values (see
Table 1). The slave address is defined as the 7 most
significant bits (MSBs) of the serial data transmission.
The first byte of information sent to the MAX9729 after
the START condition must contain the slave address
and R/W bit. R/W bit indicates whether the master is
writing to or reading from the MAX9729 (R/W = 0 selects
Table 1. MAX9729 Slave Address with
R/W Bit
MAX9729 SLAVE ADDRESS
ADD
A6
(MSB)
A5
A4
A3
A2
A1
A0
GND
1
0
1
0
0
0
0
0
VDD
1
0
1
0
0
0
1
0
14
R/W
Acknowledge
The acknowledge bit (ACK) is the ninth bit attached to
any byte transmitted over the serial interface (see
Figure 5). ACK is always generated by the receiving
device. The MAX9729 generates an ACK when receiving a slave address or data by pulling SDA low during
the ninth clock period. The SDA line must remain stable
and low during the high period of the ACK clock pulse.
When transmitting data, the MAX9729 waits for the
receiving device to generate an ACK. Monitoring ACK
allows detection of unsuccessful data transfers. An
unsuccessful data transfer occurs if a receiving device
is busy or if a system fault has occurred. In the event of
an unsuccessful data transfer, the bus master should
reattempt communication at a later time.
Write Data Format
A write to the MAX9729 includes transmission of a
START condition, the slave address with the R/W bit set
to 0 (see Table 1), one or two command bytes to configure the command registers, and a STOP condition.
Figure 6a illustrates the proper data transmission for
writing to register 0x00 in a single frame. Figure 6b
illustrates the proper data transmission for writing to
both registers 0x00 and 0x01 in a single frame.
As shown in Figures 6a and 6b, the MAX9729 communicates an ACK after each byte of information is
received. The MAX9729 latches each command byte
into the respective command registers after an ACK is
communicated. The master device terminates the write
data transmission by issuing a STOP condition.
When writing to register 0x01, register 0x00 must be
written to first in the same data frame as shown in
Figure 6b. In other words, when updating register 0x01
both registers must be written to.
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
MAX9729
COMMAND BYTE IS
STORED AFTER ACK
FROM MAX9729
FROM MASTER DEVICE
S
SLAVE ADDRESS
B7
0
ACK
B6
B5
B4
B3
B2
B1
B0
COMMAND BYTE FOR REGISTER 0x00
ACK
FROM MASTER DEVICE
FROM MAX9729
R/W
START
CONDITION
P
STOP
CONDITION
Figure 6a. Write Data Format for Writing to Register 0x00 Only
COMMAND BYTE IS
STORED AFTER ACK
FROM MAX9729
B7
B6
B5
B4
B3
B2
B1
B0
B7
COMMAND BYTE IS
STORED AFTER ACK
B6
B5
B4
B3
B2
B1
B0
FROM MASTER DEVICE
S
0
SLAVE ADDRESS
R/W
START
CONDITION
A
COMMAND BYTE FOR REGISTER 0x00
FROM MASTER DEVICE
FROM MAX9729
ACK
COMMAND BYTE FOR REGISTER 0x01
FROM MASTER DEVICE
FROM MAX9729
ACK
P
STOP
CONDITION
Figure 6b. Write Data Format for Writing to Registers 0x00 and 0x01
Read Data Format
A read from the MAX9729 includes transmission of a
START condition, the slave address with the R/W bit
set to 1, one or two bytes of register data sent by the
MAX9729, and a STOP condition. Once the MAX9729
acknowledges the receipt of the slave address and
R/W bit, the data direction of the SDA line reverses and
the MAX9729 writes the contents of the command register 0x00 and 0x01 to the bus in that order. Each byte
sent by the MAX9729 should be acknowledged by the
master device unless the byte is the last data byte of
the transmission, in which case, the master device
should communicate a not acknowledge (NACK). After
the NACK is communicated, the master device terminates the read data transmission by issuing a STOP
condition. Figure 7a illustrates the proper data transmission for reading the contents of register 0x00.
Figure 7b illustrates the proper data transmission for
reading the contents of both registers 0x00 and 0x01 in
a single frame. Data sent by the MAX9729 is valid on
the rising edge of SCL.
When reading register 0x01, register 0x00 must be
read first in the same data frame as shown in Figure 7b.
In other words, when reading register 0x01 both registers must be read.
Command Registers
The MAX9729 utilizes two command registers to
enable/disable shutdown, control the multiplexer/mixer,
set the volume, set the BEEP input attenuation,
enable/disable BassMax, and set the maximum gain.
Table 2 describes the function of the bits contained in
the command registers.
Set B7 to 0 in register 0x00 to shut down the MAX9729.
The MAX9729 exits shutdown when B7 is set to 1 provided SHDN is high. SHDN must be high and B7 must be set
to 1 for the MAX9729 to operate normally (see Table 3).
Bits [6:5] in register 0x00 control the input multiplexer/
mixer. Select the desired input path and enable mixing of
all three stereo input sources with these bits (see Table 4).
Adjust the MAX9729’s volume with bits [4:0] in register
0x00. The volume is adjustable to one of 32 steps ranging from full mute to the maximum gain set by bits
[B2:B0] in register 0x01. Tables 5a, 5b, 5c list all the
possible volume settings and resulting total voltage
______________________________________________________________________________________
15
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
COMMAND BYTE IS
STORED AFTER ACK
FROM MAX9729
FROM MASTER DEVICE
S
SLAVE ADDRESS
B7
1
B6
ACK
B5
B4
B3
B2
B1
B0
NACK
CONTENTS OF REGISTER 0x00
FROM MAX9729
FROM MASTER DEVICE
R/W
START
CONDITION
P
STOP
CONDITION
Figure 7a. Read Data Format for Reading Register 0x00 Only
FROM MAX9729
B7
B6
B5
B4
B3
B2
B1
B0
B7
B6
B5
B4
B3
B2
B1
B0
FROM MASTER DEVICE
S
1
SLAVE ADDRESS
A
COMMAND BYTE FOR REGISTER 0x00
ACK
FROM MAX9729
FROM MASTER DEVICE
R/W
START
CONDITION
COMMAND BYTE FOR REGISTER 0x01
FROM MAX9729
FROM MASTER DEVICE
NACK
P
STOP
CONDITION
Figure 7b. Read Data Format for Reading Registers 0x00 and 0x01
Table 2. MAX9729 Command Registers
REGISTER
B7
B6
B5
0x00
SHUTDOWN
(see Table 3)
0x01
BEEP INPUT ATTENUATION (see Table 6)
B4
MUX/MIXER CONTROL
(see Table 4)
B3
B2
B1
B0
VOLUME CONTROL (see Table 5)
1
BassMax
ENABLE
(see Table 7)
MAXIMUM GAIN CONTROL (see Table 8)
X = Don’t Care.
Table 3. Shutdown Control (Register 0x00),
SHDN = VDD
B7
MODE
0
MAX9729 disabled
1
MAX9729 enabled
gains for the MAX9729. Figure 8 shows the volume
control transfer function for the MAX9729.
Use bits [B7:B5] in register 0x01 to set the BEEP input
attenuation. The BEEP input attenuation is adjustable to
one of eight different values ranging from -10dB to
-56dB (see Table 6).
16
Set B3 in register 0x01 to 1 to enable BassMax (see
Table 7). The output signal’s low-frequency response
will be boosted according to the external components
connected between OUT_ and BM_. See the BassMax
Gain-Setting Components section for details on choosing the external components.
Use bits [2:0] in register 0x01 to set the maximum gain
of the MAX9729 to one of eight different values ranging
from +3.5dB to +26dB (see Table 8). The maximum
gain setting in conjunction with the volume setting
determines the overall voltage gain of the MAX9729
(see Tables 5a, 5b, 5c).
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
MAX9729
Table 4. Multiplexer/Mixer Control (Register 0x00)
B6
B5
OUTL
OUTR
0
0
INL1 x AV_TOTAL
INR1 x AV_TOTAL
0
1
INL2 x AV_TOTAL
INR2 x AV_TOTAL
1
0
INL3 x AV_TOTAL
INR3 x AV_TOTAL
1
1
(INL1 + INL2 + INL3) x AV_TOTAL
(INR1 + INR2 + INR3) x AV_TOTAL
Power-On Reset
The MAX9729 features internal power-on reset (POR)
circuitry that initializes the device upon power-up. The
contents of the MAX9729’s command registers at
power-on are shown in Table 9.
Applications Information
Power Dissipation and Heat Sinking
Linear power amplifiers can dissipate a significant
amount of power under normal operating conditions.
The maximum power dissipation for each package is
given in the Absolute Maximum Ratings section under
Continuous Power Dissipation or can be calculated by
the following equation:
PD(MAX) =
TJ(MAX) − TA
θJA
where TJ(MAX) is +150°C, TA is the ambient temperature,
and θJA is the reciprocal of the derating factor in °C/W as
specified in the Absolute Maximum Ratings section. For
example, θJA for the thin QFN package is +35°C/W.
If the power dissipation exceeds the rated package
dissipation, reduce VDD, increase load impedance,
decrease the ambient temperature, or add heatsinking.
Large output, supply, and ground traces decrease θJA,
allowing more heat to be transferred from the package
to surrounding air.
Output Dynamic Range
Dynamic range is the difference between the noise
floor of the system and the output level at 1% THD+N. It
is essential that a system’s dynamic range be known
before setting the maximum output gain. Output clipping will occur if the output signal is greater than the
dynamic range of the system. The DirectDrive architecture of the MAX9729 has increased dynamic range (for
a given VDD) compared to other single-supply amplifiers. Due to the absolute maximum ratings of the
MAX9729 and to limit power dissipation, the MAX9729
includes internal circuitry that limits the output voltage
to approximately ±2.5V.
Use the THD+N vs. Output Power graph in the Typical
Operating Characteristics to identify the system’s
dynamic range. Find the output power that causes 1%
THD+N for a given load. This point will indicate what
output power causes the output to begin to clip. Use
the following equation to determine the peak-to-peak
output voltage that causes 1% THD+N for a given load:
VOUT _(P−P) = 2 2(POUT _ 1% × RL )
where POUT_1% is the output power that causes 1%
THD+N, RL is the load resistance, and VOUT_(P-P) is the
peak-to-peak output voltage. Determine the total voltage gain (AV_TOTAL) necessary to attain this output
voltage based on the maximum peak-to-peak input
voltage (VIN_(P-P)):
A V _ TOTAL =
VOUT _(P−P)
VIN _(P−P)
The AV_TOTAL setting is determined by the maximum
voltage gain setting, volume setting, and bass boost
gain if BassMax is enabled (see the Maximum Gain
Control, Volume Control, and BassMax Gain-Setting
Components sections).
UVLO
The MAX9729 features an undervoltage lockout (UVLO)
function that prevents the device from operating if the
supply voltage is less than 1.65V. This feature ensures
proper operation during brownout conditions and prevents deep battery discharge. Once the supply voltage
exceeds the UVLO threshold, the MAX9729 charge
pump is turned on, the amplifiers are powered (provided that SHDN is high), and the command registers are
reset to their POR values (see Table 9).
Component Selection
Charge-Pump Capacitor Selection
Use ceramic capacitors with a low ESR for optimum performance. For optimal performance over the extended temperature range, select capacitors with an X7R dielectric.
______________________________________________________________________________________
17
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Table 5a. Volume Control (Register 0x00)
B4
B3
B2
B1
B0
ATTEN FROM
MAX GAIN
SETTING (dB)
AV_TOTAL (dB)
WITH AV_MAX = +3.5dB
WITH AV_MAX = +6dB
WITH AV_MAX = +8dB
0
0
0
0
0
-0
+3.5
+6
+8
0
0
0
0
1
-1.7
+1.8
+4.3
+6.3
0
0
0
1
0
-3.4
+0.1
+2.6
+4.6
0
0
0
1
1
-4.8
-1.3
+1.2
+3.2
0
0
1
0
0
-6.2
-2.7
-0.2
+1.8
0
0
1
0
1
-7.6
-4.1
-1.6
+0.4
0
0
1
1
0
-9
-5.5
-3
-1
0
0
1
1
1
-10.4
-6.9
-4.4
-2.4
0
1
0
0
0
-11.8
-8.3
-5.8
-3.8
0
1
0
0
1
-13.2
-9.7
-7.2
-5.2
0
1
0
1
0
-14.6
-11.1
-8.6
-6.6
0
1
0
1
1
-16
-12.5
-10
-8
0
1
1
0
0
-17.4
-13.9
-11.4
-9.4
0
1
1
0
1
-18.8
-15.3
-12.8
-10.8
0
1
1
1
0
-20.2
-16.7
-14.2
-12.2
0
1
1
1
1
-21.6
-18.1
-15.6
-13.6
1
0
0
0
0
-23.1
-19.6
-17.1
-15.1
1
0
0
0
1
-24.4
-20.9
-18.4
-16.4
1
0
0
1
0
-26
-22.5
-20
-18
1
0
0
1
1
-27.1
-23.6
-21.1
-19.1
1
0
1
0
0
-28.6
-25.1
-22.6
-20.6
1
0
1
0
1
-30.1
-26.6
-24.1
-22.1
1
0
1
1
0
-32.3
-28.8
-26.3
-24.3
1
0
1
1
1
-35.1
-31.6
-29.1
-27.1
1
1
0
0
0
-38.6
-35.1
-32.6
-30.6
1
1
0
0
1
-42.1
-38.6
-36.1
-34.1
1
1
0
1
0
-46.2
-42.7
-40.2
-38.2
1
1
0
1
1
-50.7
-47.2
-44.7
-42.7
1
1
1
0
0
-54.2
-50.7
-48.2
-46.2
1
1
1
0
1
-60.2
-56.7
-54.2
-52.2
1
1
1
1
0
-70
-66.5
-64
-62
1
1
1
1
1
MUTE
MUTE
MUTE
MUTE
18
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
B4
B3
B2
B1
B0
ATTEN FROM
MAX GAIN
SETTING (dB)
AV_TOTAL (dB)
WITH AV_MAX = +10dB
WITH AV_MAX = +19.5dB
WITH AV_MAX = +22dB
0
0
0
0
0
-0
+10
+19.5
+22
0
0
0
0
1
-1.7
+8.3
+17.8
+20.3
0
0
0
1
0
-3.4
+6.6
+16.1
+18.6
0
0
0
1
1
-4.8
+5.2
+14.7
+17.2
0
0
1
0
0
-6.2
+3.8
+13.3
+15.8
0
0
1
0
1
-7.6
+2.4
+11.9
+14.4
0
0
1
1
0
-9
+1
+10.5
+13
0
0
1
1
1
-10.4
-0.4
+9.1
+11.6
0
1
0
0
0
-11.8
-1.8
+7.7
+0.2
0
1
0
0
1
-13.2
-3.2
+6.3
+8.8
0
1
0
1
0
-14.6
-4.6
+4.9
+7.4
0
1
0
1
1
-16
-6
+3.5
+6
0
1
1
0
0
-17.4
-7.4
+2.1
+4.6
0
1
1
0
1
-18.8
-8.8
+0.7
+3.2
0
1
1
1
0
-20.2
-10.2
-0.7
+1.8
0
1
1
1
1
-21.6
-11.6
-2.1
+0.4
1
0
0
0
0
-23.1
-13.1
-3.6
-1.1
1
0
0
0
1
-24.4
-14.4
-4.9
-2.4
1
0
0
1
0
-26
-16
-6.5
-4
1
0
0
1
1
-27.1
-17.1
-7.6
-5.1
1
0
1
0
0
-28.6
-18.6
-9.1
-6.6
1
0
1
0
1
-30.1
-20.1
-10.6
-8.1
1
0
1
1
0
-32.3
-22.3
-12.8
-10.3
1
0
1
1
1
-35.1
-25.1
-15.6
-13.1
1
1
0
0
0
-38.6
-28.6
-19.1
-16.6
1
1
0
0
1
-42.1
-32.1
-22.6
-20.1
1
1
0
1
0
-46.2
-36.2
-26.7
-24.2
1
1
0
1
1
-50.7
-40.7
-31.2
-28.7
1
1
1
0
0
-54.2
-44.2
-34.7
-32.2
1
1
1
0
1
-60.2
-50.2
-40.7
-38.2
1
1
1
1
0
-70
-60
-50.5
-48
1
1
1
1
1
MUTE
MUTE
MUTE
MUTE
______________________________________________________________________________________
19
MAX9729
Table 5b. Volume Control (Register 0x00)
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Table 5c. Volume Control (Register 0x00)
B4
B3
B2
B1
B0
ATTEN FROM
MAX GAIN
SETTING (dB
AV_TOTAL (dB)
WITH AV_MAX = +24dB
WITH AV_MAX = +26dB
0
0
0
0
0
-0
+24
+26
0
0
0
0
1
-1.7
+22.3
+24.3
0
0
0
1
0
-3.4
+20.6
+22.6
0
0
0
1
1
-4.8
+19.2
+21.2
0
0
1
0
0
-6.2
+17.8
+19.8
0
0
1
0
1
-7.6
+16.4
+18.4
0
0
1
1
0
-9
+15
+17
0
0
1
1
1
-10.4
+13.6
+15.6
0
1
0
0
0
-11.8
+12.2
+14.2
0
1
0
0
1
-13.2
+10.8
+12.8
0
1
0
1
0
-14.6
+9.4
+11.4
0
1
0
1
1
-16
+8
+10
0
1
1
0
0
-17.4
+6.6
+8.6
0
1
1
0
1
-18.8
+5.2
+7.2
0
1
1
1
0
-20.2
+3.8
+5.8
0
1
1
1
1
-21.6
+2.4
+4.4
1
0
0
0
0
-23.1
+0.9
+2.9
1
0
0
0
1
-24.4
-0.4
+1.6
1
0
0
1
0
-26
-2
+0
1
0
0
1
1
-27.1
-3.1
-1.1
1
0
1
0
0
-28.6
-4.6
-2.6
1
0
1
0
1
-30.1
-6.1
-4.1
1
0
1
1
0
-32.3
-8.3
-6.3
1
0
1
1
1
-35.1
-11.1
-9.1
1
1
0
0
0
-38.6
-14.6
-12.6
1
1
0
0
1
-42.1
-18.1
-16.1
1
1
0
1
0
-46.2
-22.2
-20.2
1
1
0
1
1
-50.7
-26.7
-24.7
1
1
1
0
0
-54.2
-30.2
-28.2
1
1
1
0
1
-60.2
-36.2
-34.2
1
1
1
1
0
-70
-46
-44
1
1
1
1
1
MUTE
MUTE
MUTE
20
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
B3
MODE
0
BassMax Disabled
1
BassMax Enabled
0
10
ATTENUATION (dB)
20
30
Table 8. Maximum Gain Control
(Register 0x01)
40
50
60
70
B2
B1
B0
MAXIMUM GAIN (dB)
80
0
0
0
3.5
90
0
0
1
6
100
0
1
0
8
0
1
1
10
1
0
0
19.5
1
0
1
22
1
1
0
24
1
1
1
26
0
5
10
15
20
25
30
35
CODE (DECIMAL)
Figure 8. MAX9729 Volume Control Transfer Function
Table 6. Beep Level (Register 0x01)
B7
B6
B5
BEEP LEVEL (dBV)
0
0
0
-10
0
0
1
-20
0
1
0
-30
0
1
1
-40
1
0
0
-50
1
0
1
-52
1
1
0
-54
1
1
1
-56
graph in the Typical Operating Characteristics. Place
C1 physically close to C1P and C1N. Use a 1µF capacitor for C1 in most applications.
BEEP level referenced to a 3V BEEP input.
Charge-Pump Flying Capacitor (C1)
The charge-pump flying capacitor connected between
C1N and C1P affects the charge pump’s load regulation and output impedance. Choosing too small a flying
capacitor degrades the MAX9729’s ability to provide
sufficient current drive and leads to a loss of output
voltage. Increasing the value of the flying capacitor
improves load regulation and reduces the chargepump output impedance. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance
Charge-Pump Hold Capacitor (C2)
The hold capacitor’s value and ESR directly affect the
ripple at PVSS. Ripple is reduced by increasing the
value of the hold capacitor. Choosing a capacitor with
lower ESR reduces ripple and output impedance. Lower
capacitance values can be used in systems with low
maximum output power levels. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance graph
in the Typical Operating Characteristics. C2 should be
equal to the value of C1. Place C2 physically close to
PVSS and SVSS. Connect PVSS and SVSS together at
C2. Use a 1µF capacitor for C2 in most applications.
PVDD Bypass Capacitor (C3)
The PVDD bypass capacitor lowers the output impedance of the power supply and reduces the impact of
the MAX9729’s charge-pump switching transients. C3
should be greater than or equal to C1. Place C3 physically close to PVDD.
Table 9. Initial Power-Up Command Register Status
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
POR SETTINGS
0x00
1
0
0
0
1
0
1
1
Shutdown mode disabled (assuming VSHDN = VDD), INL1 and
INR1 inputs selected, ATTEN = 16dB (AV_TOTAL = -10dB)
0x01
1
1
1
1
1
0
0
1
Beep input attenuation = 56dB, BassMax enabled, AV_MAX = 6dB
______________________________________________________________________________________
21
MAX9729
Table 7. BassMax Control (Register 0x01)
MAX9729 VOLUME CONTROL
TRANSFER FUNCTION
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Input-Coupling Capacitor
The AC-coupling capacitor (CIN) and input resistor (RIN)
form a highpass filter that removes any DC bias from an
input signal. See the Functional Diagram/Typical
Operating Circuit. CIN prevents any DC components
from the input signal source from appearing at the
amplifier outputs. The -3dB point of the highpass filter,
assuming zero source impedance due to the input signal source, is given by:
f−3dB =
1
2π × RIN × CIN
(Hz)
Choose CIN such that f-3dB is well below the lowest frequency of interest. Setting f-3dB too high affects the
amplifier’s low-frequency response. Use capacitors with
low-voltage coefficient dielectrics. Aluminum electrolytic,
tantalum, or film dielectric capacitors are good choices
for AC-coupling capacitors. Capacitors with high-voltage
coefficients, such as ceramics (non-C0G dielectrics),
can result in increased distortion at low zero frequencies. If a ceramic capacitor is selected due to board
space or cost constraints, use the largest package possible to minimize voltage coefficient effects. In addition,
use X7R dielectrics as opposed to X5R, Y5V, or Z5U.
BassMax Gain-Setting Components
The bass boost, low-frequency response when
BassMax is enabled, is set by the ratio of R1 to R2 (see
Figure 2), by the following equation:
A V _ BOOST = 20 × log
R1 + R2
(dB)
R1 − R2
where AV_BOOST is the gain boost, in dB, at low frequencies. AV_BOOST is added to the gain realized by
the maximum gain setting and the volume setting. The
total gain at low frequencies is equal to:
A V _ TOTAL _ BM = A V _ MAX − ATTEN + A V _ BOOST (dB)
where AV_TOTAL_BM is the total voltage gain at low frequencies in dB, AV_MAX is the maximum gain setting in
dB, and ATTEN is the volume attenuation in dB. To
maintain circuit stability, the ratio:
R2
R1 + R2
must not exceed 1/2. A ratio equaling 1/3 is recommended. The switch that shorts BM_ to SGND, when BassMax
is disabled, can have an on-resistance as high as 300Ω.
22
Table 10. BassMax Gain Examples,
R1 = 47kΩ
R2 (kΩ)
AV_BOOST (dB)
39
20.6
33
15.1
27
11.3
22
8.8
15
5.7
10
3.7
Choose a value for R1 that is greater than 40kΩ to
ensure that positive feedback is negligible when
BassMax is disabled. Table 10 contains a list of R2 values, with R1 = 47kΩ, and the corresponding low-frequency gain boost values.
The low-frequency boost attained by the BassMax circuit is added to the gain realized by the maximum gain
setting and volume setting. Select the BassMax gain so
that the output signal will remain within the dynamic
range of the MAX9729. Output signal clipping will occur
at low frequencies if the BassMax gain boost is excessively large. See the Output Dynamic Range section.
Capacitor C4 forms a pole and a zero according to the
following equations:
R1 − R2
(Hz)
2π × C6 × R1 × R2
R1 + R2
fZERO =
(Hz)
2π × C6 × R1 × R2
fPOLE =
fPOLE is the frequency at which the gain boost begins
to roll off. fZERO is the frequency at which the bass
boost gain no longer affects the transfer function. At
frequencies greater than or equal to fZERO, the gain set
by the maximum gain setting and the volume control
attenuation dominate. Table 11 contains a list of capacitor values and the corresponding poles and zeros for a
given DC gain. See Figure 9 for an example of a gain
profile using BassMax.
Layout and Grounding
Proper layout and grounding are essential for optimum
performance. Connect PGND and SGND together at a
single point (star ground point) on the PCB near the
MAX9729. Connect PV SS and SV SS together at C2.
Place C2 physically close to PVSS and SVSS and connect it to PGND. Bypass PV DD to PGND with C3.
Connect C3 as close to PVDD as possible. Bypass VDD
to SGND with a 1µF capacitor. Place the VDD bypass
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
MAX9729
Table 11. BassMax Pole and Zero
Examples for a Gain Boost of 8.8dB
(R1 = 47kΩ, R2 = 22kΩ)
GAIN PROFILE WITH AND
WITHOUT BassMax
10
fPOLE
8
C6 (nF)
fPOLE (Hz)
fZERO (Hz)
100
38
106
82
47
130
68
56
156
56
68
190
-2
47
81
230
-4
22
174
490
-6
10
384
1060
6
AV (dB)
fZERO
WITH
BassMax
4
2
0
MAX9729
CMD REGISTER
CODE = 0xFF
R1 = 47kΩ
R2 = 22kΩ
C3 = 0.1μF
WITHOUT
BassMax
-8
-10
1
capacitor as close to VDD as possible. Route PGND
and all traces that carry switching transients away from
SGND and the audio signal path. Route digital signal
traces away from the audio signal path. Make traces
perpendicular to each other when routing digital signals over or under audio signals.
The thin QFN package features an exposed paddle
that improves thermal efficiency. Ensure that the
exposed paddle is electrically isolated from PGND,
SGND, and V DD. Connect the exposed paddle to
SV SS when the board layout dictates that the
exposed paddle cannot be left unconnected.
10
100
1k
10k
FREQUENCY (Hz)
Figure 9. BassMax Gain Profile Example
______________________________________________________________________________________
23
24
RIGHT AUDIO
INPUT 3
RIGHT AUDIO
INPUT 2
RIGHT AUDIO
INPUT 1
LEFT AUDIO
INPUT 3
LEFT AUDIO
INPUT 2
LEFT AUDIO
INPUT 1
CIN
1μF
CIN
1μF
CIN
1μF
CIN
1μF
CIN
1μF
CIN
1μF
25kΩ
25kΩ
25kΩ
25kΩ
25kΩ
23
MAX9729
VDD
SVSS
VDD
SVSS
VDD
24
BEEP INPUT
CIN
1μF
25kΩ
BEEP
SGND
PGND
SHDN
21
10kΩ
0 TO 100dB
ATTENUATOR
SVSS
VDD
20
BEEP_EN
I2C INTERFACE/CONTROL LOGIC
12
SCL
7
SDA
5
ADD
10kΩ
VDD
BASS-BOOST CIRCUIT CONFIGURED FOR AV_BOOST = +8.8dB, fPOLE = 38Hz, fZERO = 106Hz.
() USCP PACKAGE
2 INR3
1 INR2
28 INR1
27 INL3
26 INL2
25 INL1
25kΩ
1μF
1.8V TO 3.6V
TO I2C
MASTER
BEEP ENABLE
SVSS
R
VDD
SVSS
VDD
R
R
R
R
BEEP
ENABLE
3
SGND
R
SVSS
VDD
SVSS
10
6
C2
1μF
PVSS
CHARGE PUMP
PGND
BassMax
ENABLE
VDD
R
14
SVSS
C1N
C1P
PVDD
OUTR
BMR
BML
OUTL
9
11
13
17
16
19
18
C1
1μF
C3
1μF
C6
0.1μF
C6
0.1μF
VDD
R1
47kΩ
R2
22kΩ
R2
22kΩ
R1
47kΩ
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Functional Diagram/Typical Operating Circuit
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
10kΩ
10kΩ
1.8V TO
3.6V
1μF
VDD
SDA
SCL
SHDN
BEEP_EN
CONTROLLER
C3
1μF
PVDD
CIN
1μF
BEEP
CIN
1μF
OUTL
ADD
R1
47kΩ
INL1
AUDIO CODEC
BML
CIN
1μF
INR1
CIN
1μF
R2
22kΩ
C4
0.1μF
R2
22kΩ
MAX9729
INL2
BASEBAND IC
C4
0.1μF
BMR
CIN
1μF
R1
47kΩ
INR2
CIN
1μF
OUTR
INL3
FM RADIO IC
CIN
1μF
INR3
C1P
C1N
SGND
PGND
PVSS
SVSS
C2
1μF
C1
1μF
______________________________________________________________________________________
25
MAX9729
System Diagram
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
SHDN
BEEP_EN
BML
OUTL
OUTR
BMR
N.C.
TOP VIEW
21
20
19
18
17
16
15
N.C.
22
14
SVSS
VDD
23
13
PVDD
BEEP
24
12
SCL
INL1
25
11
C1P
INL2
26
10
PGND
INL3
27
4
5
6
7
PVSS
SDA
3
ADD
2
N.C.
1
SGND
28
+
INR3
INR1
MAX9729
INR2
MAX9729
Pin Configuration
9
C1N
8
N.C.
TQFN
Chip Information
PROCESS: BiCMOS
26
______________________________________________________________________________________
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
QFN THIN.EPS
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
1
2
______________________________________________________________________________________
27
MAX9729
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
MAX9729
Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products
SPRINGER
is a registered trademark of Maxim Integrated Products. Inc.