MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY DESCRIPTION The MITSUBISHI M5M29F25611 is a CMOS Flash Memory with AND type multi-level memory cells. It has fully automatic programming and erase capabilities with a single 3.3V power supply. The functions are controlled by simple external commands. To fit the I/O card applications, the unit of programming and erase is as small as (2048+64) bytes. Available sectors of M5M29F25611 are more than 16,057(98% of all sector address) and less than 16,384 sectors. FEATURES On-board single power supply(Vcc) : Vcc=3.0V to 3.6V Organization AND Flash Memory : (2048+64)bytes x (More than 16,057 sectors) Data register : (2048+64)bytes Multi-level memory cell: 2bit / per memory cell. Automatic programming : Sector program time : 2.5 ms typ. System bus free Address,data latch function Internal automatic program verify function Status data polling function Automatic erase : Single sector erase time : 1.0 ms typ. System bus free Internal automatic erase verify function Status data polling function Erase mode : Single sector erase ((2048+64)byte unit) Fast access time : Serial read First access time : 50µs max. Serial access time : 50ns max. Low power dissipation : ICC2 = 30mA typ. / 50mA max. (Read) ISB2 = 30µA typ. / 50µA max. (Standby) ICC3 = 20mA typ. / 40mA max. (Program) ICC4 = 20mA typ. / 40mA max. (Erase) ISB3 = 1µA typ. / 10µA max. (Deep standby) Package : 48pin-TSOP(I) (12.0 x 20.0mm2) 1 PIN CONFIGURATION(TOP VIEW) GND Vcc DQ0 DQ1 DQ2 DQ3 GND NC NC NC NC NC NC NC NC Vcc DQ4 DQ5 DQ6 DQ7 SC GND GND 1 2 3 4 5 6 7 8 9 10 48 47 11 12 13 14 15 16 17 18 19 20 21 22 23 24 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 M5M29F25611VP GND GND NC NC NC Vcc NC NC NC NC NC NC NC NC GND R/ DU NC Vcc GND Outline 48P3R-B Pin Description Pin name DQ0-7 Vcc note1 GND note1 R/ Function Input / Output Chip enable Output enable Write enable Command data enable Power supply Ground SC NC Ready / Reset Serial clock No connect DU note2 Don't Use Note1:All Vcc and GND pins should be connected to a common power supply and a ground, respectively. Note2:Pin should not be connected to anything. Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Block Diagram 2048+64 Sector Address Buffer X-Decoder 16384 x (2048+64) x 8 Memory Matrix Data Register(2048+64) 8 ~ DQ0 DQ7 Multiplexer Data Input Buffer Input Data Control ~ Y-Gating Y-Decoder Data Output Buffer ~ R/ Y-Address Counter Vcc GND Read/Program/ Erase Control SC 2 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Memory Map & Address Sector Address. 3FFFH 3FFEH 3FFDH 0002H 0001H 0000H 2048 Bytes 64Bytes 2048 Bytes 64 Bytes 2048 Bytes 64Bytes 2048 Bytes 64 Bytes 2048 Bytes 64 Bytes 2048 Bytes 64 Bytes 000H 800H 83FH Column Address (2048+ 64) Bytes Control Bytes SA(1) : First Cycle Sector address SA(2) : Second Cycle CA(1) : First Cycle Column address CA(2) : Second Cycle DQ0 DQ1 DQ2 DQ3 DQ4 SA0 SA1 SA2 SA3 SA4 SA8 SA9 SA10 SA11 SA12 CA0 CA1 CA2 CA3 CA4 CA8 CA9 CA10 CA11 X DQ5 DQ6 DQ7 SA5 SA6 SA7 SA13 X X CA5 CA6 CA7 X X X (Note2) Note 1: Some failed sectors may exist in the device. The failed sectors can be recognized by reading the sector valid data written in a part of the column address 820H - 825H. The sector valid data must be read and kept outside of the sector before the sector erase. When the sector is programmed, the sector valid data should be written back to the sector. 2: An X means “Don’t care”. The pin level can be set to either VIL or VIH, as shown on page 12. 3 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Mode Selection Pin Mode (note3) R/ SC Deep Standby (note4) Standby Output disable Status register read Command Write (note1) X VIH VIL VIL X X VIH VIL X X VIH VIH X X X X VILR VIHR VIHR VIHR X X X X VOH VOH VOH VOH (note2) VIL VIH VIL VIL VIHR VIL VOH DQ0 - DQ7 Hi - Z Hi - Z Hi - Z Status register outputs Din Notes: 1. Default mode after the power on is the status register read mode(refer to status transition P.11). From DQ0 to DQ7 pins output the status when =VIL and =VIL. 2. Refer to the command definition(P.5). Data can be read, programmed and erased after commands are written in this mode. 3. The R/ bus should be pulled up to Vcc to maintain the VOH level while the R/ pin outputs a high impedance. 4. An X means “Don’t care”. The pin level can be set to either VIL or VIH as shown on page 12. Pin Description is used to select the device. The status returns to the Standby at the rising edge of in the reading operation. However, the status does not return to the Standby at the rising edge of in the busy state in programming and erase operation. Memory data, status register data and identifier code (ID code) can be read, when Commands and address are latched at the rising edge of is VIL. . SC Programming and reading data is latched at the rising edge of SC. pin must be kept at the VILR (GND±0.2V) level when Vcc is turned on and off. In this way, data in the memory is protected against unintentional erase and programming. must be kept at the VIHR (Vcc±0.2V) level during any operations such as programming, erase and read Commands and data are latched when is VIL and Address is latched when is VIH. R/ The R/ indicates the program/erase status of the flash memory. The R/ signal is initially at a high impedance state. It turns to a VOL level after the (40H) command in programming operation or the(B0H) command in erase operation. No commands can be written during the R/ pin outputs a VOL. After the erase or programming operation finishes, the R/ signal turns back to the high impedance state. The R/ indicates the first access status of the flash memory in serial read (1) and (2). It turns to a VOL level after the sector address (SA(2)) in serial read (1) and serial read (2) operation. No commands can be written during the R/ pin outputs a VOL. Also, no serial clock can be input during the R/ pin outputs a VOL. After the first access operation finishes, the R/ signal turns back to the high impedance state. DQ0-DQ7 The DQ pins are used to input data, address and command, and are used to output memory data, status register data and identifier code (ID code). 4 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Command Definition (note 1,2) Second cycle First Bus cycles Command Serial read(1) Without CA With CA 3 3+2h(note6) 3 Serial read(2) Read identifier codes Data Recovery Read Single sector Auto Erase Program (1) Auto Program 1 1 4 4 Without CA (note 7) With CA (note 7) 4+2h(note6) Program (2) (note 10) 4 Program (3) (control bytes) (note 7) 4 4 Program (4) Without CA (note 7) With CA (note 7) 4+2h(note6) Reset 1 Clear status register 1 Data Recovery Write 4 Operation mode (note 3) Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Data in Operation mode 00H 00H F0H 90H 01H 20H 10H 10H 1FH 0FH 11H 11H FFH 50H 12H Write Write Write Read Read Write Write Write Write Write Write Write - Write Third cycle Command Serial read(1) Serial read(2) Auto Erase Auto Program Without CA With CA Single sector Program (1) Operation mode Data in 3 3+2h(note6) 3 4 Write Write Write Write Write Write Write Write Write Write SA(2) (note4) SA(2) (note4) SA(2) (note4) Write Program (2) (note 10) 4 Program (3) (control bytes) (note 7) 4 Program (4) Without CA (note 7) 4 With CA (note 7) 4+2h(note6) Data Recovery Write Fourth cycle Bus cycles Without CA (note 7) 4 With CA (note 7) 4+2h(note6) 4 Data in out SA(1) (note 4) SA(1) (note 4) SA(1) (note 4) ID (note8,9) Recovery Data SA(1) (note 4) SA(1) (note 4) SA(1) (note 4) SA(1) (note 4) SA(1) (note 4) SA(1) (note 4) SA(1) (note 4) SA(1) (note 4) - Command Serial read(1) Auto Program With CA Program (1) Program (4) With CA (note 7) With CA (note 7) 3+2h(note6) 4+2h(note6) 4+2h(note6) CA(1) (note5) - Write - (note4) (note4) (note4) (note4) (note4) (note4) Write Write Write Write Write Write Write B0H (note11) 40H (note11,12) CA(1) (note5) 40H (note11,12) 40H (note11,12) CA(1) (note5) SA(2) (note4) Write 40H (note11,12) SA(2) (note4) SA(2) SA(2) SA(2) SA(2) SA(2) SA(2) Fifth cycle Bus cycles Data in Operation mode 40H (note11,12) Sixth cycle Operation mode Data in Write Write Write CA(2) (note5) CA(2) (note5) CA(2) (note5) Data in Operation mode - - Write Write 40H (note11,12) 40H (note11,12) Notes : 1. Commands, sector address and column address are latched at rising edge of pulses. Program data is latched at rising edge of SC pulses. 2. The chip is in the read status register mode when is set to VIHR first time after the power up. 3. Refer to the command read and write mode in mode selection table (P.4). 4. SA(1)=Sector address (SA0 - SA7), SA(2)=Sector address (SA8 - SA13). 5. CA(1)=Column address (CA0 - CA7), CA(2)=Column address (CA8 - CA11).(0≤CA11 - CA0≤83FH) 6. The variable h is the input number of times of set of CA(1) and CA(2).(1≤h≤2048+64) Set of CA(1) and CA(2) can be input not only one time but free times. 7. By using program(1) and (3), data can additionally be programmed for each sector before erase. 8. ID=Identifier code; Manufacturer code (1CH), Device code (6CH). 9. The manufacturer identifier code is output when is low and the device identifier code is output when is high. 10. Before program (2) operations, data in the programmed sector must be erased. 11. No commands can be written during auto program and erase (when the R/ pin outputs a VOL). 12. The fourth cycle or sixth cycle of the auto program comes after the program data input is complete. 5 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Mode Description Read Serial read(1) Memory data D0-D2111 in the sector of address SA is sequentially read. Output data is not valid after the number of the serial clock SC pulse exceeds 2112. When the column address CA is input after SA, memory data D(m) -D(m+j) in the sector of address SA is sequentially read. Then output data is not valid after the number of the SC pulse exceeds (2112-m). The mode turns back to the Standby mode at any time when is VIH. Serial read(2) Memory data D2048-D2111 in the sector of address SA is sequentially read. Output data is not valid after the number of the SC pulse exceeds 64.The mode turns back to the Standby mode at any time when is VIH. Automatic Erase Single sector Erase Memory data D0-D2111 in the sector of address SA is erased automatically by internal control circuits. After the sector erase starts, the erasure completion can be checked through the R/ signal and status data polling. All the bits in the sector are “1” after the erase. The sector valid data stored in a part of memory data D2048-D2111 must be read and kept outside of the sector before the sector erase. Automatic program Program(1) Program data PD0-PD2111 is programmed into the sector of address SA automatically by internal control circuits. When CA is input after SA, program data PD(m) -PD(m+j) is programmed form CA into the sector of address SA automatically by internal control circuits. By using program(1), data can additionally be programmed for each sector before the following erase. When the column is programmed, the data of the column must be [FF]. After the programming starts, the program completion can be checked through the R/ signal and status data polling. Programmed bits in the sector turn from “1” to “0” when they are programmed. The sector valid data should be included in the program data PD2048-PD2111. In this mode, E/W number of times must be counted whenever program(1) execute. Program(2) Program data PD0-PD2111 is programmed into the sector of address SA automatically by internal control circuits. After the programming starts, the program completion can be checked through the R/ signal and status data polling. Programmed bits in the sector turn from “1” to “0” when they are programmed. The sector must be erased before programming. The sector valid data should be included in the program data PD2048-PD2111. In this mode, Write number of times must be counted whenever program(2) execute. Program(3) Program data PD2048-PD2111 is programmed into the sector of address SA automatically by internal control circuits. By using program(3), data can additionally be programmed for each sector before the following erase. When the column is programmed, the data of the column must be [FF]. After the programming starts, the program completion can be checked through the R/ signal and status data polling. Programmed bits in the sector turn from “1” to “0” when they programmed. In this mode, E/W number of times must be counted whenever program(3) execute. Program(4) Program data PD0-PD2111 is programmed into the sector of address SA automatically by internal control circuits. When CA is input after SA, program data PD(m) -PD(m+j) is programmed from CA into the sector of address SA automatically by internal control circuits. By using program(4), data can be rewritten for each sector before the following erase. So the column data before programming operation are either “1” to “0”. After the programming starts,the program completion can be checked through the R/ single and status data polling. The sector valid data should be included in the program data PD2048-PD2111. In this mode, E/W number of times must be counted whenever program(4) execute. 6 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY 16383 Sector Address 16383 16383 Sector Address Sector Address Memory Array 0 Memory Array Memory Array 0 0 0 Register 2111 Serial read(1), (Without CA) Program(1), (Without CA) Program(2) Program(4), (Without CA) 0 Column address Register Serial read(1), (With CA) Program(1), (With CA) Program(4), (With CA) 2111 2048 0 Register 2111 Serial read(2) Program(3) Status Register Read The status returns to the register read mode from Standby mode ,when and is VIL. In the status register read mode, DQ pins output the same operation status as in the status data polling defined in the function description, table 1 (page 34). Identifier Read The manufacturer and device identifier code can be read in the identifier read mode. The manufacturer and device identifier code is selected with VIL and VIH, respectively. Data Recovery Read When programming was error, the program data can be read. When additional programming (Program(1),(3),(4))was error, the data compounded of the program data and the original data in the sector of address SA can be read. Output data is not valid after the number of SA pulse exceeds 2112. The mode turns back to the Standby mode at any time when is VIH. (See timing waveform in page 31) Data Recovery Write When programming into a sector of address SA was an error,the program data can be re-written automatically by selecting the other sector SA'.In this Case,top address [SA13] of sector of address SA' must be the same as SA.Since the data recovery write mode utilizes program(4),rewritten sector of address SA' needs no sector erase before rewritten.After the data recovery write mode starts,the program completion can be checked through R/ signal and the status data polling. 7 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Command / Address / Data Input Sequence 8 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Command / Address / Data Input Sequence 9 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Command / Address / Data Input Sequence 10 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Status Transition Deep Standby Vcc Column address input Power off CA(1) CA(2) 00H / F0H SA(1), SA(2) Read (1), (2) setup CA(1)',CA(2)' Sector address input , SC SC Read(1), (2) FFH 90H , ID Read set up ID Read FFH BUSY 20H SA(1), SA(2) Sector Erase set up B0H Sector address input Erase start Status register read FFH Erase finish Column address input CA(1) CA(2) Standby Output disable 10H/ 11H Program (1),(4) set up SA(1) SA(2) CA(1)',CA(2)' Sector address input PD0 ~ PD2111 SC, SC, PD(m)~ PD(m+j) Program data input 40H Program start Status register read Program data input 40H Program start Status register read FFH Program finish 1FH/ 0FH SA(1) Program (2),(3) SA(2) set up (note4) PD0 ~ PD2111 Sector address input SC, FFH Program finish Program or Erase Error Status register clear 50H (note2) (note2) FFH ERROR (note1) 01H Status register read Error Standby (note3) Error Output disable Data Recovery Read set up ,SC Data Recovery Read Status register read 40H (note1) 12H Data Recovery Write set up SA(1) SA(2) Sector address input FFH Note 1: (01H)/(12H) Data Recovery Read/Write can be used only for Program(1),(2),(3),(4) Errors. 2: When Reset is done by CE or FFH, Error Status Flag is cleared. 3: When Error Standby, Icc3 level is current. 4: When Program(3) mode, input data is PD2048 ~ PD2111. 11 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Absolute Maximum Ratings Symbol VIN, VOUT Vcc Topr Tstg Tbias Test conditions Parameter All input and output voltages Vcc voltage Operating temperature range Storage temperature range 2) Storage temperature under bias Unit V V Ratings -0.6 to +7 1) -0.6 to +7 0 to +70 -65 to +125 -10 to +80 With respect to GND °C °C °C Notes : 1. VIN , VOUT = -2.0V for pulse width ≤ 20ns 2. Device storage temperature range before programming. Capacitance (Ta = 25°C , f = 1MHz) Symbol Cin Cout Parameter Input capacitance Output capacitance Test conditions Min Limits Typ Max - - 6 12 Ta = 25°C, f = 1MHz, VIN = VOUT = 0V Unit pF pF Read Operation DC Characteristics Symbol ILI ILO ( Vcc = 3.0V to 3.6V , Ta = 0 to +70°C) Parameter Test conditions GND ≤ VIN ≤ VCC GND ≤ VOUT ≤ VCC Input leakage current Output leakage current ISB1 ISB2 ISB3 ICC1 ICC2 VIL VIH VILR VIHR VOL VOH Deep Standby Vcc current Operating Vcc current Input low voltage Input high voltage Input low voltage( Input high voltage( Output low voltage Output high voltage Min - Typ - Unit Max 2 2 µA µA - 0.3 1 mA 30 50 µA = GND ± 0.2V - 1 10 µA IOUT = 0mA, f = 0.2MHz IOUT = 0mA, f = 20MHz -0.3 25 50 mA mA 2.0 -0.2 VCC - 0.2 - 20 30 - 2.4 - = VIH = VCC ± 0.2V = VCC ± 0.2V Standby Vcc current Limits pin) pin) IOL = 2mA IOH = -2mA 1) 0.8 VCC + 0.3 0.2 2) VCC + 0.2 0.4 - Notes : 1. VILmin = -1.0V for pulse width ≤ 50ns. VILmin = -2.0V for pulse width ≤ 20ns. 2. VIHmax = Vcc + 1.5V for pulse width ≤ 20ns. If VIH is over the specified maximum value, the read operations are not guaranteed. 12 Rev.2.3.1 2001.2.2 V V V V V V MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY AC Characteristics (for power on and off, serial read) (Vcc =3.0 to 3.6V, Ta = 0 to +70°C) Test Conditions • Input pulse levels : 0.4V/2.4V • Input pulse levels for RES : 0.2V/Vcc-0.2V • Input rise and fall times : ≤ 5ns • Output load : 1 TTL gate + 100pF (Including scope and jig.) • Reference levels for measuring timing : 0.8V, 1.8V Symbol tCWC tSCC tCES tCEH tWP tWPH tAS tAH tDS tDH tSAC tOES tOEL tOER tOEWS tSH tDF 1) tWSD tRP tSOH tSP tSPL tSCS tCDS tCDH tVRS tVRH tCESR tDFP tBSY tCPH tCWRS tCWRH tSW tCOH tSCD tRS tDBR tRBSY 2) Parameter Write cycle time Serial clock cycle time setup time hold time Write pulse time Write pulse high time Address setup time Address hold time Data setup time Data hold time SC to output delay setup time for SC low to output low-z setup time before read setup time before command write SC to output hold hight to output float to SC delay time to setup time SC to hold time SC pulse width SC pulse low time SC setup time for setup time for hold time for Vcc setup time for to Vcc hold time setup time for R/ undefined for Vcc off high to device ready pulse high time , setup time for to , hold time SC setup for hold time for SA(2)to CA(2)delay time R/ setup time for SC Time to device Busy on Read mode Busy time on Read mode Test conditions = VIL, = = VIH = VIL, = VIH = = VIL, = VIH = VIL, = VIH = VIH = VIH Min 120 50 0 0 60 40 50 10 50 10 0 0 250 0 15 50 1 50 20 20 0 0 20 Limits Typ - 0 0 50 0 200 - Max 50 40 40 1 30 - - 45 1 - 1 1 1 0 200 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns µs ms ns ns ns ns ns ns µs µs µs ns ms ns ns ns ns ns µs ns µs µs Notes : 1. tDF is a time after which the DQ pins become open. 2. tWSD(min) is specified as a reference point only for SC, if tWSD is greater than the specified tWSD(min) limit, then access time is controlled exclusively by tSAC. 13 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Power on and off Sequence VCC tVRS tRP tCES tCEH tCESR tRP (note1) (note2) tCESR tDFP (note1) tBSY tBSY HighZ R/ tCEH tCWRH tVRH tCWRS Undefined tCES Ready Undefined note1 : must be kept at the VILR level as shown in page 12 at the rising and falling edges of Vcc to guarantee data stored in the chip. note2 : must be kept at the VIHR level specified in page 12 while DQ7 outputs the VOL level in the status data polling and R/ outputs the VOL level. 14 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Serial Read (1)/(2) Timing Waveforms tCOH (note1) tCPH tCES tCWC tOEWS tCEH tCWC tWPH tWP tCDH tOER tWPH tWP tWP tWP tCDH tOES tCDS tWSD tCDS tSCC tSCC (note2) tSOH tCDS SC tSCS tDS tDH tAS tAH tSP tSPL tAS tAH tOEL tSAC tSAC tSH tSAC tSAC tDF tDS tDH (note3) tSH DQ0-7 tRP 00H/ F0H SA(1) SA(2) D0out/ D1out/ D2048out D2049out D2111out/ (note2) D2111out FFH tRS tDBR HighZ R/ tRBSY Note 1. The status returns to the Standby at the rising edge of . 2. Output data is not valid after the number of the SC pulse exceed 2112 and 64 in the serial read mode (1) and (2), respectively. 3. The status can return to the Ready after the command FFH is input. 15 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY ~ ~ ~ ~ 16 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ 17 ~ ~ Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Erase and Programming Operations DC Characteristics Symbol ILI ILO ISB1 ISB2 (Vcc = 3.0V to 3.6V , Ta = 0 to +70°C ) Parameter Input leakage current Output leakage current Standby Vcc current ISB3 Deep Standby Vcc current ICC3 ICC4 VIL VIH VOL Operating Vcc current VOH Input low voltage Input high voltage Output low voltage Output high voltage Test conditions GND ≤ VIN ≤ VCC GND ≤ VOUT ≤ VCC = VIH = VCC ± 0.2V = VCC ± 0.2V = GND ± 0.2V In programming In erase IOL = 2mA IOH = -2mA Limits Typ 0.3 Max 2 2 1 - 30 50 µA - 1 10 µA Min - -0.3 2.0 2.4 1) 20 20 - 40 40 0.8 VCC + 0.3 - 0.4 - - Unit µA µA mA 2) mA mA V V V V Notes : 1. VILmin = -0.6V for pulse width ≤ 20ns. 2. If VIH is over the specified maximum value, the Erase and Programming operations are not guaranteed. 18 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY AC Characteristics (for Erase,program,ID read,status register read , data recovery read and data recovery write.) (Vcc =3.0V to 3.6V, Ta = 0 to +70°C) Test Conditions • Input pulse levels : 0.4V/2.4V • Input pulse levels for RES : 0.2V/Vcc - 0.2V • Input rise and fall times : ≤ 5ns • Output load : 1 TTL gate + 100pF (Including scope and jig.) • Reference levels for measuring timing : 0.8V, 1.8V Symbol tCWC tSCC tCES tCEH tWP tWPH tAS tAH tDS tDH tOEWS tOEPS tOER tDB tDBR tASE tASP(1) tASP(2) tASP(3) tASP(4) tASRW tWSD tRBSY tWSDR tCPH tSP tSPL tSDS tSDH tSW tSCS tSCHW tCE tOE tDF 1) tRP Parameter Write cycle time Serial clock cycle time setup time hold time Write pulse width Write pulse high time Address setup time Address hold time Data setup time Data hold time setup time before command write setup time before status polling setup time before read Time to device busy Time to device busy on Read Mode Auto erase time Auto program time (1) Auto program time (2) Auto program time (3) Auto program time (4) Data Recovery Write time to SC delay time Busy Time on Read Mode to SC delay time on Recovery Read Mode pulse high time SC pulse width SC pulse low time Data setup time for SC Data hold time for SC SC setup for SC setup for SC hold time for to output delay to output delay high to output float to setup time Test condition = VIL Min 120 50 0 0 60 40 50 10 50 10 0 40 Limits Typ - Max - 250 - 1.0 3.0 150 1 10 40 ns ns µs ms ms - 2.5 3.0 3.5 40 40 40 ms ms ms 50 2 200 20 20 0 3.5 45 - 40 - ms µs µs µs - 120 60 40 - ns us ns ns ns ns ns ns ns ns ns ms 30 50 0 20 1 Unit ns ns ns ns ns ns ns ns ns ns ns ns Notes : 1. tDF is a time after which the DQ pins become open. 19 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY AC Characteristics (for Erase,program,ID read,status register read , data recovery read and data recovery write.) (Vcc =3.0V to 3.6V, Ta = 0 to +70°C) Test Conditions • Input pulse levels : 0.4V/2.4V • Input pulse levels for RES : 0.2V/Vcc - 0.2V • Input rise and fall times : ≤ 5ns • Output load : 1 TTL gate + 100pF (Including scope and jig.) • Reference levels for measuring timing : 0.8V, 1.8V Symbol tCDS tCDH tCDSS tCDSH tRDY tCDOH tCDAC tCDF tCOS tCOH tCDOS tOES tOEL tSAC tSH tRS tCWH tCWHR tWWH 20 parameter setup time for hold time for setup time for SC hold time for SC Next cycle ready time to hold time to output delay to output invalid setup time for hold time for to setup time setup time for SC low to output low-z SC to output delay SC to output hold R/ setup for SC hold time for hold time for on Recovery Read Mode hold time for Test condition Min 0 20 1.5 30 0 50 0 0 0 20 0 0 15 200 1 2 1 Limits Typ - Rev.2.3.1 Max 50 100 40 50 - Unit ns ns µs ns ns ns ns ns ns ns ns ns ns ns ns ns µs µs µs 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Erase and Status Data Polling Timing Waveforms (Sector Erase) tCOS tCEH tCES tCE tOE tCWC tOEWS tCWC tWPH tCWC tWPH tOEPS tWPH tASE tRDY tCDS tWP tCDH tWP tCDS tWP tCDS tCDS tWP tCDH tSCHW tCDH SC tSCS tDS tDH tAS tAH tAS tAH tDS tDH tDF tDF DQ0-7 20H SA(1) SA(2) B0H DQ7=VOL DQ7=VOH tDB tRP R/ (note2) HighZ HighZ (note1) Note : 1. Any commands, including reset command FFH, cannot be input while R/ outputs a VOL. 2. The status returns to the Standby or the Output disable after R/ returns to HighZ. 21 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Program(1) and Status Data Polling Timing Waveforms tCOS tCES tCEH tCWC tOEWS tCE tCWC tWPH tOE tOEPS tWPH tRDY tCDS tWP tCDS tWP tWP tCDSS tASP(1) tWP tSW tCDS tCDH tSCC tSPL tCDH tCDH tSCHW (note1) SC tSCS tDS tDH tAS tAH tAS tAHtSDS tSDH tSP tSP tDS tDH tDF tDF DQ0-7 10H tRP R/ SA(1) SA(2) PD0 HighZ PD1 PD2111 40H DQ7=VOL DQ7=VOH (note3) HighZ tDB (note2) Notes : 1. The programming operation is not guaranteed when the number of the SC pulse exceeds 2112. 2. Any commands, including reset command FFH, cannot be input while R/ is VOL. 3. The status returns to the Standby or the Output disable after R/ returns to HighZ. 4. By using program(1), data can be programmed additionally for each sector before erase. 22 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY 23 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY 24 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Program(2) and Status Data Polling Timing Waveforms tCOS tCES tCEH tCWC tOEWS tCE tCWC tWPH tWP tCDS tWP tOE tOEPS tWPH tCDSS tWP tRDY tASP(2) tWP tCDS tSW tCDS tCDH tSCC tSPL tCDH tCDH tSCHW (note1) SC tSCS tDS tDH tAS tAH tAS tAHtSDS tSDH tSP tSP tDS tDH tDF tDF DQ0-7 1FH tRP R/ SA(1) SA(2) PD0 HighZ PD1 PD2111 40H DQ7=VOL DQ7=VOH (note3) HighZ tDB (note2) Notes : 1. The programming operation is not guaranteed when the number of the SC pulse exceeds 2112. 2. Any commands, including reset command FFH, cannot be input while R/ is VOL. 3. The status returns to the Standby or the Output disable after R/ returns to HighZ. 4. By using program(2), the programmed data of each sector must be erased before programming next data. 25 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Program(3) and Status Data Polling Timing Waveforms tCOS tCES tCEH tCWC tCWC tOEWS tCE tWPH tWP tCDS tWP tCDS tOE tOEPS tWP tASP(3) tSW tWP tCDSS tCDH tCDH tSCC tSPL tDH tAS tAH tAS tAH tSDS tSDH tSP tRDY tCDS tCDH (note1) tSCHW SC tSCS tDS tSP tDS tDH tDF tDF DQ0-7 0FH tRP R/ SA(1) SA(2) PD2048 PD2049 PD2111 40H HighZ DQ7=VOL DQ7=VOH (note3) HighZ tDB (note2) Notes : 1. The programming operation is not guaranteed when the number of the SC pulse exceeds 64. 2. Any commands, including reset command FFH, cannot be input while R/ is VOL. 3. The status returns to the Standby or the Output disable after R/ returns to HighZ. 4. By using program(3), data can be programmed additionally for each sector before erase. 26 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Program(4) and Status Data Polling Timing Waveforms tCOS tCES tCEH tCWC tOEWS tCE tCWC tWPH tWP tCDS tWP tOE tOEPS tWPH tWP tCDSS tRDY tASP (4) tWP tCDS tSW tCDS tCDH tCDH tWSD tSCC tSPL tCDH tSCHW (note1) SC tSCS tDS tDH tAS tAH tAS tAHtSDS tSDH tSP tSP tDS tDH tDF tDF DQ0-7 11H SA(1) SA(2) tDBR PD0 PD1 tRS tRP HighZ R/ PD2111 40H DQ7=VOL DQ7=VOH (note3) HighZ tDB (note2) tRBSY Notes : 1. The programming operation is not guaranteed when the number of the SC pulse exceeds 2112. 2. Any commands, including reset command FFH, cannot be input while R/ is VOL. 3. The status returns to the Standby or the Output disable after R/ returns to HighZ. 4. By using program(4), data can be rewritten for each sector. 27 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY 28 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY 29 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY ID and Status Register Read Timing Waveforms tCOH (note1) tCOH tCOS (note1) tCES tOEPS tOEWS tCDOH tWP tCDS tCDH tSCHW SC tCDAC tSCS tDS tDH tCDAC tSCS tDF tOE tCDF tOE tDF tCDF DQ0-7 90H tRP Manufacturer Device Manufacturer Code Code Code Status Register HighZ R/ Note : 1. The status returns to the Standby at the rising edge of 30 . Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Data Recovery Read Timing Waveforms tCOH (note1) tCES tCPH tCWHR tOEWS tCEH tOER tCDOS tWP tCDH tWP tCDH tOES tWSDR tCDS tSCC tSCC (note2) tSOH tCDS SC tSCS tDS tDH tSP tSPL tSAC tSAC tOEL tSAC tSH tSH tSAC tDF tDS tDH (note3) DQ0-7 tRP 01H D0out D1out D2111out (note2) FFH HighZ R/ Note 1. The status returns to the Standby at the rising edge of . 2. Output data is not valid after the number of the SC pulse exceeds 2112 and 64 in the Data Recovery Read mode. 3. The status can return to the Ready after the command FFH is input. 31 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Data Recovery Write and Status Data Polling Timing Waveforms tCOS tCEH tCES tCE tOE tCWC tOEWS tCWC tWPH tCWC tWPH tOEPS tWPH tASP(4) tRDY tCDS tWP tCDH tWP tCDS tWP tCDS tCDS tWP tCDH tSCHW tCDH SC tSCS tDS tDH tAS tAH tAS tAH tDS tDH tDF tDF DQ0-7 12H SA(1) SA(2) 40H DQ7=VOL DQ7=VOH tDB tRP R/ (note2) HighZ HighZ (note1) Note : 1. Any commands, including reset command FFH, cannot be input while R/ outputs a VOL. 2. The status returns to the Standby or the Output disable after R/ returns to HighZ. 32 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY 33 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Function Description Status Register The M5M29F25611 outputs the operation status data as follows: DQ7 pin outputs a VOL to indicate that the memory is in either erase or program operation. The level of DQ7 pin turns to a VOH when the operation finishes. DQ5 and DQ4 pins output VOLs to indicate that the erase and program operations are successfully completed or not, respectively. If these pins output VOHs, it indicates that these operations have timed out. When these pins are monitored, DQ7 pin must turn to a VOH. To execute other erase and program operation, the status data must be cleared after a time out occurs. From DQ0 to DQ3 and DQ6 pins are reserved for future use. The pins output VOLs and should be masked out during the status data read mode. The function of the status register is summarized in the following table. Table 1. Flag Definition DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 34 Ready/Busy Reserved Erase Check Program Check Reserved Reserved Reserved Reserved Definition "VOH" = Ready "VOL" = Busy Outputs a VOL and should be masked out during the status data polling mode. "VOH" = Fail "VOL" = Pass "VOH" = Fail "VOL" = Pass Outputs a VOL and should be masked out during the status data polling mode. Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Notes Unusable Sector Initially, the M5M29F25611 contains unusable sectors.Due to the nature of the device architecture, the device can also be screened and tested for partial invalid sectors for selected systems that can utilize the devices. 1. Tested for partial invalid sectors. The usable sectors were programmed the following data. Column address 820H 821H 822H 823H 824H 825H Data 1CH 71H C7H 1CH 71H C7H 2. No erase and program for the partial invalid sectors by the system. Item Min 16,057 (98%) Usable sectors (initially) Enable High System Reliability The device may fail during a program or erase operation due to program or erase cycle. The following architecture will enable high system reliability if a failure occurs. 1. Error in read : Error correction that more than 3 bit error correction per each sector read is required for data reliability. 2. Error in program or erase operation : The device may fail during a program or erase operation due to program or erase cycle. The status register indicates that the program and erase operations are successfully completed or not. After every program and erase operations, read status register to confirm the program and erase operations are successfully completed. When the error happens in sector, try to reprogram the data into another sector. Then, prevent further system access to sector that error happens. Typically, recommended number of a spare sectors are 1.8% within initial usable 16,057 sectors by each device.If the number of failed sectors exceed the number of the spare sectors,usable data area in the device decreases.In the case of reprogramming to the spare sector ,do not use the data from the failed sector.The reprogram data must be the data reloaded from outer buffer,or use the Data recovery read mode or the Data recovery write mode(see the "Mode Description").To avoid consecutive sector failurechoose addresses of spare sectors as far as possible from the failed sectors. 5 3. The write/erase endurance is 1 x 10 cycles. 35 Rev.2.3.1 2001.2.2 MITSUBISHI LSIs M5M29F25611VP MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY Keep safety first in your circuit designs! Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any intellectual property rights , or any other rights, belonging to Mitsubishi Electric Corporation or a third party. Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Mitsubishi Electric Corporation by various means, including the Mitsubishi Semiconductor home page (http://www.mitsubishichips.com). When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein. 36 Rev.2.3.1 2001.2.2