19-1308; Rev 1; 10/98 UAL IT MAN TION K A ET U E L H A S EV TA WS DA FOLLO Digitally Controlled Fuel-Gauge Interface The MAX1660 digitally controlled fuel-gauge interface executes two essential functions for rechargeable battery-pack management: fuel gauging and pack overcurrent protection. It accurately monitors a battery pack’s charge and discharge current flow, and records each using two independent, on-board Coulomb counters. Each counter’s contents are externally accessible via a System Management Bus (SMBus™)-compatible 2-wire serial interface. An optional third wire interrupts the microcontroller (µC) when the charge or discharge counters reach a preset value, or when an overcurrent condition (charge or discharge) occurs. In the event of an overcurrent or short-circuit condition, the MAX1660 disconnects the load and alerts its host. The MAX1660’s flexibility allows accurate fuel gauging for any battery chemistry, using any desired control algorithm. The MAX1660 operates with battery voltages from +4V to +28V and provides two micropower shutdown modes, increasing battery lifetime. To minimize total parts count, the device integrates a precision 2.00V system-reference output, a 3.3V linear-regulator output that can supply up to 5mA to power external circuitry, and a power-on reset output for the system µC. The MAX1660 is available in a 16-pin QSOP package. ____________________________Features ♦ 1% Accuracy over a 600µA to 4A Current Range (RSENSE = 30mΩ) ♦ 5µV Input Offset Voltage (28µV max) ♦ SMBus 2-Wire (plus optional interrupt) Serial Interface ♦ 2.00V Precision System Reference Output ♦ 3.3V Linear-Regulator Output Powers External Circuitry ♦ Two Micropower Shutdown Modes ♦ Independent 32-Bit Charge and Discharge Coulomb Counters ♦ Battery-Overcharge/Overdischarge Protection ♦ Battery Short-Circuit/Overcurrent Protection ♦ On-Board Power MOSFET Drivers ♦ 80µA Quiescent Current ♦ <1µA Shutdown Current ♦ Small 16-Pin QSOP Package (same board area as 8-pin SO) Ordering Information ________________________Applications Smart-Battery Packs Battery-Pack Overcurrent Protection Industrial-Control System Interfaces Battery-Pack Fuel Gauging Digital Current-Sense Instrumentation Analog-to-Digital Conversion PART MAX1660EEE TEMP. RANGE PIN-PACKAGE -40°C to +85°C 16 QSOP Pin Configuration appears at end of data sheet. ___________________________________________________Typical Operating Circuit PACK+ OCO CS RCS AGND BATT ODO SHDN VL VCC MAX1660 GND REF µC OCI ODI SCL SDA INT RST GND PACK- SMBus is a trademark of Intel Corp. *Patent pending ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX1660* General Description MAX1660* Digitally Controlled Fuel-Gauge Interface ABSOLUTE MAXIMUM RATINGS BATT, ODO, OCO, SHDN to GND .........................-0.3V to +30V SCL, SDA, INT, RST to GND ....................................-0.3V to +6V REF, ODI, OCI to GND..................................-0.3V to (VL + 0.3V) VL to GND ................................................................-0.3V to +6V CS to GND...................................................................-2V to +6V AGND to GND .............................................................-1V to +1V Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.3mW/°C above +70°C).............667mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +165°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1µF, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 28 V 80 135 SUPPLY AND REFERENCES BATT Input Voltage Range VBATT 4 V SHDN = 3.3V, SOFTSHDN = 0, IVL = 0 BATT Supply Current IBATT V SHDN = 3.3V, SOFTSHDN = 1, IVL = 0 V SHDN ≤ 0.4V VL Output Voltage VVL REF Output Voltage VREF 30 1 µA SOFTSHDN = 0, 0 ≤ IVL ≤ 5mA 3.1 3.25 3.4 SOFTSHDN = 1, 0 ≤ IVL ≤ 5mA 3.1 3.25 3.6 IREF = 0 1.96 2.00 2.04 V 10 50 µV/µA 0 ≤ IREF ≤ 200µA REF Load Regulation 15 0.02 V FUEL GAUGE CS to AGND Input Resistance 100 Discharge Coulomb-Counter Accumulation Rate VCS = 0 Charge Coulomb-Counter Accumulation Rate VCS = 0 VCS = -120mV VCS = 120mV kΩ 0 2 12 49,500 50,000 50,500 counts/ sec 0 2 12 49,500 50,000 50,500 counts/ sec -7 0 7 mV -1 0.01 1 µA OVERCURRENT COMPARATOR OCI, ODI Input Offset Voltage OCI, ODI Input Offset Current (Note 1) Propagation Delay 1 ODO Sink Current VODO = 0.4V ODO Off-Leakage Current VODO = 28V OCO Sink Current VOCO = 0.4V OCO Off-Leakage Current VOCO = 28V 1 2.5 0.01 1 µs mA 1 2.5 0.01 µA mA 1 µA INTERFACE-LOGIC LEVELS SHDN, SCL, SDA Input High Voltage VIH 2.2 V Input Low Voltage VIL SDA Output Low Sink Current VOL VSDA = 0.6V 6 mA INT Output Low Sink Current VOL V INT = 0.4V 2 mA SCL, SDA 0.8 SHDN 0.6 *Patent pending 2 _______________________________________________________________________________________ V Digitally Controlled Fuel-Gauge Interface (V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1µF, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL SCL, SDA, INT, RST Leakage Current SHDN Input Bias Current I SHDN CONDITIONS MIN TYP MAX UNITS Output forced to 5V 0.01 1 µA SHDN forced to 3.6V 0.7 3.0 SHDN forced to 28V 20 100 RST Active Timeout Period 25 RST Output Voltage V RST RST Threshold Voltage VTH1, VTH2 µA ms VVL = 1V, ISINK = 50µA 0.3 VVL = 3V, ISINK = 1.2mA 0.3 VTH2, VL falling 1.0 1.7 2.2 VTH1, VL rising 2.75 2.90 3.05 V V ELECTRICAL CHARACTERISTICS (V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1µF, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 28 V SUPPLY AND REFERENCES BATT Input Voltage Range BATT Supply Current VBATT IBATT VL Output Voltage VVL REF Output Voltage VREF REF Load Regulation 4 V SHDN = 3.3V, SOFTSHDN = 0, IVL = 0 135 V SHDN = 3.3V, SOFTSHDN = 1, IVL = 0 30 V SHDN ≤ 0.4V 1 µA SOFTSHDN = 0, 0 ≤ IVL ≤ 5mA 3.1 3.4 SOFTSHDN = 1, 0 ≤ IVL ≤ 5mA 3.1 3.6 IREF = 0 1.96 2.04 V 50 µV/µA 12 counts/ sec 0 ≤ IREF ≤ 200µA V FUEL GAUGE Discharge Coulomb-Counter Accumulation Rate VCS = 0 Charge Coulomb-Counter Accumulation Rate VCS = 0 0 VCS = -120mV VCS = 120mV 0 12 49,250 50,750 counts/ sec OVERCURRENT COMPARATOR OCI, ODI Input Offset Voltage -10 10 mV OCI, ODI Input Offset Current (Note 1) -1 1 µA ODO Sink Current VODO = 0.4V 1 ODO Off-Leakage Current VODO = 28V OCO Sink Current VODO = 0.4V OCO Off-Leakage Current VODO = 28V mA 1 1 µA mA 1 µA *Patent pending _______________________________________________________________________________________ 3 MAX1660* ELECTRICAL CHARACTERISTICS (continued) MAX1660* Digitally Controlled Fuel-Gauge Interface ELECTRICAL CHARACTERISTICS (continued) (V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1µF, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS INTERFACE-LOGIC LEVELS Input High Voltage SHDN, SCL, SDA VIH 2.2 V SCL, SDA 0.8 SHDN 0.6 Input Low Voltage VIL SDA Output Low Sink Current VOL VSDA = 0.6V 6 mA INT, RST Output Low Sink Current VOL VINT = 0.4V 2 mA SCL, SDA, INT, RST Leakage Current Output forced to 5V SHDN Input Bias Current ISHDN RST Output Voltage VRST RST Threshold Voltage VTH1, VTH2 1 SHDN forced to 3.6V 3.0 SHDN forced to 28V 120 VVL = 1V, ISINK = 50µA 0.3 VVL = 3V, ISINK = 1.2mA 0.3 VTH2, VL falling 1.0 2.2 VTH1, VL rising 2.75 3.05 V µA µA V V TIMING CHARACTERISTICS (TA = 0°C to +85°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Serial-Clock High Period tHIGH 4 µs SCL Serial-Clock Low Period tLOW 4.7 µs Start-Condition Setup Time tSU:STA 4.7 µs Start-Condition Hold Time tHD:STA 4 µs SDA Valid to SCL Rising-Edge Setup Time, Slave Clocking in Data tSU:DAT 800 ns SCL Falling Edge to SDA Transition tHD:DAT 0 ns SCL Falling Edge to SDA Valid, Master Clocking in Data tDV *Patent pending 4 _______________________________________________________________________________________ 1 µs Digitally Controlled Fuel-Gauge Interface (TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Serial-Clock High Period tHIGH 4 µs SCL Serial-Clock Low Period tLOW 4.7 µs Start-Condition Setup Time tSU:STA 4.7 µs Start-Condition Hold Time tHD:STA 4 µs SDA Valid to SCL Rising-Edge Setup Time, Slave Clocking in Data tSU:DAT 800 ns SCL Falling Edge to SDA Transition tHD:DAT 0 ns SCL Falling Edge to SDA Valid, Master Clocking in Data tDV 1 µs Note 1: OCI and ODI are MOSFET inputs. Minimum and maximum limits are for production screening only. Actual performance is indicated in typical value. Note 2: Specifications to -40°C are guaranteed by design, not production tested. START CONDITION MOST SIGNIFICANT ADDRESS BIT (A6) CLOCKED INTO SLAVE A5 CLOCKED INTO SLAVE A3 CLOCKED INTO SLAVE A4 CLOCKED INTO SLAVE SCL tHIGH tLOW tHD:STA SDA tSU:STA tSU:DAT tSU:DAT tHD:DAT tHD:DAT Figure 1. SMBus Serial-Interface Timing—Address ACKNOWLEDGE BIT CLOCKED INTO MASTER RW BIT CLOCKED INTO SLAVE MOST SIGNIFICANT BIT OF DATA CLOCKED INTO MASTER SCL SLAVE PULLING SDA LOW SDA tDV tDV Figure 2. SMBus Serial-Interface Timing—Acknowledge *Patent pending _______________________________________________________________________________________ 5 MAX1660* TIMING CHARACTERISTICS __________________________________________Typical Operating Characteristics (VBATT = V SHDN = 12V, CREF = 10nF, CVL = 0.1µF, TA = +25°C, unless otherwise noted.) SHDN = GND TA = +25°C 80 70 TA = -40°C SUPPLY CURRENT (µA) 18 TA = +85°C TA = +85°C 17 TA = +25°C 16 15 14 13 TA = -40°C 0.04 TA = +25°C TA = +85°C 0.03 0.02 12 60 MAX1660-03 0.05 MAX1660-02 SOFTSHDN = 1 19 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 20 MAX1660-01 100 90 SHUTDOWN SUPPLY CURRENT vs. VBATT SHUTDOWN SUPPLY CURRENT vs. VBATT SUPPLY CURRENT vs. VBATT TA = -40°C 11 0.01 10 50 8 12 16 20 24 4 28 8 12 20 24 4 28 12 16 3.27 24 28 FREQUENCY vs. INPUT VOLTAGE 8 MAX1660 05 2.004 MAX1660-04 3.30 20 VBATT (V) REFERENCE VOLTAGE vs. REFERENCE LOAD CURRENT VL VOLTAGE vs. VL LOAD CURRENT 6 3.21 VOLTAGE (V) TA = -40°C TA = +25°C FREQUENCY (Hz) 2.002 3.24 2.000 TA = -40°C TA = +25°C 1.998 4 INPUT OFFSET FREQUENCY 2 0 INPUT OFFSET VOLTAGE TA = +85°C 1.996 -2 TA = +85°C 3.15 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -4 1.994 0 LOAD CURRENT (mA) IDEAL CHGCOUNT 0 DISCOUNT 60 90 120 150 -360 -240 0 120 -120 INPUT VOLTAGE (mV) 240 360 CONVERSION GAIN (Hz/mV) MAX1660-07 MEASURED 90 30 -5 0 5 10 INPUT VOLTAGE (µV) CONVERSION GAIN vs. INPUT VOLTAGE FREQUENCY vs. INPUT VOLTAGE 60 -10 LOAD CURRENT (µA) 150 120 -15 20 40 60 80 100 120 140 160 180 200 456 452 448 444 440 436 432 428 424 420 416 412 408 404 MAX1660-08 3.18 30 8 VBATT (V) VBATT (V) VL VOLTAGE (V) 16 MAX1660-06 4 FREQUENCY (kHz) MAX1660* Digitally Controlled Fuel-Gauge Interface UNCORRECTED* 275:1 OFFSET CORRECTED* 6000:1 0.001 0.01 0.1 1 10 INPUT VOLTAGE (mV) *Patent pending *SEE INTERNAL OFFSET MEASUREMENT SECTION 6 _______________________________________________________________________________________ 100 1000 Digitally Controlled Fuel-Gauge Interface PIN NAME FUNCTION 1 INT Open-Drain Host-Interrupt Output. INT sinks current when active, otherwise high-impedance (see INT Output section). INT is compatible with the SMBus SMBALERT# (the “#” indicates asserted low) signal. Connect a 100kΩ pull-up resistor between INT and VL. Leave INT unconnected if host interrupt is not used. 2 SHDN 3 N.C. 4 CS 5 AGND 6 REF 2.00V Reference Output. Bypass REF to AGND with a 10nF capacitor (see Internal Regulator and Reference section). 7 ODI Discharge Overcurrent-Detection Input (see Overcurrent Detection section) 8 OCI Charge Overcurrent-Detection Input (see Overcurrent Detection section) 9 GND Ground 10 VL 11 BATT Supply Input 12 ODO High-Voltage, Open-Drain MOSFET Gate-Driver Output. ODO controls activation of the battery-discharge path (see OCO and ODO Gate Drivers section). 13 OCO High-Voltage, Open-Drain MOSFET Gate-Driver Output. OCO controls activation of the battery-charge path (see OCO and ODO Gate Drivers section). 14 RST Active-Low Reset Output. Connect a 100kΩ pull-up resistor between RST and VL. Leave RST unconnected if the power-on reset function is not used (see RST Output section). 15 SDA Serial-Data Input/Output. Connect a 10kΩ resistor between SDA and VL (see SMBus Interface section). 16 SCL Serial-Clock Input. Connect a 10kΩ resistor between SDA and VL (see SMBus Interface section). Active-Low Shutdown Input (see Shutdown Modes section) No Connection. Not internally connected. Current-Sense Resistor Input Analog Ground 3.3V Linear-Regulator Output. Bypass VL with a 0.33µF capacitor to GND (see Internal Regulator and Reference section). _______________Detailed Description The MAX1660 measures the cumulative charge into (charging) and out of (discharging) the system battery pack and stores the information in one of two internal, independent charge and discharge counters. It achieves battery-pack overcharge and overdischarge protection through a powerful digital compare function that interrupts the host CPU when the charge or discharge counter reaches a host-programmed value. The device also informs the host of changes in the direction of current flow and protects the battery pack from short-circuit and overcurrent conditions. The MAX1660 incorporates a 2-wire System Management Bus (SMBus™)-compliant serial interface, allowing access to charge/discharge counters and internal registers. An optional third wire provides an SMBALERT#-compliant interrupt signal, or it may be used as a simple, stand-alone host interrupt. Coulomb-Counting Interface The MAX1660’s Coulomb-counting interface monitors the charge flowing in either the charging or discharging direction, and counts the Coulombs of charge by incrementing either the charge counter (CHGCOUNT) or the discharge counter (DISCOUNT) accordingly. The number of counter increments generated per Coulomb of charge sensed (conversion gain) is given by the following equation: A C = 416.7 ⋅ 3 10 RCS Counts Coulomb where RCS is the current-sense resistor (see the Typical Operating Circuit). The gain factor is the constant of proportionality that relates the counter values stored in CHGCOUNT and DISCOUNT to the amount of charge flow into or out of the battery pack. A higher conversion gain (larger RCS) increases resolution at low currents, *Patent pending _______________________________________________________________________________________________________ 7 MAX1660* ______________________________________________________________Pin Description MAX1660* Digitally Controlled Fuel-Gauge Interface but limits the maximum measurable current. Likewise, a smaller conversion gain (smaller RCS) decreases resolution at low currents, but increases the maximum measurable current. A 30mΩ current-sense resistor (AC = 12.5 x 103 counts per Coulomb) provides a good balance between resolution and input current range for many applications. With this current-sense resistance, the MAX1660 typically measures currents from 600µA to 4A with better than 1% accuracy (see the section Choosing RCS). Execute the ReadCount01 and ReadCount23 commands to read the active counter’s contents at any time (Table 2). Since the Read-Word protocol supports only 16-bit data transfers, issue these commands sequentially to read the entire 32-bit COUNT register. First issue ReadCount01 to read COUNT0 and COUNT1, and then issue ReadCount23 to read COUNT2 and COUNT3. Executing ReadCount01 enables updating of the COUNT register; the COUNT register updates on SCL’s falling edge after the command-byte ACK bit Charge and Discharge Counters Figure 3 shows the functional diagram of the MAX1660’s Coulomb-counter section. The Coulomb counter’s output increments (but never decrements) one of two independent 32-bit counters: CHGCOUNT for charging currents, and DISCOUNT for discharging currents. By independently counting the charge and discharge currents, the MAX1660 can accommodate any algorithm to account for a battery pack’s energy-conversion efficiency. A 2x1 multiplexer, gated by the configuration word’s SETCOUNT bit, determines which counter’s contents are passed to the COUNT register when COUNT updates. The 32-bit COUNT register is divided into 4 bytes: COUNT0 (the least significant) through COUNT3 (the most significant). See Table 1 for a description of the different registers. CHGCOUNT and DISCOUNT reset to zero whenever a power-on reset executes, or when the configuration word’s CLRCOUNTER bit is set. Each counter also resets any time an overflow condition occurs. The counters’ 32-bit capacity allows them to continually monitor 4A for almost 24 hours before overflowing (with RCS = 30mΩ). When a counter overflows, it simply clears and begins counting from 0; no interrupts are generated. COULOMB COUNTER DIRINTENABLE OFFSETMEAS CHGCOUNT DIRCHANGE CHARGESTATUS DISCOUNT CLRCOUNTER 32 SETCOUNT 32 ReadCount01 2 x 1 MUX COUNTSTATUS ReadCount23 LATCH LOGIC MUXOUT 32 8 8 8 8 COUNT3 COUNT2 COUNT1 COUNT0 8 8 8 8 SMB INTERFACE Figure 3. Coulomb Counter Functional Diagram Table 1. Register Descriptions REGISTER NAME DESCRIPTION CHGCOUNT The 32-bit counter that accumulates the number of units of charge that have passed through RCS in the charging direction since CHGCOUNT was last cleared. CHGCOUNT clears on a power-on reset, or when the configuration word’s CLEARCOUNTER bit is set. CHGCOUNT is unaffected by discharging currents. DISCOUNT The 32-bit counter that accumulates the number of units of charge that have passed through RCS in the discharging direction since DISCOUNT was last cleared. DISCOUNT clears on a power-on reset, or when the configuration word’s CLEARCOUNTER bit is set. DISCOUNT is unaffected by charging currents. COUNT The 32-bit register that stores the value held in the counter selected by the configuration word’s SETCOUNT bit when updating has been enabled by the ReadCount01 command. Data transfers to COUNT from the selected CHGCOUNT or DISCOUNT register whenever the MAX1660’s SMBus interface detects a new command. See the Charge and Discharge Counters section. COMP The 32-bit register that stores the host-defined COUNT threshold. The contents of COMP are continuously compared with the contents of either CHGCOUNT or DISCOUNT (whichever is selected by the SETCOUNT bit) for equality. When an equality occurs, the configuration word’s COMPSTATUS bit is set, and an interrupt is generated (INT goes low). *Patent pending 8 _______________________________________________________________________________________ Digitally Controlled Fuel-Gauge Interface MAX1660* Table 2. Read Word Commands COMMAND NAME COMMAND CODE ReadCount01 0x82 Enables updating of the COUNT register; returns COUNT0 in the LSB and COUNT1 in the MSB of the Read-Word protocol. COUNT updating remains enabled until the ReadCount23 command is executed. See the Charge and Discharge Counters section. ReadCount23 0x83 Disables COUNT register updating; returns COUNT2 in the LSB and COUNT3 in the MSB of the Read-Word protocol. See the Charge and Discharge Counters section. ReadStatus() 0x84 Returns the status word’s contents in the Read-Word protocol’s LSB. The MSB’s contents are all 1s. See Table 5 for a description of the status bits. DESCRIPTION clocks in (Figure 4). COUNT0 returns in the least significant byte (LSB), and COUNT1 returns in the most significant byte (MSB) of the Read-Word protocol. After the ReadCount01 command is executed (updating is enabled), any command executed by the MAX1660 prior to execution of the ReadCount23 command updates the COUNT contents, potentially corrupting the data read by ReadCount23 (if a 16th-bit carry occurs). ReadCount23 disables COUNT updating and then returns COUNT2 and COUNT3 in the Read-Word protocol’s LSB and MSB. To ensure proper execution, issue these commands in the correct order, with no commands executed between them (ReadCount01 first, followed by ReadCount23). ACKNOWLEDGE BIT CLOCKED INTO MASTER SCL SDA ANY COMMAND BYTE MAX1660 PULLING SDA LOW Digital Compare Function The MAX1660’s digital compare function simplifies implementation of end-of-charge and end-of-discharge detection, relieving the host from having to constantly monitor the counters. The host simply programs a value into the COMP register, and the MAX1660 generates an interrupt (INT goes low) when this condition is met. Figure 5 shows the MAX1660’s digital compare section functional diagram. When the digital compare function is enabled, the MAX1660 continuously compares the contents of the counter selected by the configuration word’s SETCOUNT bit with the 32-bit word stored in the COMP register (Table 1). The 32-bit COMP register is divided into 4 bytes: COMP0 (the least significant) through COMP3 (the most significant). When COMP is equal to MUXOUT, the configuration word’s COMPSTATUS bit is set, and the MAX1660 generates an interrupt (INT goes low). The host defines any action taken as a result of this interrupt. The COMP register contents remain valid until either the host redefines the value stored in COMP, or a power-on reset is executed. Executing a power-on reset disables the digital compare function. Enable the digital compare function by setting the configuration word’s COMPENABLE bit. COUNT REGISTER UPDATED Figure 4. COUNT Register Updating INT DIRCHANGE OCSTATUS ODSTATUS COMPSTATUS CLRINT 32 COMP3 COMP2 COMP1 COMP0 8 8 Q CHG D DIS CLR POWER-ON RESET 8 8 DIGITAL COMPARE COULOMB COUNTER 32 MUXOUT DIRINTENABLE SMB INTERFACE Figure 5. Digital Compare Section Functional Diagram *Patent pending _______________________________________________________________________________________ 9 MAX1660* Digitally Controlled Fuel-Gauge Interface Use the WriteComp01 and WriteComp23 commands to define the COMP register contents (Table 3). Since the Write-Word protocol supports only 16-bit data transfers, sequentially execute these commands to write the entire 32-bit COMP word. First execute WriteComp01 to write COMP0 and COMP1, and then execute WriteComp23 to write COMP2 and COMP3. Executing WriteComp01 internally disables the COMPINT interrupt and writes the Write-Word protocol’s LSB into COMP0 and its MSB into COMP1. The COMPINT interrupt disables on SCL’s 18th rising edge during WriteComp01 execution (Figure 6). Executing WriteComp23 writes the Write-Word protocol’s LSB and MSB into COMP2 and COMP3, and enables the COMPINT interrupt. The COMPINT interrupt reenables on the falling edge following SCL’s 36th rising edge during WriteComp23 execution. Disabling the COMPINT interrupt with the WriteComp01 command prevents an erroneous interrupt, due to incomplete data in the COMP register. To ensure proper execution, issue these commands in the correct sequence. Direction-Change Detection Function The MAX1660’s direction-change detection function informs the host whenever the current flow changes direction. When it is used in conjunction with the MAX1660’s digital compare function and CHARGESTATUS bit in end-of-charge and end-of-discharge detection routines, the host can ensure that the digital compare function continues to monitor the proper counter when the current flow changes direction. The direction-change function is simple: the status word’s DIRCHANGE bit sets any time the current flow changes direction. Once DIRCHANGE is set, it remains set until it is cleared; additional changes in the currentflow direction do not affect the bit. To clear the DIRCHANGE bit, write a 1 to the configuration word’s CLRINT bit. DIRCHANGE also clears when the MAX1660 enters soft-shutdown mode and after a power-on reset. In end-of-charge and end-of-discharge routines, in which the host must be informed immediately of a change in current-flow direction, set the configuration word’s DIRINTENABLE bit to generate an interrupt whenever the status word’s DIRCHANGE bit is set. Table 3. Write-Word Commands COMMAND NAME COMMAND CODE DESCRIPTION WriteComp01 0x00 Disables the COMPINT interrupt; writes the Write-Word protocol’s LSB into COMP0 and its MSB into COMP1. WriteComp23 0x01 Writes the Write-Word protocol’s LSB into COMP2 and its MSB into COMP3, and enables the COMPINT interrupt. WriteConfig() 0x04 Writes the Write-Word protocol’s data bytes into the configuration word. See Table 6 for a description of the configuration bits. 18TH RISING EDGE OF SCL DURING WriteComp01 WRITE-WORD PROTOCOL ACK BIT CLOCKED INTO HOST STOP CONDITION 36TH RISING EDGE OF SCL DURING WriteComp23 WRITE-WORD PROTOCOL ACK BIT CLOCKED INTO HOST STOP CONDITION SCL INTERRUPT DISABLES ON SCL’s RISING EDGE INTERRUPT ENABLES ON SCL’s FALLING EDGE SDA BOLD LINE INDICATES MAX1660 PULLING SDA LOW Figure 6. Automatic Interrupt Enable/Disable During COMP Update *Patent pending 10 ______________________________________________________________________________________ Digitally Controlled Fuel-Gauge Interface (the power-on-reset state), or the external FETs are forced off (the load is disconnected). Regardless of the OCLO and ODLO bit settings, the MAX1660 interrupts the host (INT goes low) if the current flow exceeds the overcurrent threshold. When OCHI = OCLO = 1 or ODHI = ODLO = 1, the corresponding overcurrent comparator operates in freerunning mode, driving OCO and ODO directly. When the current exceeds the overcurrent threshold, the appropriate MOSFET turns off, and when the current is below the overcurrent threshold, it turns on. Forcing the MOSFET off prevents current from flowing, which in turn decreases the current flow to below the overcurrent threshold. A persistent overcurrent condition, therefore, produces a pulsed output as the current flow repeatedly crosses the overcurrent threshold. In freerunning mode, INT pulls low when the first overcurrent condition occurs, and stays low until the interrupt is cleared, as described in the INT Output section. Operation in this mode requires that OCO and ODO be buffered to ensure fast MOSFET turn-off and slow MOSFET turn-on times. The relatively slow turn-off response of the OCO and ODO open-drain outputs alone is unsuitable for driving MOSFETs directly in this mode. a) DISCHARGING DIRECTION ODICMP ODO ODSTATUS ODI + S R OD Q ODO LOGIC POWER-ON ODLO RESET CLRINT ODHI b) CHARGING DIRECTION OCICMP OCO OCSTATUS OCI - CS + S R OC Q CLRINT OCO LOGIC POWER-ON OCLO RESET OCHI Figure 7. Overcurrent Comparator Section Functional Diagram *Patent pending ______________________________________________________________________________________ 11 MAX1660* Overcurrent Detection The MAX1660’s precision analog interface continuously monitors the input current to detect an overcurrent condition. Figure 7 shows the functional diagram of the overcurrent comparator section. An overcurrent condition occurs whenever the voltage on CS exceeds the voltage on OCI (for charging currents), or when ODI falls below ground (for discharging currents). When an overcurrent condition occurs, the overcurrent comparators generate an interrupt (INT goes low) and set the OD (discharging) or OC (charging) latch, which remains set until either the configuration word’s CLRINT bit is set, the MAX1660 enters softshutdown mode, or the MAX1660 initiates a power-on reset. The host defines any action taken upon receipt of this interrupt. A logic block follows the latch, which sets the gate-driver output’s appropriate state, as defined in Table 4, and drives the N-channel MOSFET open-drain gate drivers. Although the host has complete control over the MAX1660’s response to an overcurrent condition, take care to ensure adequate overcurrent protection. In general, the configuration word’s OCLO and ODLO bits should always remain cleared. This ensures that either the MAX1660 will be in overcurrent auto-detect mode MAX1660* Digitally Controlled Fuel-Gauge Interface Table 4a. OCO Logic Truth Table OCHI BIT OCLO BIT OCSTATUS BIT OCO OUTPUT 0 0 0 GND Automatic overcurrent protection (default) STATE 0 0 1 HI-Z Overcurrent detected 0 1 X GND Force-charge path on 1 0 X HI-Z Force-charge path off 1 1 X OCICMP Free running Table 4b. ODO Logic Truth Table ODHI BIT ODLO BIT ODSTATUS BIT ODO OUTPUT 0 0 0 GND Automatic overcurrent protection (default) 0 0 1 HI-Z Overcurrent detected 0 1 X GND Force-discharge path on 1 0 X HI-Z Force-discharge path off 1 1 X ODICMP M2 Free running PACK+ M1 R8 R7 R9 R10 OCO + STATE BATT VCC R11 ODO SERIAL EEPROM SCL SDA GND SHDN R2 CS MAX1660 VL RCS C5 VCC C1 C3 AGND GND C2 R13 R14 R15 R16 µC D1 REF R5 SCL SDA R3 OCI ODI R6 INT RST GPIO GPIO GPIO INT RST GND R4 C4 PACK- Figure 8. Typical Application Circuit *Patent pending 12 ______________________________________________________________________________________ Digitally Controlled Fuel-Gauge Interface RST Output RST is an open-drain, active-low power-on reset output provided for the MAX1660’s host controller and other external circuitry. RST drives low on power-up whenever the MAX1660 enters hard-shutdown mode, or whenever the VL regulator output is below VTH1 (typically 1.7V). In hard-shutdown mode, RST goes low and remains low as long as the VL regulator provides sufficient gate drive to the RST output switch (typically until VL falls to 1V), after which RST drifts slightly upward. On power-up or when exiting hard-shutdown mode, RST drives low until 25ms (typ) after VL exceeds VTH2 (typically 2.9V). Although RST offers a reliable poweron reset function, it does not detect brownout conditions (VTH1 < VL < VTH2). For applications that require brownout detection, refer to Maxim’s complete line of precision microprocessor supervisory products. Connect a 100kΩ pull-up resistor between RST and VL. Leave RST unconnected if the power-on reset function is not used. INT Output The MAX1660’s INT output drives an optional third wire that interrupts the host whenever an alert condition occurs. The MAX1660’s host-interrupt procedure is compatible with the SMBus SMBALERT# signal, but it is equally useful as a simple host-interrupt output. By default, an interrupt is triggered (INT is pulled low) any time an overcurrent condition occurs (see the Overcurrent Detection section). The MAX1660 may also be configured to generate an interrupt whenever a digital compare equality occurs and/or when a change in the current-flow direction is detected (see the Digital Compare Function and Direction-Change Detection Function sections). Once triggered, INT stays low until the interrupt is cleared. An interrupt is cleared when one of three conditions is true: a 1 is written into the configuration word’s CLRINT bit, the MAX1660 acknowledges the SMBus Alert Response Address (ARA), or a power-on reset occurs. The MAX1660 acknowledges the ARA with the 0 x 8F byte. INT is an open-drain output; connect a 100kΩ pull-up resistor between INT and VL. Alert Response Address (0001100) The Alert Response address provides quick fault identification for single slave devices that lack the complex, expensive logic needed to be a BusMaster. When a slave device generates an interrupt, the host (BusMaster) interrogates the bus slave devices via a special receive-byte operation that includes the Alert Response address. The data returned by this read-byte operation is the address of the interrupting slave device. The MAX1660 when interrupted, will respond with 0x8F. Internal Regulator and Reference The 3.3V VL internal linear regulator powers the MAX1660 control circuitry, logic, and reference, and can supply up to 5mA to power external loads, such as a microcontroller or other circuitry. Bypass VL to GND with a 0.33µF capacitor. The 2.00V precision reference (REF) is accurate to ±2%, making it useful as a system reference. REF can supply up to 200µA to external circuitry. Bypass REF to GND with a 10nF capacitor. Shutdown Modes Hard Shutdown Driving SHDN low puts the MAX1660 into hard-shutdown mode and forces the power-on reset state. In hard-shutdown mode, the VL regulator and the reference turn off, reducing supply current to 1µA (max). To protect the battery pack and load during the power-onreset timeout period, the OCO and ODO outputs are forced into their high-Z states. SHDN is a logic-level input, but can be safely driven by voltages up to VBATT. Soft Shutdown Drive the MAX1660 into soft-shutdown mode by setting the configuration word’s SHDNSTATUS bit. All interrupts clear in soft-shutdown mode. In this mode, only the VL regulator and the SMBus interface remain active, reducing the supply current to just 15µA. To prevent current from flowing undetected while the MAX1660 remains in soft-shutdown mode, ensure that the command to enter soft-shutdown mode contains a *Patent pending ______________________________________________________________________________________ 13 MAX1660* OCO and ODO Gate Drivers OCO and ODO are open-drain N-channel MOSFET outputs that drive the external P-channel MOSFET gates. Connect pull-up resistors in the 500kΩ to 1MΩ range from OCO and ODO to BATT to reduce current draw when OCO and ODO are driven low. For additional protection of OCO and ODO from voltage spikes coupled through the MOSFET gate capacitance, place 10kΩ resistors (R9 and R10) from OCO and ODO to the respective MOSFET gates (Figure 8). To protect the battery pack and load during power-up, OCO and ODO are forced into a high-Z state during the poweron-reset timeout period. Table 4 shows the truth tables defining the OCO and ODO output states with respect to the overcurrent comparators and the MAX1660’s configuration bits. low byte of 0xA (ODHI = OCHI = 1, ODLO = OCLO = 0) to force the FETs off and disconnect the load. The MAX1660 does not perform a power-on reset when exiting soft-shutdown mode. Rd A LEAST SIGNIFICANT BYTE A MOST SIGNIFICANT BYTE A STOP SLAVE ADDRESS A SCL START Figure 9. Write-Word and Read-Word Examples *Patent pending 14 ______________________________________________________________________________________ READ-WORD PROTOCOL SDA COMMAND CODE ACK CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 ACK W 1 1 1 0 0 0 1 Wr A WRITE-WORD PROTOCOL SDA SCL START REPEATED START SLAVE ADDRESS MOST SIGNIFICANT BYTE A COMMAND CODE A LEAST SIGNIFICANT BYTE A ACK D8 D9 D10 D11 D12 D13 D14 D15 ACK D0 D1 D2 D3 D4 D5 D6 D7 ACK CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 ACK W 1 1 1 0 0 0 1 Wr A ReadStatus() Command The host determines the MAX1660’s status by executing the ReadStatus() command. This command returns the MAX1660’s status, including the state of its interrupts, as well as the present direction of current flow. Table 5 describes each of the status word’s bits. Status information is retrieved from the MAX1660 using the Read-Word protocol; however, the device’s flexible implementation of the SMBus standard also allows the Receive-Byte protocol to be substituted when status is being read. When the MAX1660 receives a command, its command code is latched, remaining valid until it is overwritten by a new command code. When status information is repeatedly being read, polling time can be significantly decreased by using the Receive-Byte protocol to read the status word’s LSB after the initial ReadStatus() command. STOP ACK D8 D9 D10 D11 D12 D13 D14 D15 ACK D0 D1 D2 D3 D4 D5 D6 D7 ACK R 1 1 1 0 0 0 1 BOLD LINE INDICATES THAT MAX1660 PULLS SDA LOW SMBus Interface The MAX1660’s 2-wire serial interface is compatible with Intel’s SMBus interface. An interrupt output (INT) allows the MAX1660 to immediately interrupt its host in the event of an overcurrent condition. This interrupt complies with the SMBALERT# signal of the SMBus specification. Although each of the MAX1660’s pins are designed to protect against ±2kV ESD strikes, SDA and SCL pins have extended ESD-protection structures designed to provide protection for ±4kV ESD. The MAX1660 operates as an SMBus slave only, never as a master. It does not initiate communication on the bus; it only receives commands and responds to queries for status information. Although the MAX1660 offers the host an array of configuration commands, providing complete control over many of its functions, it performs its functions automatically. The host needs to communicate with the MAX1660 only to retrieve data and change configurations as necessary. Each communication with the MAX1660 begins with a start condition, defined as a falling edge on SDA with SCL high. The device address follows the start condition. The MAX1660 device address is fixed at 0b1000111 (where 0b indicates a binary number), which may also be denoted as 0x8E (where 0x indicates a hexadecimal number) for Read-Word commands, or 0x8F for Write-Word commands. Figure 9 shows examples of SMBus Write-Word and Read-Word protocols. SLAVE ADDRESS MAX1660* Digitally Controlled Fuel-Gauge Interface Digitally Controlled Fuel-Gauge Interface MAX1660* Table 5. ReadStatus( ) Bit Functions BIT NAME BIT POSITION POWER-ON RESET STATE — 15 1 Unused. Always returns 1. — 14 1 Unused. Always returns 1. — 13 1 Unused. Always returns 1. — 12 1 Unused. Always returns 1. — 11 1 Unused. Always returns 1. — 10 1 Unused. Always returns 1. — 9 1 Unused. Always returns 1. — 8 1 ODSTATUS 7 0 OCSTATUS 6 0 COMPSTATUS 5 0 Unused. Always returns 1. Overcurrent-Interrupt Status. This bit sets when an overcurrent condition occurs in the discharging direction. This bit clears in soft shutdown, following a power-on reset, or when the configuration word’s CLRINT bit is set. Overcurrent-Interrupt Status. This bit sets when an overcurrent condition occurs in the charging direction. This bit clears in soft shutdown, following a power-on reset, or when the configuration word’s CLRINT bit is set. COMPINT-Interrupt Status. This bit sets upon generation of the COMPINT interrupt. This bit clears in soft shutdown, on a power-on reset, or when the configuration word’s CLRINT bit is set. COUNTSTATUS 4 — SETCOUNT Status Indicator. This bit sets when the configuration word’s SETCOUNT bit is set. This bit clears when SETCOUNT clears. SHDNSTATUS 3 0 Soft-Shutdown Status Indicator. Returns 1 when the device is in soft-shutdown mode; returns 0 when it is not in soft-shutdown mode. CHARGESTATUS 2 0 Charge-Status Indicator. This bit sets upon detection of charging current. The bit clears upon detection of discharging current. DIRCHANGE 1 0 — 0 — DESCRIPTION The bit sets when the current flow changes direction. This bit clears when the configuration word’s CLRINT or SOFTSHDN bit is set, or following a power-on reset. See Direction-Change Detection Function section. Unused. Always returns 1. WriteConfig() Command The host configures the MAX1660 using the WriteConfig() command. Table 6 describes each of the configuration word’s bits. Applications Information Choosing RCS For greatest accuracy, choose RCS to ensure that the product of the maximum current to be measured (IMAX) and RCS does not exceed 120mV. Calculate the proper sense-resistor value as follows: RCS = 120mV IMAX where IMAX is the maximum current to be accurately measured. Use only surface-mount metal-film resistors; wire-wound resistors are too inductive to provide ac- ceptable results. Be sure to consider power dissipation when choosing the current-sense resistor to avoid resistor self-heating. Setting the Overcurrent Threshold Set the current at which the voltage on CS exceeds the voltage on OCI with a voltage divider placed between REF and GND (Figure 10a). To set the overcharge threshold, choose R5 in the 1MΩ range and calculate R6 from: R6 = R5 VREF - 1 I CHG,MAXRCS where VREF = 2.00V, ICHG,MAX is the maximum allowable charging current, and RCS is the current-sense resistor value. *Patent pending ______________________________________________________________________________________ 15 MAX1660* Digitally Controlled Fuel-Gauge Interface Table 6. WriteConfig( ) Bit Functions BIT NAME BIT POSITION POWER-ON RESET STATE — 15 — Unused — 14 — Unused — 13 — Unused — 12 — Unused — 11 — DIRINTENABLE 10 0 Unused Direction-Change Interrupt Enable. Set this bit to enable direction-change interrupt generation. Clear this bit to disable this function. See the DirectionChange Detection Function section. SOFTSHDN 9 0 Soft-Shutdown Enable. Set this bit to enable soft shutdown. Clear this bit to resume normal operation. See the Shutdown Modes section. CLRCOUNTER 8 — Clear Counter. Write 1 to clear both CHGCOUNT and DISCOUNT. CLRINT 7 — Clear Interrupts. Write 1 to clear ODSTATUS, OCSTATUS, COMPSTATUS, and DIRCHANGE. SETCOUNT 6 0 OFFSETMEAS 5 0 COMPENABLE 4 0 the Compare-Interrupt Enable. Set this bit to enable the digital compare function. Clear this bit to disable this function. See the Digital Compare Function section. ODHI 3 0 First of two bits controlling the ODO output state. See the Overcurrent Detection section. ODLO 2 0 OCHI 1 0 OCLO 0 0 a) CHARGING CURRENTS DESCRIPTION Counter Selection. Selects which counter is multiplexed to COUNT. Set this bit to select the charge counter. Clear this bit to select the discharge counter. See the Charge and Discharge Counters section. Offset-Measurement Enable. Set this bit to disconnect CS from the external circuitry and internally short it to AGND. Clear this bit to reconnect CS to the external circuitry and resume normal operation. See the Internal Offset Measurement section. Second of two bits controlling the ODO output state. To ensure proper overcurrent protection, ODLO should always remain cleared. See the Overcurrent Detection section. First of two bits controlling OCO output state. See the Overcurrent Detection section. Second of two bits controlling OCO output state. To ensure proper overcurrent protection, OCLO should always remain cleared. See the Overcurrent Detection section. b) DISCHARGING CURRENTS TO BATT- REF R5 REF R4 OCI C5 R6 R3 ODI MAX1660 RCS C4 MAX1660 CS AGND AGND GND Figure 10. Overcurrent-Detection Networks *Patent pending 16 ______________________________________________________________________________________ Digitally Controlled Fuel-Gauge Interface R4 = R3 IDISCHG,MAXRCS VREF where V REF = 2.00V, I DISCHG,MAX is the maximum allowable discharging current, and RCS is the currentsense resistor value. Lowpass filter the ODI and OCI inputs with C4 and C5 (Figure 10) to prevent short current pulses from tripping the overcurrent thresholds. Use the smallest capacitances that provide the desired filtering; large capacitances slow the MAX1660’s response to overcurrent conditions. Internal Offset Measurement Although the MAX1660 has extremely low input offset error, some low-current, high-precision applications may require accounting for this offset. Set the configuration word’s OFFSETMEAS bit to disconnect the Coulomb-counter input from the external circuitry and internally short it to AGND. Subtract the resulting offset current from succeeding measurements to correct for the internal offset. Clear OFFSETMEAS to resume normal operation. Note that since the Coulomb-counting circuitry is disconnected from the current-sense resistor during this measurement, currents that flow through the sense resistor when OFFSETMEAS is set do not increment the counters. Ensure that the command to measure the internal offset contains a low byte of 0xA (ODHI = OCHI = 1, ODLO = OCLO = 0) to force the FETs off and disconnect the load. Although the MAX1660 cannot perform its Coulomb-counting function while in offset-measurement mode, the overcurrent comparators are still active. Improving Measurement Accuracy Filtering the Input Place a 100Ω resistor (R2) between RCS and the CS pin, and bypass CS to AGND with a 0.1µF capacitor (C3), as shown in Figure 11. To minimize leakage errors due to finite trace-to-trace resistance, place both filter components, as well as C5, as close to the CS pin as possible. Minimizing SMBus Activity Although proper layout minimizes coupling from the digital data lines to the high-resolution analog interface, the MAX1660’s analog interface may still detect switching noise in low-current, high-precision applications. In such applications, it may be advantageous to use the MAX1660’s digital compare function to limit activity on the digital data lines during the measurement. By removing the requirement that the host poll the MAX1660 to determine when a counter has reached the desired value, the MAX1660 requires no digital switching while it accumulates sensitive data. See Digital Compare Function section. Exiting Hard-Shutdown Mode In most applications, hard-shutdown mode is used only when the battery pack has become fully discharged, at which point the pack’s load current must be minimized to prevent cell overdischarge. When the MAX1660’s host is powered from VL, which turns off in hardshutdown mode, the host is unable to signal the MAX1660 to exit hard-shutdown mode. Figure 8’s circuit demonstrates a simple topology that handles this situation. During normal operation, the external MOSFETs M1 and M2 conduct so that V SHDN is pulled up to VBATT. If M1 is forced off, however, the voltage at SHDN falls toward ground. To ensure that the signal at SHDN is a logic high, one of the host’s GPIO lines is programmed high at all times and is connected to SHDN through diode D1. This diode protects the GPIO pin from voltages at PACK+ that exceed the VL voltage. To command the MAX1660 to enter hard-shutdown mode, the host simply turns MOSFET M1 off and drives the GPIO line low, allowing the MAX1660’s SHDN to fall. Once in hard-shutdown mode, the MAX1660 cannot wake up until a valid supply voltage is applied to PACK+ (i.e., when the battery is connected to a charger), pulling SHDN high through R11. Layout Considerations Use care during board layout to obtain the MAX1660’s full precision over a wide range of input currents. Proper board layout minimizes the noise coupled to the analog sections from both high-current traces and digital switching. Use a star ground configuration and route the SCL and SDA lines away from CS and AGND. Lowpass filter the Coulomb-counter input by placing a 100Ω resistor between RCS and CS, and bypass CS to AGND with a 0.1µF ceramic capacitor. To reduce leakage errors due to finite trace-to-trace resistance, place both filter components as close to the IC as possible. Use a Kelvin connection to obtain accurate measurements when large currents are flowing (Figure 11). Bypass REF to AGND with a 10nF ceramic capacitor placed as close to the IC as possible. Bypass VL to GND with a 0.33µF capacitor, also placed as close to the IC as possible. Refer to the MAX1660 evaluation kit layout for an example of proper board layout. *Patent pending ______________________________________________________________________________________ 17 MAX1660* Set the current at which the ODI voltage falls below AGND with a voltage divider placed between REF and CS (Figure 10b). To set the overdischarge threshold, choose R3 in the 1MΩ range, then calculate R4 from: MAX1660* Digitally Controlled Fuel-Gauge Interface WIDE, HIGH CURRENT TRACE MAIN CURRENT PATH 70nF R2 100Ω MAX1660 C5 CS CURRENT-SENSE RESISTOR (RCS) C3 0.1µF AGND THIN, LOW CURRENT TRACES GND WIDE, HIGH CURRENT TRACE KELVIN CONNECTION REDUCES ERROR DUE TO TRACE RESISTANCE SHORT, COMPACT PLACEMENT OF LOWPASS FILTER COMPONENTS REDUCES HIGH-FREQUENCY NOISE AND TRACE-TO-TRACE LEAKAGE ERROR. Figure 11. Proper Layout for Current-Sense Input Pin Configuration ___________________Chip Information TRANSISTOR COUNT: 9078 SUBSTRATE CONNECTED TO GND TOP VIEW INT 1 16 SCL SHDN 2 15 SDA N.C. 3 CS 4 14 RST MAX1660 13 OCO AGND 5 12 ODO REF 6 11 BATT ODI 7 10 VL OCI 8 9 GND QSOP *Patent pending 18 ______________________________________________________________________________________ Digitally Controlled Fuel-Gauge Interface QSOP.EPS *Patent pending ______________________________________________________________________________________ 19 MAX1660* ________________________________________________________Package Information MAX1660* Digitally Controlled Fuel-Gauge Interface NOTES *Patent pending 20 ______________________________________________________________________________________