CATALYST CAT5114UI

H
CAT5112
EE
GEN FR
ALO
32-Tap Digitally Programmable Potentiometer (DPP™)
with Buffered Wiper
LE
FEATURES
APPLICATIONS
■ 32-position linear taper potentiometer
■ Automated product calibration
■ Non-volatile NVRAM wiper storage;
■ Remote control adjustments
buffered wiper
A D F R E ETM
■ Offset, gain and zero control
■ Low power CMOS technology
■ Tamper-proof calibrations
■ Single supply operation: 2.5V-6.0V
■ Contrast, brightness and volume controls
■ Increment up/down serial interface
■ Motor controls and feedback systems
Ω, 50kΩ
Ω and 100kΩ
Ω
■ Resistance values: 10kΩ,
■ Programmable analog functions
■ Available in PDIP, SOIC, TSSOP and MSOP packages
DESCRIPTION
The CAT5112 is a single digitally programmable
potentiometer (DPP™) designed as a electronic
replacement for mechanical potentiometers and trim
pots. Ideal for automated adjustments on high volume
production lines, they are also well suited for
applications where equipment requiring periodic
adjustment is either difficult to access or located in a
hazardous or remote environment.
system values without effecting the stored
setting. Wiper-control of the CAT5112 is
accomplished with three input control pins, CS, U/D,
and INC. The INC input increments the wiper in the
direction which is determined by the logic state of
the U/D input. The CS input is used to select the
device and also store the wiper position prior to
power down.
The CAT5112 contains a 32-tap series resistor array
connected between two terminals RH and RL. An up/
down counter and decoder that are controlled by three
input pins, determines which tap is connected to the
wiper, RWB. The CAT5112 wiper is buffered by an op
amp that operates rail to rail. The wiper setting, stored in
non-volatile NVRAM memory, is not lost when the device is powered down and is automatically recalled when
power is returned. The wiper can be adjusted to test new
The digitally programmable potentiometer can be
used as a buffered voltage divider. For applications
where the potentiometer is used as a 2-terminal variable
resistor, please refer to the CAT5114. The buffered
wiper of the CAT5112 is not compatible with that application. DPPs bring variability and programmability to a
broad range of applications and are used primarily to
control, regulate or adjust a characteristic or parameter
of an analog circuit.
FUNCTIONAL DIAGRAM
VCC
RH
RH
U/D
INC
>
Control
and
Memory
+
–
+
–
RWB
R WB
CS
Power On Recall
RL
RL
Electronic Potentiometer
Implementation
VSS
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 2002, Rev. L
1
CAT5112
PIN CONFIGURATION
PIN FUNCTIONS
PDIP Package (P, L)
INC
U/D
RH
GND
1
2
3
4
CS
VCC
8
7
VCC
CS
6
5
RL
INC
RWB
U/D
SOIC Package (S, V)
INC
U/D
RH
GND
1
2
3
4
8
7
VCC
CS
6
5
RL
RWB
Pin Name
TSSOP Package (U, Y)
1
2
3
4
8
7
6
5
RL
RWB
GND
RH
MSOP Package (R, Z)
INC
U/D
RH
GND
1
2
8
7
3
4
6
5
VCC
CS
RL
RWB
Function
INC
Increment Control
U/D
Up/Down Control
RH
Potentiometer High Terminal
GND
Ground
RWB
Buffered Wiper Terminal
RL
Potentiometer Low Terminal
CS
Chip Select
VCC
Supply Voltage
PIN DESCRIPTIONS
INC
INC: Increment Control Input
of the CAT5112 and is active low. When in a high
state, activity on the INC and U/D inputs will not
affect or change the position of the wiper.
The INC input (on the falling edge) moves the wiper in the
up or down direction determined by the condition of the
U/D input.
DEVICE OPERATION
D: Up/Down Control Input
U/D
The CAT5112 operates like a digitally controlled
potentiometer with RH and RL equivalent to the high
and low terminals and RWB equivalent to the mechanical
potentiometer's wiper. There are 32 available tap positions including the resistor end points, RH and RL. There
are 31 resistor elements connected in series between
the R H and R L terminals. The wiper terminal is
connected to one of the 32 taps and controlled by three
inputs, INC, U/D and CS. These inputs control a five-bit
up/down counter whose output is decoded to select the
wiper position. The selected wiper position can be
stored in nonvolatile memory using the INC and
CS inputs.
The U/D input controls the direction of the wiper
movement. When in a high state and CS is low, any highto-low transition on INC will cause the wiper to move one
increment toward the RH terminal. When in a low state
and CS is low, any high-to-low transition on INC will
cause the wiper to move one increment towards the
RL terminal.
RH: High End Potentiometer Terminal
RH is the high end terminal of the potentiometer. It is not
required that this terminal be connected to a potential
greater than the RL terminal. Voltage applied to the RH
terminal cannot exceed the supply voltage, VCC or go
below ground, GND.
With CS set LOW the CAT5112 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC wil increment or decrement the
wiper (depending on the state of the U/D input and fivebit counter). The wiper, when at either fixed terminal,
acts like its mechanical equivalent and does not move
beyond the last position. The value of the counter is
stored in nonvolatile memory whenever CS transitions
HIGH while the INC input is also HIGH. When the
CAT5112 is powered-down, the last stored wiper counter
position is maintained in the nonvolatile memory. When
power is restored, the contents of the memory are
recalled and the counter is set to the value stored.
RWB: Wiper Potentiometer Terminal (Buffered)
RWB is the buffered wiper terminal of the potentiometer. Its
position on the resistor array is controlled by the control
inputs, INC, U/D and CS.
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is not
required that this terminal be connected to a potential
less than the RH terminal. Voltage applied to the RL
terminal cannot exceed the supply voltage, VCC or go
below ground, GND. R L and R H are electrically
interchangeable.
With INC set low, the CAT5112 may be de-selected
and powered down without storing the current wiper
position in nonvolatile memory. This allows the
system to always power up to a preset value stored
in nonvolatile memory.
CS
CS: Chip Select
The chip select input is used to activate the control input
Doc. No. 2002, Rev. L
2
CAT5112
OPERATING MODES
RH
INC
CS
U/D
Operation
High to Low
Low
High
Wiper toward H
High to Low
Low
Low
Wiper toward L
High
Low to High
X
Store Wiper Position
Low
Low to High
X
No Store, Return to Standby
X
High
X
Standby
-0.5V to +7V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
RWB
CW
CL
Symbol
Parameter
Test Method
VZAP(1)
ILTH(1)(2)
ESD Susceptibility
Latch-Up
Data Retention
Endurance
MIL-STD-883, Test Method 3015
JEDEC Standard 17
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 1003
Min
Operating Voltage Range
Supply Current (Increment)
ICC2
Supply Current (Write)
ISB1 (2)
Supply Current (Standby)
Potentiometer
Equivalent Circuit
VCC = 6V, f = 1MHz, IW=0
VCC = 6V, f = 250kHz, IW=0
Programming, VCC = 6V
VCC = 3V
CS=VCC-0.3V
U/D, INC=VCC-0.3V or GND
Typ
Max
2000
100
100
1,000,000
DC Electrical Characteristics: VCC = +2.5V to +6.0V unless otherwise specified
Power Supply
Symbol Parameter
Conditions
Min
VCC
ICC1
RL
* Stresses above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Absolute Maximum Ratings
are limited values applied individually while other parameters are
within specified operating conditions, and functional operation at any
of these conditions is NOT implied. Device performance and reliability
may be impaired by exposure to absolute rating conditions for extended
periods of time.
RELIABILITY CHARACTERISTICS
TDR
NEND
Rwi
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix)
0°C to +70°C
Industrial (‘I’ suffix)
-40°C to +85°C
Junction Temperature
+150°C
Storage Temperature
-65°C to +150°C
Lead Soldering (10 sec max)
+300°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
VCC to GND
Inputs
CS to GND
INC to GND
U/D to GND
RH to GND
RL to GND
RWB to GND
CH
Units
Volts
mA
Years
Stores
Typ
Max
Units
2.5
—
—
—
—
—
—
—
—
—
6.0
200
100
1
500
mA
µA
—
75
150
µA
Min
Typ
Max
Units
V
µA
Logic Inputs
Symbol
Parameter
Conditions
IIH
IIL
VIH1
VIL1
Input Leakage Current
Input Leakage Current
TTL High Level Input Voltage
TTL Low Level Input Voltage
VIN = VCC
VIN = 0V
4.5V ≤ VCC ≤ 5.5V
—
—
2
0
—
—
—
—
10
–10
VCC
0.8
µA
µA
V
V
VIH2
CMOS High Level Input Voltage
2.5V ≤ VCC ≤ 6V
VCC x 0.7
—
VCC + 0.3
V
VIL2
CMOS Low Level Input Voltage
-0.3
—
VCC x 0.2
V
NOTES:
(1)
(2)
(3)
(4)
This parameter is tested initially and after a design or process change that affects the parameter.
Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC + 1V
IW=source or sink
These parameters are periodically sampled and are not 100% tested.
3
Doc. No. 2002, Rev. L
CAT5112
Potentiometer Parameters
Symbol
RPOT
Parameter
Conditions
Min
Typ
Potentiometer Resistance
-10 Device
10
-50 Device
50
-00 Device
100
Pot Resistance Tolerance
Max
Units
kΩ
±20
%
VRH
Voltage on RH pin
0
VCC
V
VRL
Voltage on RL pin
0
VCC
V
Resolution
1
%
INL
Integral Linearity Error
IW ≤ 2µA
0.5
1
LSB
DNL
Differential Linearity Error
IW ≤ 2µA
0.25
0.5
LSB
ROUT
Buffer Output Resistance
.05VCC ≤ VWB≤ .95VCC, VCC=5V
1
Ω
IOUT
Buffer Output Current
.05VCC ≤ VWB≤ .95VCC, VCC=5V
3
mA
TCRPOT
TC of Pot Resistance
300
TCRATIO
Ratiometric TC
TBD
ppm/˚C
Isolation Resistance
TBD
Ω
8/8/25
pF
1.7
MHz
RISO
CRH/CRL/CRW Potentiometer Capacitances
fc
VWB(SWING)
Doc. No. 2002, Rev. L
Frequency Response
Passive Attenuator, 10kΩ
Output Voltage Range
IOUT≤100µA, VCC=5V
4
0.01VCC
ppm/˚C
.99VCC
CAT5112
AC CONDITIONS OF TEST
VCC Range
2.5V ≤ VCC ≤ 6V
Input Pulse Levels
0.2VCC to 0.7VCC
Input Rise and Fall Times
10ns
Input Reference Levels
0.5VCC
AC OPERATING CHARACTERISTICS:
VCC = +2.5V to +6.0V, VH = VCC, VL = 0V, unless otherwise specified
Symbol
Parameter
Min
Typ(1)
Max
Units
tCI
tDI
tID
tIL
tIH
tIC
tCPH
tCPH
tIW
tCYC
tR, tF(2)
tPU(2)
tWR
CS to INC Setup
U/D to INC Setup
U/D to INC Hold
INC LOW Period
INC HIGH Period
INC Inactive to CS Inactive
CS Deselect Time (NO STORE)
CS Deselect Time (STORE)
INC to VOUT Change
INC Cycle Time
INC Input Rise and Fall Time
Power-up to Wiper Stable
Store Cycle
100
50
100
250
250
1
100
10
—
1
—
—
—
—
—
—
—
—
—
—
—
1
—
—
—
5
—
—
—
—
—
—
—
—
5
—
500
1
10
ns
ns
ns
ns
ns
µs
ns
ms
µs
µs
µs
msec
ms
A. C. TIMING
CS
(store)
tCYC
tCI
tIL
tIC
tIH
tCPH
90%
INC
90%
10%
tDI
tID
tF
U/D
tR
MI (3)
tIW
RW
(1) Typical values are for TA=25˚C and nominal supply voltage.
(2) This parameter is periodically sampled and not 100% tested.
(3) MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
5
Doc. No. 2002, Rev. L
CAT5112
ORDERING INFORMATION
Prefix
CAT
Optional
Company ID
Device #
5112
Suffix
S
-10
Resistance
-10: 10kohms
-50: 50kohms
-00: 100kohms
Product Number
5112: Buffered
5114: Unbuffered
Package
P: PDIP
S: SOIC
U: TSSOP
R: MSOP
L: PDIP (Lead free, Halogen free)
V: SOIC (Lead free, Halogen free)
Y: TSSOP (Lead free, Halogen free)
Z: MSOP (Lead free, Halogen free)
Doc. No. 2002, Rev. L
I
TE13
Tape & Reel
SOIC: 2000/Reel
TSSOP: 2000/Reel
MSOP: 2500/Reel
Temperature Range
Blank = Commercial (0°C to +70°C)
I = Industrial (-40°C to +85°C)
6
CAT5112
REVISION HISTORY
Date
Rev.
Reason
3/10/2004
J
Updated Potentiometer Parameters
3/29/2004
K
Changed Green Package marking for SOIC from W to V
4/12/2004
L
Updated Reel Ordering Information
Notes:
(1) The device used in the above example is a CAT5112 SI-10TE13 (SOIC, 10K Ohms, Industrial Temperature, Tape & Reel)
Copyrights, Trademarks and Patents
Trademarks and registered trademarks of Catalyst Semiconductor include each of the following:
DPP ™
AE2 ™
Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents
issued to Catalyst Semiconductor contact the Company’s corporate office at 408.542.1000.
CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS
PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE
RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING
OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or
other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a
situation where personal injury or death may occur.
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets
labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate
typical semiconductor applications and may not be complete.
Catalyst Semiconductor, Inc.
Corporate Headquarters
1250 Borregas Avenue
Sunnyvale, CA 94089
Phone: 408.542.1000
Fax: 408.542.1200
www.catsemi.com
Publication #:
Revison:
Issue date:
Type:
7
2002
L
4/12/04
Final
Doc. No. 2002, Rev. L