CC1125 Ultra-High Performance RF Narrowband Transceiver Applications Social Alarms Narrowband ultra low power wireless systems with channel spacing down to 4 kHz 170 / 315 / 433 / 868 / 915 / 920 / 950 MHz ISM/SRD band systems Wireless Metering and Wireless Smart Grid (AMR and AMI) IEEE 802.15.4g systems Home and building automation Wireless alarm and security systems Industrial monitoring and control Wireless healthcare applications Wireless sensor networks and Active RFID Private mobile radio Regulations Suitable for systems targeting compliance with: Europe US Japan ETSI EN 300 220 cat. 1 ETSI EN 54-25 ETSI EN 300 113 and EN 301 166 FCC CFR47 Part 15, 24, 90, 101 ARIB RCR STD-T30, T-67, T-108 Key Features High performance single chip transceiver o Adjacent channel selectivity: 67 dB at 6.25 kHz offset o Blocking performance: 104 dB at 10 MHz offset o Excellent receiver sensitivity: -129 dBm at 300 bps -123 dBm at 1.2 kbps -110 dBm at 50 kbps o Very low phase noise: -115 dBc/Hz at 10 kHz offset Suitable for systems targeting ETSI category 1 High spectral efficiency (9.6 kbps in 12.5 kHz channel in compliance with FCC narrowbanding mandate) Power Supply o Wide supply voltage range (2.0 V – 3.6 V) o Low current consumption: - RX: 2 mA in RX Sniff Mode - RX: 17 mA peak current in low power mode - RX: 26 mA peak current in high performance mode - TX: 47 mA at +14 dBm o Power down: 0.3 μA Programmable output power up to +16 dBm with 0.4 dB step size Automatic output power ramping Configurable data rates: 0 to 200 kbps Supported modulation formats: 2-FSK, 2-GFSK, 4-FSK, 4-GFSK, MSK, OOK WaveMatch: Advanced digital signal processing for improved sync detect performance RoHS compliant 5x5mm QFN 32 package Peripherals and Support Functions Enhanced Wake-On-Radio functionality for automatic low-power receive polling Separate 128-byte RX and TX FIFOs Includes functions for antenna diversity support Support for re-transmissions Support for auto-acknowledge of received packets TCXO support and control, also in power modes Automatic Clear Channel Assessment (CCA) for listenbefore-talk (LBT) systems Built in coding gain support for increased range and robustness Digital RSSI measurement Support for seamless integration with the CC1190 for increased range giving up to 3 dB improvement in sensitivity and up to +27 dBm output power Temperature sensor 25 AVDD_PFD_CHP 27 AVDD_SYNTH2 26 DCPL_PFD_CHP DCPL_XOSC 28 AVDD_XOSC 29 XOSC_Q2 30 XOSC_Q1 31 The CC1125 is a fully integrated single-chip radio transceiver designed for high performance at very low power and low voltage operation in cost effective wireless systems. All filters are integrated, removing the need for costly external SAW and IF filters. The device is mainly intended for the ISM (Industrial, Scientific and Medical) and SRD (Short Range Device) frequency bands at 164192 MHz, 274-320 MHz, 410-480 MHz and 820-960 MHz. 32 EXT_XOSC Description VDD_GUARD 1 24 RESET_N 2 23 LPF0 GPIO3 3 22 AVDD_SYNTH1 21 DCPL_VCO 20 LNA_N GPIO2 4 DVDD 5 DCPL 6 SI 7 SCLK 8 CC1125 19 LNA_P GND GROUND PAD 13 14 15 16 AVDD_IF RBIAS AVDD_RF N.C. CSn DVDD GPIO0 12 SO (GPIO1) 11 9 10 The CC1125 provides extensive hardware support for packet handling, data buffering, burst transmissions, clear channel assessment, link quality indication and Wake-OnRadio. The CC1125 main operating parameters can be controlled via an SPI interface. In a typical system, the CC1125 will be used together with a microcontroller and only few external passive components. LPF1 18 TRX_SW 17 PA PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 1 of 25 CC1125 Table of Contents 1 ELECTRICAL SPECIFICATIONS .................................................................................................... 3 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.10 1.11 1.12 1.13 1.14 1.15 1.16 1.17 ABSOLUTE MAX RATINGS ................................................................................................................ 3 GENERAL CHARACTERISTICS ............................................................................................................ 3 RF CHARACTERISTICS ...................................................................................................................... 3 REGULATORY STANDARDS ............................................................................................................... 4 CURRENT CONSUMPTION, STATIC MODES ........................................................................................ 5 CURRENT CONSUMPTION, TRANSMIT MODES ................................................................................... 5 CURRENT CONSUMPTION, RECEIVE MODES...................................................................................... 6 RECEIVE PARAMETERS ..................................................................................................................... 7 TRANSMIT PARAMETERS................................................................................................................. 13 PLL PARAMETERS .......................................................................................................................... 14 WAKE-UP AND TIMING ................................................................................................................... 15 HIGH SPEED CRYSTAL OSCILLATOR ............................................................................................... 15 HIGH SPEED CLOCK INPUT (TCXO) ............................................................................................... 15 32 KHZ CLOCK INPUT ..................................................................................................................... 16 LOW SPEED RC OSCILLATOR .......................................................................................................... 16 I/O AND RESET................................................................................................................................ 16 TEMPERATURE SENSOR................................................................................................................... 16 2 TYPICAL PERFORMANCE CURVES ............................................................................................ 17 3 PIN CONFIGURATION ..................................................................................................................... 20 4 BLOCK DIAGRAM ............................................................................................................................ 21 4.1 4.2 4.3 4.4 4.5 4.6 4.7 FREQUENCY SYNTHESIZER ............................................................................................................. 21 RECEIVER ....................................................................................................................................... 21 TRANSMITTER ................................................................................................................................. 22 RADIO CONTROL AND USER INTERFACE ......................................................................................... 22 ENHANCED WAKE-ON-RADIO (EWOR) ......................................................................................... 22 SNIFF MODE.................................................................................................................................... 22 ANTENNA DIVERSITY ..................................................................................................................... 23 5 TYPICAL APPLICATION CIRCUIT ............................................................................................... 24 6 HISTORY ............................................................................................................................................. 25 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 2 of 25 CC1125 1 Electrical Specifications All measurements performed on CC1120EM_868_915 rev.1.0.1, CC1120EM_955 rev.1.2.1, CC1120EM_420_470 rev.1.0.1 or CC1120EM_169 rev.1.2 (fxosc = 32 MHz), and CC1125EM_868_915 rev.1.1.0, CC1125EM_420_470 rev.1.1.0, CC1125EM_169 rev.1.1.0, CC1125EM-Cat1-868 (fxosc = 40 MHz) 1.1 Absolute Max Ratings Parameter Min Typ Max Unit Condition Supply Voltage ("VDD") -0.3 3.9 V Storage Temperature Range -40 125 °C Solder Reflow Temperature 260 °C According to IPC/JEDEC J-STD020 ESD 2000 V HBM ESD 500 V CDM Moisture Sensitivity Level MSL3 Input RF level +10 dBm VDD+0.3 Voltage on Any Digital Pin -0.3 V max 3.9 Voltage on Analog Pins (including “DCPL” pins) 1.2 -0.3 2.0 V Max Unit General Characteristics Parameter Min Typ Voltage Supply Range 2.0 3.6 V Temperature Range -40 85 °C 1.3 Condition RF Characteristics Parameter Min Typ Max Unit 820 960 MHz 410 480 MHz 274 320 MHz 164 192 MHz Frequency Bands Frequency Resolution Condition Please see application note SWRA398 for more information 30 Hz In 820-960 MHz band 15 Hz In 410-480 MHz band 6 Hz In 164-192 MHz band 0 200 kbps Packet mode 0 100 kbps Transparent mode Datarate Datarate Step Size 1e-4 bps PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 3 of 25 CC1125 1.4 Regulatory Standards Performance Mode Frequency Band Suitable for compliance with Comments ARIB T-108 ARIB T-96 ETSI EN 300 220 category 1 ETSI EN 54-25 820 – 960 MHz FCC PART 101 FCC PART 24 SUBMASK D Performance also suitable for systems targeting maximum allowed output power in the respective bands, using a range extender such as the CC1190 FCC PART 15.247 FCC PART 15.249 FCC PART 90 MASK G FCC PART 90 MASK J ARIB T-67 ARIB RCR STD-30 High Performance Mode ETSI EN 301 166 410 – 480 MHz ETSI EN 300 113 ETSI EN 300 220 category 1 Performance also suitable for systems targeting maximum allowed output power in the respective bands, using a range extender FCC PART 90 MASK D FCC PART 90 MASK E FCC PART 90 MASK G ETSI EN 300 220 category 1 ETSI EN 301 166 164 – 192 MHz ETSI EN 300 113 FCC PART 90 MASK C Performance also suitable for systems targeting maximum allowed output power in the respective bands, using a range extender FCC PART 90 MASK D FCC PART 90 MASK E ETSI EN 300 220 category 2 820 – 960 MHz FCC PART 15.247 FCC PART 15.249 Low Power Mode 410 – 480 MHz ETSI EN 300 220 category 2 164 – 192 MHz ETSI EN 300 220 category 2 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 4 of 25 CC1125 1.5 Current Consumption, Static Modes TA = 25°C, VDD = 3.0 V, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max 0.3 1 Unit Condition µA Power Down with Retention 0.5 µA Low-power RC oscillator running XOFF Mode 170 µA Crystal oscillator / TCXO disabled IDLE Mode 1.3 mA Clock running, system waiting with no radio activity Unit Condition 1.6 Current Consumption, Transmit Modes 950 MHz band (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max TX Current Consumption +10 dBm 37 mA TX Current Consumption 0 dBm 26 mA 868/915/920 MHz bands (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 40 MHz if nothing else stated Parameter Min Typ Max Unit TX Current Consumption +14 dBm 47 mA TX Current Consumption +10 dBm 38 mA Condition 434 MHz band (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 40 MHz if nothing else stated Parameter Min Typ Max Unit TX Current Consumption +15 dBm 51 mA TX Current Consumption +14 dBm 47 mA TX Current Consumption +10 dBm 36 mA Condition 170 MHz band (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 40 MHz if nothing else stated Parameter Min Typ Max Unit TX Current Consumption +15 dBm 56 mA TX Current Consumption +14 dBm 52 mA TX Current Consumption +10 dBm 40 mA Condition Low Power Mode TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 32 MHz if nothing else stated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 5 of 25 CC1125 Parameter Min TX Current Consumption +10 dBm 1.7 Typ Max 32 Unit Condition mA Current Consumption, Receive Modes High Performance Mode TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max Unit Condition Using RX Sniff Mode, where the receiver wakes up at regular intervals to look for an incoming packet RX Wait for Sync 1.2 kbps, 4 Byte Preamble 2 mA 38.4kbps, 4 Byte Preamble 13.4 mA 433, 868/915/920 MHz bands 26 mA 170 MHz band 27 mA 15 uA RX Peak Current, fxosc = 40 MHz Peak current consumption during packet reception at the sensitivity level Average Current Consumption Check for Data Packet Every 1 Second Using Wake on Radio 50 kbps, 5 byte preamble, 32 kHz RC oscillator used as sleep timer Low Power Mode TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max Unit Condition mA Peak current consumption during packet reception at the sensitivity level RX Peak Current Low power RX mode 1.2 kbps 17 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 6 of 25 CC1125 1.8 Receive Parameters 1 General Receive Parameters (High Performance Mode) TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz if nothing else stated Parameter Min Saturation Typ Max +10 Unit Condition dBm Digital Channel Filter Programmable Bandwidth fxosc = 32 MHz 2.8 200 kHz fxosc = 40 MHz 3.5 250 kHz IIP3, Normal Mode -14 dBm At maximum gain IIP3, High Linearity Mode -8 dBm Using 6 dB gain reduction in front end ±12 % With carrier sense detection enabled and assuming 4 byte preamble ±0.2 % -56 dBm < -57 dBm Datarate Offset Tolerance Spurious Emissions 1 - 13 GHz (VCO leakage at 3.5 GHz) 30 MHz to 1 GHz With carrier sense detection disabled Radiated emissions measured according to ETSI EN 300 220, fc = 869.5 MHz Optimum Source Impedance 868 / 915 / 920 MHz bands 433 MHz band 169 MHz band 1 60 + j60 / 30+j30 100 + j60 / 50+ j30 140 + j40 / 70 + j20 Ω Ω Ω (Differential / Single Ended RX Configurations) All RX measurements made at the antenna connector, to a bit error rate limit of 1% PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 7 of 25 CC1125 RX performance in 950 MHz band (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max Unit Condition -120 dBm 1.2 kbps, DEV=4 kHz CHF=10 kHz2 -107 dBm 50 kbps 2GFSK, DEV=25 kHz, CHF=100 kHz -100 dBm 200 kbps, DEV=83 kHz (outer symbols), CHF=200 kHz, 4GFSK3 Sensitivity Note: Sensitivity can be improved if the TX and RX matching networks are separated. 51 dB ± 12.5 kHz (adjacent channel) Blocking and Selectivity 52 dB ± 25 kHz (alternate channel) 1.2 kbps 2FSK, 12.5 kHz channel separation, 4 kHz deviation, 10 kHz channel filter 73 dB ± 1 MHz 76 dB ± 2 MHz 81 dB ± 10 MHz Blocking and Selectivity 43 dB ± 200 kHz (adjacent channel) 50 kbps 2GFSK, 200 kHz channel separation, 25 kHz deviation, 100 kHz channel filter 51 dB ± 400 kHz (alternate channel) 62 dB ± 1 MHz 65 dB ± 2 MHz 71 dB ± 10 MHz 37 dB ± 200 kHz (adjacent channel) Blocking and Selectivity 44 dB ± 400 kHz (alternate channel) 200 kbps 4GFSK, 83 kHz deviation (outer symbols), 200 kHz channel filter, zero IF 55 dB ± 1 MHz 58 dB ± 2 MHz 64 dB ± 10 MHz (Same modulation format as 802.15.4g Mandatory Mode) 2 DEV is short for deviation, CHF is short for Channel Filter Bandwidth 3 BT=0.5 is used in all GFSK measurements PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 8 of 25 CC1125 RX performance in 868/915/920 MHz bands (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max Unit Condition 300 bps, DEV=1 kHz CHF=3.8 kHz -129 dBm fxosc = 40 MHz -123 dBm 1.2 kbps, DEV=4 kHz CHF=10 kHz -114 dBm 4.8 kbps OOK -110 dBm 38.4 kbps, DEV=20 kHz CHF=100 kHz -110 dBm 50 kbps 2GFSK, DEV=25 kHz, CHF=100 kHz -103 dBm 200 kbps, DEV=83 kHz (outer symbols), CHF=200 kHz, 4GFSK 62 dB ± 6.25 kHz (adjacent channel) 63 dB + 12.5 kHz (alternate channel) 83 dB ± 1 MHz 87 dB ± 2 MHz 91 dB ± 10 MHz 58 dB ± 12.5 kHz (adjacent channel) 58 dB ± 25 kHz (alternate channel) 78 dB ± 1 MHz 82 dB ± 2 MHz 86 dB ± 10 MHz Blocking and Selectivity 58 dB ± 25 kHz (adjacent channel) 1.2 kbps 2FSK, 25 kHz channel separation, 4 kHz deviation, 16 kHz channel filter 77 dB ± 1 MHz 106 dB ± 2 MHz 101 dB ± 10 MHz 42 dB + 100 kHz (adjacent channel) Blocking and Selectivity 43 dB ± 200 kHz (alternate channel) 38.4 kbps 2GFSK, 100 kHz channel separation, 20 kHz deviation, 100 kHz channel filter 62 dB ± 1 MHz 66 dB ± 2 MHz 74 dB ± 10 MHz Blocking and Selectivity 43 dB ± 200 kHz (adjacent channel) 50 kbps 2GFSK, 200 kHz channel separation, 25 kHz deviation, 100 kHz channel filter 50 dB ± 400 kHz (alternate channel) 61 dB ± 1 MHz 65 dB ± 2 MHz 74 dB ± 10 MHz Sensitivity Blocking and Selectivity 0.3 kbps 2FSK, 6.25 kHz channel separation, 1 kHz deviation, 3.8 kHz channel filter fxosc = 40 MHz using TCXO Blocking and Selectivity 1.2 kbps 2FSK, 12.5 kHz channel separation, 4 kHz deviation, 10 kHz channel filter fxosc = 40 MHz using TCXO fxosc = 40 MHz using TCXO Using external SAW filter for compliance with ETSI category 1 (Same modulation format as 802.15.4g Mandatory Mode) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 9 of 25 CC1125 Parameter Min Typ Unit Condition 36 Max dB ± 200 kHz (adjacent channel) Blocking and Selectivity 44 dB ± 400 kHz (alternate channel) 200 kbps 4GFSK, 83 kHz deviation (outer symbols), 200 kHz channel filter, zero IF 55 dB ± 1 MHz 59 dB ± 2 MHz 67 dB ± 10 MHz 58 dB 1.2 kbps, DEV=4 kHz CHF=10 kHz, image at -125 kHz Image Rejection (Image compensation enabled) fxosc = 40 MHz using TCXO RX performance in 434 MHz band (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max Unit Condition 300 bps, DEV=1 kHz CHF=3.8 kHz -129 dBm fxosc = 40 MHz Sensitivity Blocking and Selectivity 0.3 kbps 2FSK, 6.25 kHz channel separation, 1 kHz deviation, 3.8 kHz channel filter fxosc = 40 MHz using TCXO Blocking and Selectivity 1.2 kbps 2FSK, 12.5 kHz channel separation, 4 kHz deviation, 10 kHz channel filter fxosc = 40 MHz using TCXO -123 dBm 1.2 kbps, DEV=4 kHz CHF=10 kHz -109 dBm 50 kbps 2GFSK, DEV=25 kHz, CHF=100 kHz -116 dBm 1.2 kbps, DEV=20 kHz CHF=50 kHz 65 dB + 6.25 kHz (adjacent channel) 66 dB + 12.5 kHz (alternate channel) 86 dB ± 1 MHz 90 dB ± 2 MHz 95 dB ± 10 MHz 60 dB ± 12.5 kHz (adjacent channel) 61 dB ± 25 kHz (alternate channel) 80 dB ± 1 MHz 85 dB ± 2 MHz 91 dB ± 10 MHz 47 dB + 100 kHz (adjacent channel) Blocking and Selectivity 50 dB ± 200 kHz (alternate channel) 38.4 kbps 2GFSK, 100 kHz channel separation, 20 kHz deviation, 100 kHz channel filter 67 dB ± 1 MHz 71 dB ± 2 MHz 78 dB ± 10 MHz PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 10 of 25 CC1125 RX performance in 170 MHz band (High Performance Mode) TA = 25°C, VDD = 3.0 V, fxosc = 32 MHz if nothing else stated Parameter Min Typ Max Unit Condition 300 bps, DEV=1 kHz CHF=3.8 kHz -129 dBm fxosc = 40 MHz Sensitivity -123 Blocking and Selectivity 0.3 kbps 2FSK, 6.25 kHz channel separation, 1 kHz deviation, 3.8 kHz channel filter fxosc = 40 MHz using TCXO Blocking and Selectivity 1.2 kbps 2FSK, 12.5 kHz channel separation, 4 kHz deviation, 10 kHz channel filter fxosc = 40 MHz using TCXO dBm 1.2 kbps, DEV=4 kHz CHF=10 kHz 67 dB ± 6.25 kHz (adjacent channel) 67 dB + 12.5 kHz (alternate channel) 88 dB ± 1 MHz 101 dB - 2 MHz 104 dB ± 10 MHz 63 dB ± 12.5 kHz (adjacent channel) 65 dB ± 25 kHz (alternate channel) 82 dB ± 1 MHz 86 dB ± 2 MHz 93 dB - 10 MHz 70 dB 66 dB Spurious Response Rejection 1.2 kbps 2FSK, 12.5 kHz channel separation, 4 kHz deviation, 10 kHz channel filter Image Rejection (Image compensation enabled) 1.2 kbps, DEV=4 kHz CHF=10 kHz, image at -125 kHz PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 11 of 25 CC1125 RX performance in Low Power Mode TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 32 MHz if nothing else stated Parameter Min Sensitivity Typ Max Unit Condition -111 dBm 1.2 kbps, DEV=4 kHz CHF=10 kHz -99 dBm 38.4 kbps, DEV=50 kHz CHF=100 kHz -99 dBm 50 kbps 2GFSK, DEV=25 kHz, CHF=100 kHz 46 dB ± 12.5 kHz (adjacent channel) Blocking and Selectivity 46 dB ± 25 kHz (alternate channel) 1.2 kbps 2FSK, 12.5 kHz channel separation, 4 kHz deviation, 10 kHz channel filter 73 dB ± 1 MHz 78 dB ± 2 MHz 79 dB ± 10 MHz 43 dB ± 50 kHz (adjacent channel) Blocking and Selectivity 45 dB + 100 kHz (alternate channel) 1.2 kbps 2FSK, 50 kHz channel separation, 20 kHz deviation, 50 kHz channel filter 71 dB ± 1 MHz 74 dB ± 2 MHz 75 dB ± 10 MHz 37 dB + 100 kHz (adjacent channel) 43 dB + 200 kHz (alternate channel) 58 dB ± 1 MHz 62 dB ± 2 MHz 64 dB + 10 MHz Blocking and Selectivity 43 dB + 200 kHz (adjacent channel) 50 kbps 2GFSK, 200 kHz channel separation, 25 kHz deviation, 100 kHz channel filter 52 dB + 400 kHz (alternate channel) 60 dB ± 1 MHz 64 dB ± 2 MHz 65 dB ± 10 MHz +10 dBm Blocking and Selectivity 38.4 kbps 2GFSK, 100 kHz channel separation, 20 kHz deviation, 100 kHz channel filter (Same modulation format as 802.15.4g Mandatory Mode) Saturation PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 12 of 25 CC1125 1.9 Transmit Parameters TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 32 MHz if nothing else stated Parameter Min Max Output Power Typ Max Unit Condition +12 dBm At 950 MHz +14 dBm At 915/920 MHz +15 dBm At 915/920 MHz with VDD = 3.6 V +15 dBm At 868 MHz +16 dBm At 868 MHz with VDD = 3.6 V +15 dBm At 433 MHz +16 dBm At 433 MHz with VDD = 3.6 V +15 dBm At 170 MHz +16 dBm At 170 MHz with VDD = 3.6 V -11 dBm Within fine step size range -40 dBm Within coarse step size range 0.4 dB Within fine step size range -75 dBc 4-GFSK 9.6 kbps in 12.5 kHz channel, measured in 100 Hz bandwidth at 434 MHz (FCC Part 90 Mask D compliant) -58 dBc 4-GFSK 9.6 kbps in 12.5 kHz channel, measured in 8.75 kHz bandwidth (ETSI 300 220 compliant) -61 dBc 2-GFSK 2.4 kbps in 12.5 kHz channel, 1.2 kHz deviation < -60 dBm Min Output Power Output Power Step Size Adjacent Channel Power Spurious Emissions (Not including harmonics) Harmonics 2nd Harm, 170 MHz 3rd Harm, 170 MHz 2nd Harm, 433 MHz 3rd Harm, 433 MHz 2nd Harm, 450 MHz 3rd Harm, 450 MHz 2nd Harm, 868 MHz 3rd Harm, 868 MHz 2nd Harm, 915 MHz 3rd Harm, 915 MHz 4th Harm, 915 MHz 2nd Harm, 950 MHz 3rd Harm, 950 MHz -39 -58 -56 -51 -60 -45 -40 -42 56 52 60 -58 -42 dBm dBm dBm dBm dBm dBm dBm dBm dBuV/m dBuV/m dBuV/m dBm dBm Transmission at +14 dBm (or maximum allowed in applicable band where this is less than +14 dBm) using TI reference design Emissions measured according to ARIB T-96 in 950 MHz band, ETSI EN 300-220 in 170, 433 and 868 MHz bands and FCC part 15.247 in 450 and 915 MHz band Fourth harmonic in 915 MHz band will require extra filtering to meet FCC requirements if transmitting for long intervals (>50 ms periods) Optimum Load Impedance 868 / 915 / 920 MHz bands 433 MHz band 169 MHz band 35 + j35 55 + j25 80 + j0 Ω Ω Ω PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 13 of 25 CC1125 1.10 PLL Parameters High Performance Mode TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 40 MHz using TCXO if nothing else stated Parameter Min Typ Max Unit Condition -100 dBc/Hz ± 10 kHz offset -103 dBc/Hz ± 100 kHz offset -123 dBc/Hz ± 1 MHz offset -101 dBc/Hz ± 10 kHz offset -102 dBc/Hz ± 100 kHz offset -124 dBc/Hz ± 1 MHz offset -107 dBc/Hz ± 10 kHz offset -110 dBc/Hz ± 100 kHz offset -130 dBc/Hz ± 1 MHz offset -115 dBc/Hz ± 10 kHz offset -115 dBc/Hz ± 100 kHz offset -135 dBc/Hz ± 1 MHz offset Phase Noise in 950 MHz Band fxosc = 32 MHz Phase Noise in 868/915/920 MHz Bands Phase Noise in 433 MHz Band Phase Noise in 170 MHz Band Low Power Mode TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 32 MHz if nothing else stated Parameter Min Phase Noise in 950 MHz Band Phase Noise in 868/915/920 MHz Bands Phase Noise in 433 MHz Band Phase Noise in 170 MHz Band Typ Max Unit Condition -90 dBc/Hz ± 10 kHz offset -92 dBc/Hz ± 100 kHz offset -124 dBc/Hz ± 1 MHz offset -95 dBc/Hz ± 10 kHz offset -95 dBc/Hz ± 100 kHz offset -124 dBc/Hz ± 1 MHz offset -98 dBc/Hz ± 10 kHz offset -102 dBc/Hz ± 100 kHz offset -129 dBc/Hz ± 1 MHz offset -106 dBc/Hz ± 10 kHz offset -110 dBc/Hz ± 100 kHz offset -136 dBc/Hz ± 1 MHz offset PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 14 of 25 CC1125 1.11 Wake-up and Timing TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz, fxosc = 32 MHz if nothing else stated Parameter Min Powerdown to IDLE Typ Max Unit Condition 0.4 ms Depends on crystal 166 µs Calibration disabled 461 µs Calibration enabled 50 µs 296 µs Calibrate when leaving RX/TX enabled 0 µs Calibrate when leaving RX/TX disabled 0.4 ms When using SCAL strobe IDLE to RX/TX RX/TX Turnaround RX/TX to IDLE time Frequency Synthesizer Calibration Minimum Required Number of Preamble Bytes 0.5 bytes Required for RF front end gain settling only. Digital demodulation does not require preamble for settling Time From Start RX Until Valid RSSI 4.6 ms 12.5 kHz channels Including gain settling (function of channel bandwidth. Programmable for trade-off between speed and accuracy) 0.3 ms 200 kHz channels Unit Condition MHz Note: It is recommended that the crystal frequency is chosen so that the RF channel(s) are >1 MHz away from multiples of XOSC in TX and XOSC/2 in RX 1.12 High Speed Crystal Oscillator TA = 25°C, VDD = 3.0 V if nothing else stated Parameter Min Crystal Frequency Typ 32 Max 44 Load Capacitance (CL) 10 pF ESR <50 Ω Start-up Time 0.4 ms Depends on crystal Max Unit Condition 44 MHz 1.13 High Speed Clock Input (TCXO) TA = 25°C, VDD = 3.0 V if nothing else stated Parameter Min Clock Frequency Typ 32 Clock input amplitude (peak-to-peak) >0.8 V Should not exceed supply voltage PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 15 of 25 CC1125 1.14 32 kHz Clock Input TA = 25°C, VDD = 3.0 V if nothing else stated Parameter Min Typ Clock Frequency Max Unit 32 32 kHz Clock Input Pin Input High Voltage Condition kHz 0.8×VDD V 32 kHz Clock Input Pin Input Low Voltage 0.2×VDD V 1.15 Low Speed RC Oscillator TA = 25°C, VDD = 3.0 V if nothing else stated. Parameter Min Typ Max Unit Condition Frequency 32/40 kHz After Calibration (calibrated against the high speed XOSC) Frequency Accuracy After Calibration ±0.1 % Relative to frequency reference (i.e. 32 MHz crystal or TCXO) Initial Calibration Time 1.6 ms 1.16 I/O and Reset TA = 25°C, VDD = 3.0 V if nothing else stated Parameter Min Logic Input High Voltage 0.8×VDD Typ Unit Condition V Logic Input Low Voltage Logic Output High Voltage Max 0.2×VDD 0.8×VDD V V At 4 mA output load or less Logic Output Low Voltage 0.2×VDD Power-on Reset Threshold 1.3 V V Voltage on DVDD pin 1.17 Temperature Sensor TA = 25°C, VDD = 3.0 V if nothing else stated Parameter Min Temperature Sensor Range -40 Typ Max 85 Unit Condition °C Temperature Coefficient 2.66 mV / °C Change in sensor output voltage vs change in temperature Typical Output Voltage 794 mV Typical sensor output voltage at TA = 25°C, VDD = 3.0 V VDD Coefficient 1.17 mV / V Change in sensor output voltage vs change in VDD The CC1125 can be configured to provide a voltage proportional to temperature on GPIO1. Using the information above, the temperature can be estimated by measuring this voltage. Please refer to the CC1125 user guide for more information. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 16 of 25 CC1125 2 Typical Performance Curves TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz if nothing else stated All measurements performed on CC1120EM_868_915 rev.1.0.1, CC1120EM_955 rev.1.2.1, CC1120EM_420_470 rev.1.0.1 or CC1120EM_169 rev.1.2 (fxosc = 32 MHz), and CC1125EM_868_915 rev.1.1.0, CC1125EM_420_470 rev.1.1.0, CC1125EM_169 rev.1.1.0, CC1125EM-Cat1-868 (fxosc = 40 MHz) Note that the "output power vs load impedance" plot was measured at the 50 Ω antenna connector Sensitivity vs Temperature 1.2kbps, 4kHz deviation, 10kHz ch. filter bw Sensitivity vs Voltage 1.2kbps, 4kHz deviation, 10kHz ch. filter bw -120 -121 Sensitivity (dBm) Sensitivity (dBm) -120 -122 -123 -124 -125 -121 -122 -123 -124 -40 0 40 80 2 2.5 Temperature (ºC) Sync Word Sensitivity vs Sync Word Detect Threshold 1.2kbps, 4kHz deviation, 10kHz ch. filter bw 23.2 -116 22.8 -118 RX Current (mA) Sensitivity (dBm) 3.5 RX Current vs Input Level 1.2kbps, 4kHz deviation, 10kHz ch. filter bw -114 -120 -122 -124 -126 22.4 22 21.6 21.2 -128 -130 3 5 7 9 11 13 15 17 20.8 -130 -80 Sync Word Detect Threshold 90 80 70 60 50 40 30 20 10 0 860 864 866 868 870 872 20 Selectivity vs offset frequency (25 kHz channel spacing) 1.2 kbps, 4 kHz deviation, 16 kHz ch. filter bw Wanted channel at 869.3 MHz (-104 dBm) Selectivity vs offset frequency (25 kHz channel spacing) 1.2 kbps, 4 kHz deviation, 16 kHz ch. filter bw Wanted channel at 869.3 MHz (-104 dBm) 862 -30 Input Level (dBm) Selectivity (dB) Selectivity (dB) 3 Supply Voltage (V) 874 876 878 90 80 70 60 50 40 30 20 10 0 868.6 868.8 869 869.2 869.4 869.6 869.8 Frequency (MHz) Frequency (MHz) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 17 of 25 870 CC1125 Automatic Image Cancellation Wanted channel at 869.3 MHz (-104 dBm), image at 869.17 MHz RSSI vs Input Level 1.2kbps, 4kHz deviation, 10kHz ch. filter bw 100 70 80 60 Selectivity (dB) 40 20 0 50 40 iqic enabled iqic disabled 30 20 -20 10 -40 -150 -100 -50 0 869.05 0 869.1 869.15 Input Level (dBm) 869.25 869.3 869.35 Output Power at 868MHz vs PA power setting 18 20 16 10 Output Power (dBm) 14 12 10 8 0 -10 -20 -30 -40 6 Supply Voltage (V) 43 47 4B 53 4F 57 PA power setting Output Power vs Temperature Max Setting, 170 MHz, 3.6V TX Current at 868MHz vs PA power setting 17 60 Output Power (dBm) 50 40 30 20 10 16.5 16 15.5 15 43 47 4B 53 4F 57 5B 63 5F 67 6B 73 6F 77 0 7F 7B 5B 67 6B 3.5 73 6F 3 7F 2.5 77 -50 2 7B Output Power (dBm) Output Power vs Voltage Max Setting, 170 MHz TX Current (mA) 869.2 Frequency (MHz) 63 5F RSSI 60 -40 0 40 Temperature (ºC) PA power setting PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 18 of 25 80 CC1125 GPIO Output High Voltage vs Current Being Sourced GPIO Output Low Voltage vs Current Being Sinked GPIO Output Low Voltage (mV) GPIO Output high Voltage (V) 3.1 2.9 2.7 2.5 2.3 2.1 1.9 1.7 1.5 0 5 10 15 20 25 30 35 1400 1200 1000 800 600 400 200 0 0 5 10 15 20 25 Current (mA) Current (mA) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 19 of 25 30 35 CC1125 3 Pin Configuration The CC1125 pin-out is shown in the table below. Pin # Pin name Type / direction Description 1 VDD_GUARD Power 2.0 - 3.6 V VDD 2 RESET_N Digital Input Asynchronous, active-low digital reset 3 GPIO3 Digital Input/Output General purpose IO 4 GPIO2 Digital Input/Output General purpose IO 5 DVDD Power 2.0 - 3.6 VDD to internal digital regulator 6 DCPL Power Digital regulator output to external decoupling capacitor 7 SI Digital Input Serial data in 8 SCLK Digital Input Serial data clock 9 SO(GPIO1) Digital Input/Output Serial data out (General purpose IO) 10 GPIO0 Digital Input/Output General purpose IO 11 CSn Digital Input Active-low chip-select 12 DVDD Power 2.0 - 3.6 V VDD 13 AVDD_IF Power 2.0 - 3.6 V VDD 14 RBIAS Analog External high precision R 15 AVDD_RF Power 2.0 - 3.6 V VDD 16 N.C. 17 PA Analog Single-ended TX output 18 TRX_SW Analog TX/RX switch 19 LNA_P Analog Differential RX input 20 LNA_N Analog Differential RX input 21 DCPL_VCO Power Pin for external decoupling of VCO supply regulator 22 AVDD_SYNTH1 Power 2.0 - 3.6 V VDD 23 LPF0 Analog External loopfilter components 24 LPF1 Analog External loopfilter components 25 AVDD_PFD_CHP Power 2.0 - 3.6 V VDD 26 DCPL_PFD_CHP Power Pin for external decoupling of PFD and CHP regulator 27 AVDD_SYNTH2 Power 2.0 - 3.6 V VDD 28 AVDD_XOSC Power 2.0 - 3.6 V VDD 29 DCPL_XOSC Power Pin for external decoupling of XOSC supply regulator 30 XOSC_Q1 Analog Crystal oscillator pin 1 (must be grounded if a TCXO or other external clock connected to EXT_XOSC is used) 31 XOSC_Q2 Analog Crystal oscillator pin 2 (must be left floating if a TCXO or other external clock connected to EXT_XOSC is used) 32 EXT_XOSC Digital Input Pin for external XOSC input (must be grounded if a regular XOSC connected to XOSC_Q1 and XOSC_Q2 is used) - GND Ground Pad The ground pad must be connected to a solid ground plane Not Connected PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 20 of 25 CC1125 4 Block Diagram A system block diagram of CC1125 is shown Figure 4.1. CC112X Ultra low power 32kHz auto-calibrated RC oscillator (optional 32kHz clock intput) 4k byte ROM Power on reset MARC Main Radio Control Unit Ultra low power 16 bit MCU SPI Serial configuration and data interface CSn (chip select) SI (serial input) Interrupt and IO handler System bus SO (serial output) SCLK (serial clock) eWOR Enhanced ultra low power Wake On Radio timer Configuration and status registers Battery sensor / temp sensor 256 byte FIFO RAM buffer Packet handler and FIFO control (optional GPIO0-3) RF and DSP frontend Output power ramping and OOK / ASK modulation I Fully integrated Fractional-N Frequency Synthesizer Q ifamp High linearity LNA ifamp LNA_N XOSC XOSC_Q2 90dB dynamic range ADC (optional bit clock) Channel filter LNA_P XOSC_Q1 Data interface with signal chain access Cordic 14dBm high efficiency PA Modulator PA (optional autodetected external XOSC / TCXO) Highly flexible FSK / OOK demodulator 90dB dynamic range ADC (optional low jitter serial data output for legacy protocols) AGC Automatic Gain Control, 60dB VGA range RSSI measurements and carrier sense detection (optional GPIO for antenna diversity) Figure 4.1 : System Block Diagram 4.1 Frequency Synthesizer At the heart of CC1125 there is a fully integrated, fractional-N, ultra high performance frequency synthesizer. The frequency synthesizer is designed for excellent phase noise performance, providing very high selectivity and blocking performance. The system is designed to comply with the most stringent regulatory spectral masks at maximum transmit power. Either a crystal can be connected to XOSC_Q1 and XOSC_Q2, or a TCXO can be connected to the EXT_XOSC input. The oscillator generates the reference frequency for the synthesizer, as well as clocks for the ADC and the digital part. To reduce system cost, CC1125 has high accuracy frequency estimation and compensation registers to measure and compensate for crystal inaccuracies, enabling the use of lower cost crystals. If a TCXO is used, the CC1125 will automatically turn the TCXO on and off when needed to support low power modes and Wake-OnRadio operation. 4.2 Receiver CC1125 features a highly flexible receiver. The received RF signal is amplified by the low-noise amplifier (LNA) and down-converted in quadrature (I and Q) to the intermediate frequency (IF). At IF, the I/Q signals are digitized by the high dynamic range ADCs. An advanced Automatic Gain Control (AGC) unit adjusts the front end gain, and enables the CC1125 to receive both strong and weak signals, even in the presence of strong interferers. High attenuation channel and data filtering enable reception with strong neighbor channel interferers. The I/Q signal is converted to a phase / magnitude signal to support both FSK and OOK modulation schemes. A sophisticated pattern recognition algorithm locks onto the synchronization word without need for preamble settling bytes. Receiver settling time is therefore reduced to the settling time of the PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 21 of 25 CC1125 AGC, typically 4 bits. The advanced pattern recognition also greatly reduces the problem of false sync triggering on noise, further reducing power consumption and improving sensitivity and reliability. The pattern recognition logic can also be used as a high performance preamble detector to reliably detect a valid preamble in the channel. A novel I/Q compensation algorithm removes any problem of I/Q mismatch and hence avoids time consuming and costly I/Q / image calibration steps in production or in the field. 4.3 Transmitter The CC1125 transmitter is based on direct synthesis of the RF frequency (in-loop modulation). To achieve effective spectrum usage, CC1125 has extensive data filtering and shaping in TX to support high throughput data communication in narrowband channels. The modulator also controls power ramping to remove issues such as spectral splattering when driving external high power RF amplifiers. 4.4 Radio Control and User Interface The CC1125 digital control system is built around MARC (Main Radio Control) implemented using an internal high performance 16 bit ultra low power processor. MARC handles power modes, radio sequencing and protocol timing. A 4-wire SPI serial interface is used for configuration and data buffer access. The digital baseband includes support for channel configuration, packet handling, and data buffering. The host MCU can stay in power down until a valid RF packet has been received, and then burst read the data, greatly reducing the power consumption and computing power required from the host MCU. The CC1125 radio control and user interface is based on the widely used CC1101 transceiver to enable easy SW transition between the two platforms. The command strobes and the main radio states are the same for the two platforms. For legacy formats CC1125 also has support for two serial modes. In synchronous serial mode CC1125 performs bit synchronization and provides the MCU with a bit clock with associated data. In transparent mode CC1125 outputs the digital baseband signal using a digital interpolation filter to eliminate jitter introduced by digital filtering and demodulation. 4.5 Enhanced Wake-On-Radio (eWOR) eWOR, using a flexible integrated sleep timer, enables automatic receiver polling with no intervention from the MCU. The CC1125 will enter RX, listen and return to sleep if a valid RF packet is not received. The sleep interval and duty cycle can be configured to make a trade-off between network latency and power consumption. Incoming messages are time-stamped to simplify timer re-synchronization. The eWOR timer runs off an ultra low power 32 kHz RC oscillator. To improve timing accuracy, the RC oscillator can be automatically calibrated to the RF crystal in configurable intervals. 4.6 Sniff Mode The CC1125 supports very quick start up times, and requires very few preamble bits. Sniff Mode uses this to dramatically reduce the current consumption while the receiver is waiting for data. Since the CC1125 is able to wake up and settle much faster than the length of most preambles, it is not required to be in RX continuously while waiting for a packet to arrive. Instead, the enhanced wake-on-radio feature can be used to put the device into sleep periodically. By setting an appropriate sleep time, the CC1125 will be able to wake up and receive the packet when it arrives with no performance loss. This removes the need for accurate timing synchronization between transmitter and receiver, and allows the user to trade off current consumption between the transmitter and receiver. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 22 of 25 CC1125 4.7 Antenna Diversity Antenna diversity can increase performance in a multi-path environment. An external antenna switch is required. The switch can be automatically controlled by CC1125 using one of the GPIO pins (also support for differential output control signal typically used in RF switches). If antenna diversity is enabled, the GPIO will alternate between states until a valid RF input signal is detected. An optional acknowledge packet can be transmitted without changing GPIO state. An incoming RF signal can be validated by received signal strength, by using the automatic preamble detector, or a combination of the two. Using the preamble detector will make a more robust system and avoid the need to set a defined signal strength threshold, as this threshold will set the sensitivity limit of the system. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 23 of 25 CC1125 5 Typical Application Circuit Very few external components are required for the operation of CC1125. A typical application circuit is shown below. Note that it does not show how the board layout should be done, which will greatly influence the RF performance of CC1125. This section is meant as an introduction only. Note that decoupling capacitors for power pins are not shown in the figure below. Optional Voltage Regulator for supply noise isolation Optional TPS799xx out vdd vdd 2 RESET_N LPF1 24 LPF0 23 3 GPIO3 AVDD_SYNTH1 22 4 GPIO2 DCPL_VCO 21 CC1125 5 DVDD 6 DCPL vdd LNA_N 20 LNA_P 7 SI 19 TRX_SW 18 N.C. 16 AVDD_RF 15 vdd 13 AVDD_IF vdd 14 RBIAS 12 DVDD vdd 11 CSn 10 GPIO0 PA 17 9 SO (GPIO1) 8 SCLK vdd vdd in 25 AVDD_PFD_CHP vdd AVDD_SYNTH2 27 DCPL_PFD_CHP 26 vdd AVDD_XOSC 28 1 VDD_GUARD DCPL_XOSC 29 XOSC_Q1 30 (optional control pin from CC1125) XOSC_Q2 31 EXT_XOSC 32 XOSC/ TCXO vdd ext_vdd 40 MHz crystal MCU connection SPI interface and optional gpio pins Figure 5.1 : Typical Application Circuit PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 24 of 25 CC1125 6 History Revision Date Description / Changes SWRS120B March 2013 Added ARIB T-108 to list of regulations Added ETSI EN 301 166 to list of regulations Added optimum source / load impedance Added missing unit "dBm" in output power section Added temperature sensor data Clarified how the typical performance curves have been measured Corrected wrong deviation for 38.4 kbps sensitivity (was 50 kHz, corrected to 20 kHz) Pin CS_N renamed to CSn to comply with naming convention used in the user guide Updated typical frequency of low frequency RCOSC to show that it scales with the reference it is calibrated against (i.e. the high speed XOSC) Updated modulation format information in image rejection sections Stated which ETSI EN 300 220 receiver category that is suitable for low power mode Clarified under max ratings that I/O voltages should not exceed device supply voltage by more than 0.3 V Various minor spelling errors corrected SWRS120 March 2012 Initial release PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SWRS120B – REVISED MARCH 2013 Page 25 of 25 PACKAGE OPTION ADDENDUM www.ti.com 13-May-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) CC1125RHBR ACTIVE QFN RHB 32 3000 Green (RoHS CU NIPDAUAG Level-3-260C-168 HR & no Sb/Br) -40 to 85 CC1125 CC1125RHBT ACTIVE QFN RHB 32 250 Green (RoHS CU NIPDAUAG Level-3-260C-168 HR & no Sb/Br) -40 to 85 CC1125 CC1125RHMR NRND QFN RHM 32 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 CC1125 CC1125RHMT NRND QFN RHM 32 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 CC1125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 13-May-2013 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing CC1125RHBR QFN RHB 32 CC1125RHBT CC1125RHMR QFN RHB QFN RHM SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CC1125RHBR QFN RHB 32 3000 338.1 338.1 20.6 CC1125RHBT QFN RHB 32 250 210.0 185.0 35.0 CC1125RHMR QFN RHM 32 3000 338.1 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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