ONSEMI DAC

DAC−08 SERIES
8−Bit High−Speed
Multiplying D/A Converter
The DAC-08 series of 8-bit monolithic multiplying Digital-toAnalog Converters provide very high-speed performance coupled
with low cost and outstanding applications flexibility.
Advanced circuit design achieves 70 ns settling times with very
low glitch and at low power consumption. Monotonic multiplying
performance is attained over a wide 20-to-1 reference current range.
Matching to within 1 LSB between reference and full-scale currents
eliminates the need for full-scale trimming in most applications.
Direct interface to all popular logic families with full noise immunity
is provided by the high swing, adjustable threshold logic inputs.
Dual complementary outputs are provided, increasing versatility
and enabling differential operation to effectively double the peak-topeak output swing. True high voltage compliance outputs allow
direct output voltage conversion and eliminate output op amps in
many applications.
All DAC-08 series models guarantee full 8-bit monotonicity and
linearities as tight as 0.1% over the entire operating temperature
range. Device performance is essentially unchanged over the
"4.5 V to "18 V power supply range, with 37 mW power
consumption attainable at "5.0 V supplies.
The compact size and low power consumption make the DAC-08
attractive for portable and military aerospace applications.
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SOIC−16
D SUFFIX
CASE 751B
16
1
PDIP−16
N SUFFIX
CASE 648
16
1
PIN CONNECTIONS
N Package
VLC 1
16 COMPEN
Features
IO 2
15 VREF−
•
•
•
•
•
•
•
•
•
•
•
V− 3
14 V
REF+
IO 4
13 V+
Fast Settling Output Current − 70 ns
Full-Scale Current Prematched to "1.0 LSB
Direct Interface to TTL, CMOS, ECL, HTL, PMOS
Relative Accuracy to 0.1% Maximum Overtemperature Range
High Output Compliance −10 V to +18 V
True and Complemented Outputs
Wide Range Multiplying Capability
Low FS Current Drift − "10ppm/°C
Wide Power Supply Range − "4.5 V to "18 V
Low Power Consumption − 37 mW at "5.0 V
Pb−Free Packages are Available*
Applications
•
•
•
•
•
•
•
•
•
•
•
8-Bit, 1.0 ms A-to-D Converters
Servo-Motor and Pen Drivers
Waveform Generators
Audio Encoders and Attenuators
Analog Meter Drivers
Programmable Power Supplies
CRT Display Drivers
High-Speed Modems
Other Applications where Low Cost, High Speed and Complete
Input/Output Versatility are Required
Programmable Gain and Attenuation
Analog-Digital Multiplication
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
October, 2005 − Rev. 1
1
B1 (MSB) 5
12 B8 (LSB)
B2 6
11 B7
B3 7
10 B6
B4 8
9
B5
(Top View)
D Package*
V+ 1
16 B8 (LSB)
VREF+ 2
15 B7
VREF− 3
14 B6
COMPEN 4
13 B5
VLC 5
12 B4
IO 6
11 B3
V− 7
10 B2
IO 8
9
B1 (MSB)
(Top View)
*SO and non−standard pinouts.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 13 of this data sheet.
Publication Order Number:
DAC−08/D
DAC−08 SERIES
V+
MSB
B1
VLC
13
1
5
B2
6
B3
7
B4
8
B5
9
B6
10
LSB
B8
B7
11
12
4
BIAS
NETWORK
CURRENT
SWITCHES
14
VREF(+)
VREF(−)
2
IOUT
IOUT
+
−
15
REFERENCE
AMPLIFIER
16
COMP.
3
V−
Figure 1. Block Diagram
PIN FUNCTION DESCRIPTION
Pin # N Package / D Package
Symbol
1/5
VLC
Description
2/6
IO
Inverted Output Current
3/7
V−
Negative Power Supply
4/8
IO
Non−Inverted Output Current
5/9
B1
Output 1, Most Significant Bit (MSB)
6/10
B2
Output 2
Logic Control Voltage
7/11
B3
Output 3
8/12
B4
Output 4
9/13
B5
Output 5
10/14
B6
Output 6
11/15
B7
Output 7
12/16
B8
Output 8, Least Significant Bit (LSB)
13/1
V+
Positive Power Supply
14/2
VREF+
Positive Reference Voltage
15/3
VREF−
Negative Reference Voltage
16/4
COMPEN
Compensator Capacitor Pin
MAXIMUM RATINGS
Symbol
Value
Unit
Power Supply Voltage
Rating
V+ to V−
36
V
Digital Input Voltage
V5−V12
V− to V− plus 36 V
−
VLC
V− to V+
−
Applied Output Voltage
V0
V− to +18
V
Reference Current
I14
5.0
mA
V14, V15
VEE to VCC
Logic Threshold Control
Reference Amplifier Inputs
Maximum Power Dissipation
Tamb = 25°C (Still-Air) (Note 1)
PD
N Package
D Package
−
mW
1450
1090
Thermal Resistance, Junction−to−Ambient
RqJA
N Package
D Package
Lead Soldering Temperature (10 sec max)
Operating Temperature Range
Operating Junction Temperature
°C/W
75
105
TSOLD
230
°C
Tamb
0 to +70
°C
TJ
150
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
1. Derate above 25°C, at the following rates:
N package at 13.3 mW/°C
D package at 9.5 mW/°C.
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2
DAC−08 SERIES
DC ELECTRICAL CHARACTERISTICS Pin 3 must be at least 3.0 V more negative than the potential to which R15 is returned.
VCC = "15 V , IREF = 2.0 mA. Output characteristics refer to both IOUT and IOUT unless otherwise noted. Tamb = 0°C to 70°C.
DAC−08C
Characteristic
Resolution
Symbol
Test Conditions
Min
Typ
Max
Min
Typ
Max
Unit
−
−
8.0
8.0
8.0
8.0
8.0
8.0
Bits
8.0
8.0
8.0
8.0
8.0
8.0
−
−
"0.39
−
−
"0.19
−
−
"0.78
−
−
"0.39
Monotonicity
Relative Accuracy
DAC−08E
−
Overtemperature
Range
Differential Non-Linearity
%FS
TCIFS
−
−
"10
−
−
"10
−
ppm/°C
Output Voltage Compliance
VOC
Full-Scale Current
Change < 1/2LSB
−10
−
+18
−10
−
+18
V
Full-Scale Current
IFS4
VREF = 10.000 V;
R14, R15 = 5.000 kW
1.94
1.99
2.04
1.94
1.99
2.04
mA
Full-Scale Symmetry
IFSS
IFS4-IFS2
−
"2.0
"16
−
"1.0
"8.0
mA
Zero-Scale Current
IZS
−
−
0.2
4.0
−
0.2
2.0
mA
IFSR
R14, R15 = 5.000 kW
2.1
−
−
2.1
−
−
mA
4.2
−
−
4.2
−
−
mA
−
2.0
−
−
0.8
−
−
2.0
−
−
0.8
−
VLC = 0 V
VIN = −10 V to +0.8 V
VIN = 2.0 V to 18 V
−
−
−2.0
0.002
−10
10
−
−
−2.0
0.002
−10
10
Full-Scale Tempco
Full-Scale Output
Current Range
VREF = +15 V,
V− = −10 V
VREF = +25 V,
V− = −12 V
Logic Input Levels
Low
High
VIL
VIH
Logic Input Current
Low
High
IIL
IIH
Logic Input Swing
VLC = 0 V
V
mA
VIS
V− = −15 V
−10
−
+18
−10
−
+18
V
Logic Threshold Range
VTHR
VS = "15 V
−10
−
+13.5
−10
−
+13.5
V
Reference Bias Current
I15
−
−
−1.0
−3.0
−
−1.0
−3.0
mA
dl/dt
−
4.0
8.0
−
4.0
8.0
−
mA/ms
−
0.0003
0.01
−
0.0003
0.01
%FS/
%VS
−
0.002
0.01
−
0.002
0.01
%FS/
%VS
Reference Input Slew Rate
Power Supply Sensitivity
Positive
Negative
Power Supply Current
Positive
Negative
PSSIFS+
PSSIFS−
IREF = 1.0 mA
V+ = 4.5 to 5.5 V,
V− = −15 V; V+ = 13.5
to 16.5 V, V− = −15 V
V− = −4.5 to −5.5 V,
V+ = +15 V;
V− = −13.5 to −16.5 V,
V+ = +15 V
mA
I+
I−
VS = "5.0 V,
IREF = 1.0 mA
−
−
3.1
−4.3
3.8
−5.8
−
−
3.1
−4.3
3.8
−5.8
Positive
Negative
I+
I−
VS = +5.0 V, −15 V,
IREF = 2.0 mA
−
−
3.1
−7.1
3.8
−7.8
−
−
3.1
−7.1
3.8
−7.8
Positive
Negative
I+
I−
VS = "15 V,
IREF = 2.0 mA
−
−
3.2
−7.2
3.8
−7.8
−
−
3.2
−7.2
3.8
−7.8
PD
"5.0 V, IREF = 1.0 mA
+5.0 V, −15 V,
IREF = 2.0 mA
"15 V, IREF = 2.0 mA
−
37
48
−
37
48
−
122
136
−
122
136
−
156
174
−
156
174
Power Dissipation
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3
mW
DAC−08 SERIES
DC ELECTRICAL CHARACTERISTICS (continued) Pin 3 must be at least 3.0 V more negative than the potential to which R15 is
returned. VCC = +15 V , IREF = 2.0 mA. Output characteristics refer to both IOUT and IOUT unless otherwise noted. Tamb = 0°C to 70°C.
DAC−08H
Symbol
Test Conditions
Min
Typ
Max
Unit
Resolution
Monotonicity
−
−
8.0
8.0
8.0
8.0
8.0
8.0
Bits
Relative Accuracy
Differential Non-Linearity
−
Overtemperature Range
−
−
−
−
"0.1
"0.19
%FS
%FS
TCIFS
−
−
"10
"50
ppm/°C
Output Voltage Compliance
VOC
Full-Scale Current Change 1/2LSB
−10
−
+18
V
Full-Scale Current
IFS4
VREF = 10.000 V, R14,
R15 = 5.000 kW
1.984
1.992
2.000
mA
Full-Scale Symmetry
IFSS
IFS4−IFS2
−
"1.0
"4.0
mA
Zero-Scale Current
IZS
−
−
0.2
1.0
mA
Full-Scale Output Current Range
IFSR
R14, R15 = 5.000 kW
VREF = +15 V, V− = −10 V
VREF = +25 V, V−=−12 V
2.1
4.2
−
−
−
−
mA
mA
−
2.0
−
−
0.8
−
Characteristic
Full-Scale Tempco
Logic Input Levels
Low
High
VIL
VIH
Logic Input Current
Low
High
IIL
IIH
VLC = 0 V
VIN = −10 V to +0.8 V
VIN = 2.0 V to 18 V
−
−
−2.0
0.002
−10
10
Logic Input Swing
VIS
V− = −15 V
−10
−
+18
V
Logic Threshold Range
VTHR
VS = "15 V
−10
−
+13.5
V
Reference Bias Current
I15
−
−
−1.0
−3.0
mA
dl/dt
−
4.0
8.0
−
mA/ms
Reference Input Slew Rate
VLC = 0 V
Power Supply Sensitivity
V
mA
IREF = 1.0 mA
Positive
PSSIFS+
V+ = 4.5 to 5.5 V, V− = −15 V;
V+ = 13.5 to 16.5 V, V− = −15 V
−
0.0003
0.01
%FS/%VS
Negative
PSSIFS−
V− = −4.5 to −5.5 V, V+ = +15 V;
V− = −13.5 to −16.5 V, V+ = +15 V
−
0.002
0.01
%FS/%VS
I+
I−
VS = "5.0 V, IREF = 1.0 mA
−
−
3.1
−4.3
3.8
−5.8
Positive
Negative
I+
I−
VS = +5.0 V, −15 V, IREF = 2.0 mA
−
−
3.1
−7.1
3.8
−7.8
Positive
Negative
I+
I−
VS = "15 V, IREF = 2.0 mA
−
−
3.2
−7.2
3.8
−7.8
PD
"5.0 V, IREF = 1.0 mA
+5.0 V, −15 V, IREF = 2.0 mA
"15 V, IREF = 2.0 mA
−
−
−
37
122
156
48
136
174
Power Supply Current
Positive
Negative
Power Dissipation
mA
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4
mW
DAC−08 SERIES
AC ELECTRICAL CHARACTERISTICS
DAC−08C
Characteristic
DAC−08E
DAC−08H
Symbol
Test Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
tS
To "1/2LSB, All
Bits Switched On or
Off, Tamb = 25°C
−
70
135
−
70
135
−
70
135
ns
tPLH
Tamb = 25°C,
Each Bit
All Bits Switched
Settling Time
Propagation Delay
Low-to-High
ns
High-to-Low
tPHL
−
35
60
−
35
60
−
35
60
TEST CIRCUITS
VREF
V−
V+
3
13
RREF
16
14
DAC-08
15
5-12
4
1
Rf
2
R15
−
NE5534
CONTROL
LOGIC
ERROR
OUTPUT
+
REFERENCE DAC
ACCURACY > 0.006%
Figure 2. Relative Accuracy Test Circuit
VCC
0.1 mF
2.4 V
eIN
13
+2.0 VDC
5
eIN
6
7
8
9
10
11
12
51 W
DAC-08
14
15
1
2
4
16
15 pF
0.1 mF
tPHL = tPLH = 10 ns
1.0 kW
1.0 kW
1.4 V
0.4 V
1.0 V
RL
SETTLING TIME
0.1 mF
FOR SETTLING TIME
MEASUREMENT
eO (ALL BITS
SWITCHED LOW
TO HIGH)
CO ≤ 25 pF
RL = 500 W
0
tS = 70 ns TYPICAL
TO ±1/2 LSB
TRANSIENT 0
RESPONSE
-100 mV
3
VEE
RL = 50 W
PIN 4 TO GND
tPLH
Figure 3. Transient Response and Settling Time
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5
USE RL to GND
FOR TURN OFF
MEASUREMENT
tPHL
DAC−08 SERIES
TEST CIRCUITS
VCC
2V
RIN
13
1 kW
5
REQ = 200 W
6
14
7
15
8
0
VIN
RP
1
DAC-08
9
2
10
4
11
16
OPEN
12
10%
SCOPE
RL
0.1 mF
3
dI
I dV
+
dt
R L dt
0
90%
2.0 mA
SLEWING TIME
VEE
Figure 4. Reference Current Slew Rate Measurement
VCC
ICC
13
I14
A1
A2
A3
A4
A5
DIGITAL
INPUTS
A6
A7
A8
(+)
5
R14
14
VREF (+)
6
7
15
8
1
DAC-08
9
I15
R15
2
10
VO
OUTPUT
4
11
12
16
IO
RL
II
VI
3
C
IEE
NOTES:
(See text for values of C.)
Typical values of R14 = R15 = 1 kW
VREF = +2.0 V
VEE
C = 15 pF
VI and II apply to inputs A1 through A8
The resistor tied to Pin 15 is to temperature compensate the bias current and may not be necessary for all applications.
I
O
+ K
Ť
A1
2
where K [
)
A2
4
)
A3
8
)
A4
16
)
A5
32
)
A6
64
)
A7
A8
)
128
256
Ť
V REF
R 14
and AN = ‘1’ if AN is at High Level
AN = ‘0’ if AN is at Low Level
Figure 5. Notation Definitions
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6
DAC−08 SERIES
TYPICAL PERFORMANCE CHARACTERISTICS
ALL BITS ON
OUTPUT CURRENT (mA)
3.2
TA = Tmin TO Tmax
2.8
2.5V
2.4
V− = −15V
IREF = 2mA
V− = −5V
2.0
VIN
IOUT
−0.5mA
IREF = 1mA
1.2
1.0mA
IOUT
0.8
−2.5mA
IREF = 0.2mA
0.4
0
−14 −10
0mA
0.5V
1.6
−6
−2 0 2
6
10
14
IOUT
2.0mA
200ns/division
18
REQ = 200W, RL = 100W, CC = 0
OUTPUT VOLTAGE (V)
Figure 6. Output Current
vs. Output Voltage
(Output Voltage Compliance)
(00000000)
ALL BITS SWITCHED ON
2.4V
BIT 8 2.4V
LOGIC
INPUT
0.4V
0V
0.4V
OUTPUT − 1/2LSB
0
SETTLING +1/2LSB
8mA
IOUT
Figure 8. True and
Complementary Output Operation
I FS − OUTPUT CURRENT (mA)
Figure 7. Fast Pulsed Reference
Operation
0
(11111111)
5.0
TA = Tmin TO Tmax
ALL BITS “HIGH”
4.0
LIMIT FOR
V−=−15V
3.0
LIMIT FOR
V−=−5V
2.0
1.0
0
50ns/DIVISIOM
IFS=2mA, RL=1kW 1/2LSB=4mA
0
50ns/DIVISIOM
Figure 9. Full−Scale Settling Time
Figure 10. LSB Switching
1.0
2.0
3.0
4.0
5.0
IREF − REFERENCE CURRENT (mA)
Figure 11. Full−Scale Current
vs. Reference Current
6
400
RELATIVE OUTPUT (dB)
4
300
200
1LSB=7.8mA
100
10
5.0
2.0
1.0
0.5
0.2
0.1
.05
0
.02
1LSB=78nA
.05
.01
PROPAGATION DELAY (ns)
500
2
0
−2
−4
1
−6
R14=R15=1kW
−8
−10
RL ≤ 500W
ALL BITS “ON”
−12
VR15 = 0V
−14
0.1
0.2
IFS − OUTPUT FULL SCALE CURRENT (mA)
Figure 12. LSB Propagation
Delay vs. IFS
2
3
0.5
1.0
2.0
FREQUENCY (MHz)
5.0
10
Figure 13. Reference Input
Frequency Response
NOTES:
Curve 1:
Curve 1:
Curve 1:
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7
CC = 15pF, VIN = 2.0VP-P centered at +1.0V
CC = 15pF, VIN = 5m0VP-P centered at +200mV
CC = 15pF, VIN = 100m0VP-P centered at 0V
and applied through 50W connected to Pin 14.
+2.0V applied to R14.
DAC−08 SERIES
TYPICAL PERFORMANCE CHARACTERISTICS
V− = −15V
2.0
V− = −5V
V+ = +5V
IREF = 2mA
1.6
1.2
0.8
IREF = 1mA
IREF = 0.2mA
0.4
0
−14 −10 −6
−2 0 2
6
10
14 18
V15 − REFERENCE COMMON MODE VOLTAGE (V)
POSITIVE COMMON-MODE RANGE IS ALWAYS (V+) −1.5V.
Figure 14. Reference AMP
Common−Mode Range All Bits On
8.0
6.0
(V)
2.4
VTHLC− V
TA = TMIN to TMAX
2.8
LOGIC INPUT CURRENT ( μ A)
OUTPUT CURRENT (mA)
3.2
4.0
2.0
0
−12
−8 −4
0
4
8 12
LOGIC INPUT VOLTAGE (V)
16
2.0
1.8
1.6
1.4
1.2
1.o
0.8
0.6
0.4
0.2
0
Figure 15. Logic Input Current
vs. Input Voltage
−50
0
50
100
TEMPERATURE (°C)
150
Figure 16. VTH−VLC vs.
Temperature
20
1.4
Shaded area indicates
permissible output voltage
8
range for V− = -15V, IREF ≤ 2.0mA
4
For other V− or IREF
See “Output Current vs Output
Voltage” curve on previous page
0
−4
−8
IREF = 2.0mA
−50
0
50
100
0.8
0.6
B2
0.4
B3
V− = −15V
V− = −5V
0
−12
150
B1
1.0
0.2
−12
POWER SUPPLY CURRENT (mA)
OUTPUT CURRENT (mA)
1.2
12
B4
B5
−8
−4
0
4
8
12
LOGIC INPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 17. Output Voltage Compliance
vs. Temperature
8
7
ALL BITS HIGH OR LOW
I−
6
5
4
3
I+
2
1
0
−50
0
50
100
150
V+ − POSITIVE POWER SUPPLY (VDC)
16
Figure 18. Bit Transfer
Characteristics
Figure 19. Power Supply
Current vs. V+
NOTES:
B1 through B8 have identical transfer characteristics.
Bits are fully switched, with less than 1/2LSB error, at
less than ±100mV from actual threshold. These switching
points are guaranteed to lie between 0.8 and 2.0V over
the operating temperature range (VLC = 0.0V).
BITS MAY BE HIGH OR LOW
I− WITH IREF = 2mA
7
6
I− WITH IREF = 1mA
5
4
I− WITH IREF = 0.2mA
3
2
I+
1
0
0
−4.0
−8.0
−12
−16
−20
V− − NEGATIVE POWER SUPPLY (VDC)
Figure 20. Power Supply
Current vs. V−
8
BITS MAY BE HIGH OR LOW
V− = +15V
I−
7
6
IREF = 2.0mA
5
4
3
V+ = +15V
1,000
F
(kHz)
MAX
8
POWER SUPPLY CURRENT (mA)
10,000
POWER SUPPLY CURRENT (mA)
OUTPUT VOLTAGE (V)
16
100
I+
2
1
0
10
−50
0
50
100
TEMPERATURE (°C)
150
Figure 21. Power Supply
Current vs. Temperature
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8
1
100
10
1000
CC (pF)
Figure 22. Maximum Reference
Input Frequency vs.
Compensation Capacitor Value
DAC−08 SERIES
Output Voltage Range
+VREF
The voltage at Pin 4 must always be at least 4.5 V more
positive than the voltage of the negative supply (Pin 3)
when the reference current is 2.0 mA or less, and at least
8.0 V more positive than the negative supply when the
reference current is between 2.0 mA and 4.0 mA. This is
necessary to avoid saturation of the output transistors,
which would cause serious accuracy degradation.
OPTIONAL RESISTOR
FOR OFFSET
INPUTS
RIN
0V
NOTES:
REQ = RIN || RP
Typical Values
RIN = 5kW
+VIN = 10V
RP
RREF
14
REQ
=200W 15 16
4
2
NO CAP
Pulsed Referenced Operation
Output Current Range
Any time the full-scale current exceeds 2.0 mA, the
negative supply must be at least 8.0 V more negative than
the output voltage. This is due to the increased internal
voltage drops between the negative supply and the outputs
with higher reference currents.
Figure 23. Typical Application
FUNCTIONAL DESCRIPTION
Reference Amplifier Drive and Compensation
Accuracy
The reference amplifier input current must always flow
into Pin 14 regardless of the setup method or reference
supply voltage polarity.
Connections for a positive reference voltage are shown
in Figure 2. The reference voltage source supplies the full
reference current. For bipolar reference signals, as in the
multiplying mode, R15 can be tied to a negative voltage
corresponding to the minimum input level. R15 may be
eliminated with only a small sacrifice in accuracy and
temperature drift.
The compensation capacitor value must be increased as
R14 value is increased. This is in order to maintain proper
phase margin. For R14 values of 1.0, 2.5, and 5.0 kW,
minimum capacitor values are 15, 37, and 75 pF,
respectively. The capacitor may be tied to either VEE or
ground, but using VEE increases negative supply rejection.
(Fluctuations in the negative supply have more effect on
accuracy than do any changes in the positive supply.)
A negative reference voltage may be used if R14 is
grounded and the reference voltage is applied to R15 as
shown. A high input impedance is the main advantage of
this method. The negative reference voltage must be at
least 3.0 V above the VEE supply. Bipolar input signals may
be handled by connecting R14 to a positive reference
voltage equal to the peak positive input level at Pin 15.
When using a DC reference voltage, capacitive bypass to
ground is recommended. The 5.0 V logic supply is not
recommended as a reference voltage, but if a well regulated
5.0 V supply which drives logic is to be used as the
reference, R14 should be formed of two series resistors with
the junction of the two resistors bypassed with 0.1 mF to
ground. For reference voltages greater than 5.0 V, a clamp
diode is recommended between Pin 14 and ground.
If Pin 14 is driven by a high impedance such as a
transistor current source, none of the above compensation
methods applies and the amplifier must be heavily
compensated, decreasing the overall bandwidth.
Absolute accuracy is the measure of each output current
level with respect to its intended value, and is dependent
upon relative accuracy, full-scale accuracy and full-scale
current drift. Relative accuracy is the measure of each
output current level as a fraction of the full-scale current
after zero-scale current has been nulled out. The relative
accuracy of the DAC-08 series is essentially constant over
the operating temperature range due to the excellent
temperature tracking of the monolithic resistor ladder. The
reference current may drift with temperature, causing a
change in the absolute accuracy of output current.
However, the DAC-08 series has a very low full-scale
current drift over the operating temperature range.
The DAC-08 series is guaranteed accurate to within
"LSB at +25°C at a full-scale output current of 1.992 mA.
The relative accuracy test circuit is shown in Figure 2. The
12-bit converter is calibrated to a full-scale output current
of 1.99219 mA, then the DAC-08 full-scale current is
trimmed to the same value with R14 so that a zero value
appears at the error amplifier output. The counter is
activated and the error band may be displayed on the
oscilloscope, detected by comparators, or stored in a peak
detector.
Two 8-bit D-to-A converters may not be used to construct
a 16-bit accurate D-to-A converter. 16-bit accuracy implies
a total of " part in 65,536, or "0.00076%, which is much
more accurate than the "0.19% specification of the
DAC-08 series.
Monotonicity
A monotonic converter is one which always provides
analog output greater than or equal to the preceding value
for a corresponding increment in the digital input code. The
DAC-08 series is monotonic for all values of reference
current above 0.5 mA. The recommended range for
operation is a DC reference current between 0.5 mA and
4.0 mA.
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9
DAC−08 SERIES
Settling Time
functions in a positive-going ramp mode, the worst-case
condition does not occur and settling times less than 70 ns
may be realized.
Extra care must be taken in board layout since this
usually is the dominant factor in satisfactory test results
when measuring settling time. Short leads, 100 mF supply
bypassing for low frequencies, minimum scope lead
length, and avoidance of ground loops are all mandatory.
The worst-case switching condition occurs when all bits
are switched on, which corresponds to a low-to-high
transition for all input bits. This time is typically 70 ns for
settling to within LSB for 8-bit accuracy. This time applies
when RL < 500 W and CO < 25 pF. The slowest single
switch is the least significant bit, which typically turns on
and settles in 65 ns. In applications where the DAC
VS + = +15V
VIN
C3
VADJ
Q1
D3
R1 = 1000W
R14 = 5kW
5
VREF = 10V
R2 = 1000W
VOUT
6 7 8 9 10 11 12
14
4
IREF = 2mA
VOUT
DUT
D1
2
15
16
3
1
C1
R15 = 5kW
50W
C5
C2
C4
D2
NOTES:
VS − = −15V
D1, D2 = IN6263 or equivalent
D3 = IN914 or equivalent
C1 = 0.01mF
C2, C3 = 0.1mF
Q1 = 2N3904
C4, C5 = 15pF and includes all probe and fixturing capacitance.
Figure 24. Settling Time and Propagation Delay
MSB 2
3 4 5 6 7
LSB
+VREF
RREF
IREF
5
(LOW T.C.)
6 7 8 9 10 11 12
14
4
IO
DAC-08
2
15
3
16
V−
13
1
V+
CCOMP
0.1mF
0.1mF
NOTES:
) V REF
255
I
[
x
; I ) I
+ I
for all logic states
FS
O
O
FS
R REF
256
Figure 25. Basic DAC−08 Configuration
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10
IO
R3 = 500W
DAC−08 SERIES
VREF
R1
R2
14
4
DAC-08
2
15
R3
R4 = 1MW
NOTES:
R1 = low T.C.
R3 = R1 + R2
R2 ≈ 0.1 R1 to minimize pot. contribution to full-scale drift
V−
V+
RS = 20kW
Figure 26. Recommended Full−Scale and Zero−Scale Adjust
5kW (LOW T.C.)
IR = 2mA
−
NE531
OR
EQUIV
+
4
14
15
DAC-08
2
VOUT =
0 TO +10V
5kW
Figure 27. Unipolar Voltage Output for Low Impedance Output
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11
DAC−08 SERIES
V = 10V
5kW
5kW
VOUT
4
IR = 2mA
DAC-08
14
2
VOUT
a. Positive Output
VOUT
4
IR = 2mA
DAC-08
14
2
VOUT
b. Negative Output
Figure 28. Unipolar Voltage Output for High Impedance Output
V = 10V
10kW
10kW
4
IR = 2mA
DAC-08
VOUT
14
2
VOUT
B1
B2
B3
B4
B5
B6
B7
B8
VOUT
VOUT
Positive full-scale
1
1
1
1
1
1
1
1
−9.920V
+10.000
Positive FS − 1LSB
1
1
1
1
1
1
1
0
−9.840V
+9.920
+ Zero-scale + 1LSB
Zero-scale
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
−0.080V
0.000
+0.160
+0.080
Zero-scale − 1LSB
0
1
1
1
1
1
1
1
0.080
0.000
Negative full scale − 1LSB
0
0
0
0
0
0
0
1
+9.920
−9.840
Negative full scale
0
0
0
0
0
0
0
0
+10.000
−9.920
Figure 29. Basic Bipolar Output Operation (Offset Binary)
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12
DAC−08 SERIES
ORDERING INFORMATION
Description
Temperature Range
Shipping†
DAC−08ED
16−Pin Plastic Small Outline Package
0 to +70°C
48 Units/Rail
DAC−08EDG
16−Pin Plastic Small Outline Package
(Pb−Free)
0 to +70°C
48 Units/Rail
DAC−08EDR2
16−Pin Plastic Small Outline Package
0 to +70°C
2500 Tape & Reel
DAC−08EDR2G
16−Pin Plastic Small Outline Package
(Pb−Free)
0 to +70°C
2500 Tape & Reel
DAC−08CN
16−Pin Plastic Dual In−Line Package
0 to +70°C
25 Units/Rail
DAC−08CNG
16−Pin Plastic Dual In−Line Package
(Pb−Free)
0 to +70°C
25 Units/Rail
DAC−08EN
16−Pin Plastic Dual In−Line Package
0 to +70°C
25 Units/Rail
DAC−08ENG
16−Pin Plastic Dual In−Line Package
(Pb−Free)
0 to +70°C
25 Units/Rail
DAC−08HN
16−Pin Plastic Dual In−Line Package
0 to +70°C
25 Units/Rail
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
MARKING DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
DAC−08EDG
AWLYWW
PDIP−16
N SUFFIX
CASE 648
16
16
16
DAC−08CN
AWLYYWWG
1
DAC−08EN
AWLYYWWG
1
DAC−08HN
AWLYYWWG
1
A
WL
YY, Y
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
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13
DAC−08 SERIES
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−A−
16
9
−B− P
1
8 PL
0.25 (0.010)
8
B
M
S
G
R
K
DIM
A
B
C
D
F
G
J
K
M
P
R
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
S
PDIP−16
N SUFFIX
CASE 648−08
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
−A−
16
9
1
8
B
F
C
L
S
−T−
SEATING
PLANE
K
H
D
M
J
G
16 PL
0.25 (0.010)
M
T A
M
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740 0.770
0.250 0.270
0.145 0.175
0.015 0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
0_
10 _
0.020 0.040
MILLIMETERS
MIN
MAX
18.80 19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
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time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
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DAC−08/D