DAC0800/DAC0802 8-Bit Digital-to-Analog Converters General Description Features The DAC0800 series are monolithic 8-bit high-speed current-output digital-to-analog converters (DAC) featuring typical settling times of 100 ns. When used as a multiplying DAC, monotonic performance over a 40 to 1 reference current range is possible. The DAC0800 series also features high compliance complementary current outputs to allow differential output voltages of 20 Vp-p with simple resistor loads. The reference-to-full-scale current matching of better than ± 1 LSB eliminates the need for full-scale trims in most applications, while the nonlinearities of better than ± 0.1% over temperature minimizes system error accumulations. n n n n n n n n n n n The noise immune inputs will accept a variety of logic levels. The performance and characteristics of the device are essentially unchanged over the ± 4.5V to ± 18V power supply range and power consumption at only 33 mW with ± 5V supplies is independent of logic input levels. Fast settling output current: 100 ns Full scale error: ± 1 LSB Nonlinearity over temperature: ± 0.1% Full scale current drift: ± 10 ppm/˚C High output compliance: −10V to +18V Complementary current outputs Interface directly with TTL, CMOS, PMOS and others 2 quadrant wide range multiplying capability Wide power supply range: ± 4.5V to ± 18V Low power consumption: 33 mW at ± 5V Low cost The DAC0800, DAC0802, DAC0800C and DAC0802C are a direct replacement for the DAC-08, DAC-08A, DAC-08C, and DAC-08H, respectively. For single supply operation, refer to AN-1525. Typical Application 00568601 FIGURE 1. ± 20 VP-P Output Digital-to-Analog Converter (Note 4) Ordering Information NonLinearity Temperature Range (TA) Order Numbers J Package (J16A) * ± 0.1% FS 0˚C to +70˚C DAC0802LCJ ± 0.19% FS −55˚C to +125˚C DAC0800LJ ± 0.19% FS 0˚C to +70˚C DAC0800LCJ DAC-08HQ N Package (N16E) * SO Package (M16A) DAC0802LCN DAC-08HP DAC0802LCM DAC-08Q DAC-08EQ DAC0800LCN DAC-08EP DAC0800LCM * Devices may be ordered by using either order number. © 2006 National Semiconductor Corporation DS005686 www.national.com DAC0800/DAC0802 8-Bit Digital-to-Analog Converters September 2006 DAC0800/DAC0802 Absolute Maximum Ratings (Note 1) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V+ − V−) Reference Input Differential Voltage Reference Input Common-Mode +125 ˚C DAC0800LC 0 +70 ˚C DAC0802LC 0 +70 ˚C (V−) + 10 (V−) + 30 V −15 −5 V − 5 mA V− to V− plus 36V Logic Inputs −55 V− V− to V+ Reference Input Current Units V+ V− to V+ Range (V14, V15) Max DAC0800L 500 mW (V14 to V15) Min Temperature (TA) ± 18V or 36V Power Dissipation (Note 2) (Note 1) IREF (V = −5V) 1 2 mA IREF (V− = −15V) 1 4 mA Analog Current Outputs (VS− = −15V) 4.25 mA ESD Susceptibility (Note 3) TBD V Storage Temperature −65˚C to +150˚C Lead Temp. (Soldering, 10 seconds) Dual-In-Line Package (plastic) 260˚C Dual-In-Line Package (ceramic) 300˚C Surface Mount Package Vapor Phase (60 seconds) 215˚C Infrared (15 seconds) 220˚C Electrical Characteristics The following specifications apply for VS = ± 15V, IREF = 2 mA and TMIN ≤ TA ≤ TMAX unless otherwise specified. Output characteristics refer to both IOUT and IOUT. Symbol Parameter Typ Max Min Typ Max Resolution 8 8 8 8 8 8 Monotonicity 8 8 8 8 8 Settling Time tPLH, tPHL Units Min ± 0.1 Nonlinearity ts DAC0800L/ DAC0800LC DAC0802LC Conditions Propagation Delay To ± 1⁄2 LSB, All Bits Switched “ON” or “OFF”, TA=25˚C 100 DAC0800LC 100 150 ns 35 60 ns TA=25˚C 35 VOC Output Voltage Compliance Full Scale Current Change < 1⁄2 LSB, ROUT > 20 MΩ, Typical IFS4 Full Scale Current VREF = 10.000V, R14 = R15 = 5.000 kΩ, TA=25˚C IFS4−IFS2 IFSR Output Current Range www.national.com ns ns All Bits Switched Zero Scale Current 135 135 Full Scale Tempco Full Scale Symmetry Bits %FS 100 TCIFS IFSS 8 ± 0.19 DAC0800L Each Bit IZS Bits 35 60 35 60 ns ± 10 ± 50 ± 10 ± 50 ppm/˚C 18 V 1.99 2.04 mA −10 1.984 V− = −5V V− = −8V to −18V 0 0 2 60 18 −10 1.992 2.00 1.94 ± 0.5 ± 4.0 ±1 ± 8.0 µA 0.1 1.0 0.2 2.0 µA 2.0 2.0 2.1 4.2 2.0 2.0 2.1 4.2 mA 0 0 (Continued) The following specifications apply for VS = ± 15V, IREF = 2 mA and TMIN ≤ TA ≤ TMAX unless otherwise specified. Output characteristics refer to both IOUT and IOUT. Symbol Parameter Min Logic Input Levels VIL Logic “0” VIH Logic “1” DAC0800L/ DAC0800LC DAC0802LC Conditions Typ Max Min Typ VLC = 0V 0.8 2.0 Logic Input Current Units Max 0.8 2.0 V V VLC = 0V IIL Logic “0” −10V ≤ VIN ≤ +0.8V −2.0 −10 −2.0 −10 µA IIH Logic “1” 2V ≤ VIN ≤ +18V 0.002 10 0.002 10 µA 18 V VIS Logic Input Swing V− = −15V −10 VTHR Logic Threshold Range VS = ± 15V −10 I15 Reference Bias Current dl/dt Reference Input Slew Rate (Figure 11) PSSIFS+ Positive Power Supply Sensitivity 4.5V ≤ V+ ≤ 18V 0.0001 0.01 0.0001 0.01 %/% PSSIFS− Negative Power Supply Sensitivity −4.5V ≤ V− ≤ 18V, IREF = 1mA 0.0001 0.01 0.0001 0.01 %/% Power Supply Current VS = ± 5V, IREF = 1 mA 2.3 3.8 2.3 3.8 mA −4.3 −5.8 −4.3 −5.8 mA Power Supply Current VS = +5V, −15V, IREF = 2 mA 2.4 3.8 2.4 3.8 mA −6.4 −7.8 −6.4 −7.8 mA 2.5 3.8 2.5 3.8 mA I+ I− I+ I− I+ I− PD Power Supply Current Power Consumption −1.0 4.0 18 −10 13.5 −10 −3.0 8.0 VS = ± 15V, IREF = 2 mA −1.0 4.0 13.5 V −3.0 µA 8.0 mA/µs −6.5 −7.8 −6.5 −7.8 mA ± 5V, IREF = 1 mA 33 48 33 48 mW +5V, −15V, IREF = 2 mA 108 136 108 136 mW ± 15V, IREF = 2 mA 135 174 135 174 mW Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions. Note 2: The maximum junction temperature of the DAC0800 and DAC0802 is 125˚C. For operating at elevated temperatures, devices in the Dual-In-Line J package must be derated based on a thermal resistance of 100˚C/W, junction-to-ambient, 175˚C/W for the molded Dual-In-Line N package and 100˚C/W for the Small Outline M package. Note 3: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Note 4: Pin numbers represent the Dual-In-Line package. The Small Outline package pin numbers differ from from that of the Dual-In-Line package. Connection Diagrams Dual-In-Line Package Small Outline Package 00568614 Top View 00568613 Top View See Ordering Information 3 www.national.com DAC0800/DAC0802 Electrical Characteristics DAC0800/DAC0802 Block Diagram (Note 4) 00568602 Typical Performance Characteristics Full Scale Current vs. Reference Current LSB Propagation Delay vs. IFS 00568623 00568622 Reference Input Frequency Response Reference Amp Common-Mode Range 00568624 00568625 Curve 1: CC=15 pF, VIN=2 Vp-p centered at 1V. Curve 2: CC=15 pF, VIN=50 mVp-p centered at 200 mV. Note. Positive common-mode range is always (V+) − 1.5V. Curve 3: CC=0 pF, VIN=100 mVp-p centered at 0V and applied through 50Ω connected to pin 14.2V applied to R14. www.national.com 4 DAC0800/DAC0802 Typical Performance Characteristics (Continued) Logic Input Current vs. Input Voltage VTH — VLC vs. Temperature 00568627 00568626 Output Current vs. Output Voltage (Output Voltage Compliance) Output Voltage Compliance vs. Temperature 00568629 00568628 Bit Transfer Characteristics Power Supply Current vs. +V 00568631 00568630 Note. B1–B8 have identical transfer characteristics. Bits are fully switched with less than 1⁄2 LSB error, at less than ± 100 mV from actual threshold. These switching points are guaranteed to lie between 0.8 and 2V over the operating temperature range (VLC = 0V). 5 www.national.com DAC0800/DAC0802 Typical Performance Characteristics (Continued) Power Supply Current vs. −V Power Supply Current vs. Temperature 00568632 00568633 Equivalent Circuit 00568615 FIGURE 2. Equivalent Circuit www.national.com 6 DAC0800/DAC0802 Typical Applications 00568605 IO + IO = IFS for all logic states For fixed reference, TTL operation, typical values are: VREF = 10.000V RREF = 5.000k R15 ≈ RREF CC = 0.01 µF VLC = 0V (Ground) FIGURE 3. Basic Positive Reference Operation (Note 4) 00568616 00568621 FIGURE 4. Recommended Full Scale Adjustment Circuit (Note 4) Note. RREF sets IFS; R15 is for bias current cancellation FIGURE 5. Basic Negative Reference Operation (Note 4) 7 www.national.com DAC0800/DAC0802 Typical Applications (Continued) 00568617 B1 B2 B3 B4 B5 B6 B7 B8 Full Scale 1 1 1 1 1 1 1 1 IO mA IOmA EO EO 1.992 0.000 −9.960 0.000 Full Scale−LSB 1 1 1 1 1 1 1 0 1.984 0.008 −9.920 −0.040 Half Scale+LSB 1 0 0 0 0 0 0 1 1.008 0.984 −5.040 −4.920 Half Scale 1 0 0 0 0 0 0 0 1.000 0.992 −5.000 −4.960 Half Scale−LSB 0 1 1 1 1 1 1 1 0.992 1.000 −4.960 −5.000 Zero Scale+LSB 0 0 0 0 0 0 0 1 0.008 1.984 −0.040 −9.920 Zero Scale 0 0 0 0 0 0 0 0 0.000 1.992 0.000 −9.960 FIGURE 6. Basic Unipolar Negative Operation (Note 4) 00568606 B1 B2 B3 B4 B5 B6 B7 B8 EO 1 1 1 1 1 1 1 1 −9.920 +10.000 Pos. Full Scale−LSB 1 1 1 1 1 1 1 0 −9.840 +9.920 Zero Scale+LSB 1 0 0 0 0 0 0 1 −0.080 +0.160 Zero Scale 1 0 0 0 0 0 0 0 0.000 +0.080 Zero Scale−LSB 0 1 1 1 1 1 1 1 +0.080 0.000 Neg. Full Scale+LSB 0 0 0 0 0 0 0 1 +9.920 −9.840 Neg. Full Scale 0 0 0 0 0 0 0 0 +10.000 −9.920 FIGURE 7. Basic Bipolar Output Operation (Note 4) www.national.com EO Pos. Full Scale 8 DAC0800/DAC0802 Typical Applications (Continued) 00568618 If RL = RL within ± 0.05%, output is symmetrical about ground B1 B2 B3 B4 B5 B6 B7 B8 EO Pos. Full Scale 1 1 1 1 1 1 1 1 +9.960 Pos. Full Scale−LSB 1 1 1 1 1 1 1 0 +9.880 (+)Zero Scale 1 0 0 0 0 0 0 0 +0.040 (−)Zero Scale 0 1 1 1 1 1 1 1 −0.040 Neg. Full Scale+LSB 0 0 0 0 0 0 0 1 −9.880 Neg. Full Scale 0 0 0 0 0 0 0 0 −9.960 FIGURE 8. Symmetrical Offset Binary Operation (Note 4) 00568619 For complementary output (operation as negative logic DAC), connect inverting input of op amp to IO (pin 2), connect IO (pin 4) to ground. FIGURE 9. Positive Low Impedance Output Operation (Note 4) 00568620 For complementary output (operation as a negative logic DAC) connect non-inverting input of op am to IO (pin 2); connect IO (pin 4) to ground. FIGURE 10. Low Impedance Negative Output Operation (Note 4) 9 www.national.com DAC0800/DAC0802 Typical Applications (Continued) 00568610 Typical values: RIN=5k,+VIN=10V FIGURE 11. Pulsed Reference Operation (Note 4) 00568609 VTH = VLC + 1.4V 15V CMOS, HTL, HNIL VTH = 7.6V Note. Do not exceed negative logic input range of DAC. FIGURE 12. Interfacing with Various Logic Families www.national.com 10 DAC0800/DAC0802 Typical Applications (Continued) 00568612 (b) +VREF must be above peak positive swing of VIN 00568611 (a) IREF ≥ peak negative swing of IIN FIGURE 13. Accommodating Bipolar References (Note 4) 00568607 FIGURE 14. Settling Time Measurement (Note 4) 11 www.national.com DAC0800/DAC0802 Typical Applications (Continued) 00568608 Note. For 1 µs conversion time with 8-bit resolution and 7-bit accuracy, an LM361 comparator replaces the LM319 and the reference current is doubled by reducing R1, R2 and R3 to 2.5 kΩ and R4 to 2 MΩ. FIGURE 15. A Complete 2 µs Conversion Time, 8-Bit A/D Converter (Note 4) www.national.com 12 DAC0800/DAC0802 Physical Dimensions inches (millimeters) unless otherwise noted Molded Small Outline Package (SO) Order Numbers DAC0800LCM, or DAC0802LCM NS Package Number M16A Molded Small Outline Package (SO) Order Numbers DAC0800LCM, or DAC0802LCM NS Package Number M16A 13 www.national.com DAC0800/DAC0802 8-Bit Digital-to-Analog Converters Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package Order Numbers DAC0800, DAC0802 NS Package Number N16E National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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