DS1135L 3V 3-in-1 High-Speed Silicon Delay Line www.maxim-ic.com FEATURES § § § § § § § § § § All-silicon timing circuit Three independent buffered delays Stable and precise over temperature and voltage Leading and trailing edge precision preserves the input symmetry Standard 8-pin SO (150mil), and 8-Pin µSOP (118mil) Vapor phase and IR reflow solderable Available in Tape and Reel Delays specified over both commercial and industrial temperature ranges 3V operation Recommended replacement for DS1033 PIN ASSIGNMENT IN1 1 8 VCC IN2 2 7 OUT1 IN3 3 6 OUT2 GND 4 5 OUT3 DS1135LZ 8-Pin SO (150mil) DS1135LU 8-Pin µSOP (118mil) See Mech. Drawings Section PIN DESCRIPTION IN1-IN3 OUT1-OUT3 VCC GND - Input Signals - Output Signals - +3V Supply - Ground DESCRIPTION The DS1135L series is a low-power, 3V high-speed version of the popular DS1013, DS1033, DS1035 series. The DS1135L series of delay lines have three independent logic buffered delays in a single package. The device is Dallas Semiconductor’s fastest 3-in-1 delay line. It is available in a standard 8-pin 118mil µSOP and 150mil 8-pin Mini-SO. The device features precise leading and trailing edge accuracy. It has the inherent reliability of an allsilicon delay line solution. Standard delay values are indicated in Table 1. Customers may contact Dallas Semiconductor at (972) 371-4348 for further information on custom delay values. 1 of 6 011402 DS1135-L LOGIC DIAGRAM Figure 1 IN OUT TIME DELAY ONE OF THREE PART NUMBER DELAY TABLE (tPLH , tPHL ) Table 1 PART NUMBER DS1135LX-10 DS1135LX-12 DS1135LX-15 DS1135LX-20 DS1135LX-25 DS1135LX-30 DELAY PER OUTPUT (ns) 10/10/10 12/12/12 15/15/15 20/20/20 25/25/25 30/30/30 INITIAL TOLERANCE (Note 1) ±1.0ns ±1.0ns ±1.0ns ±1.0ns ±1.5ns ±1.5ns TOLERANCE OVER TEMP AND VOLTAGE (Note 2) 0°C to +70°C -40°C to +85°C ±2.0ns ±3.0ns ±2.0ns ±3.0ns ±2.5ns ±4.0ns ±2.5ns ±4.0ns ±3.0ns ±5.0ns ±3.0ns ±5.0ns NOTES: 1. Nominal conditions are +25°C and VCC = +3.3V. 2. Voltage range of 2.7V to 3.6V. 3. Delay accuracies is for both leading and trailing edges. 4. X in Part number denotes package: U indicates µSOP, Z indicates SO. TEST SETUP DESCRIPTION Figure 2 illustrates the hardware configuration used for measuring the timing parameters of the DS1135L. The input waveform is produced by a precision pulse generator under software control. Time delays are measured by a time interval counter (20 ps resolution) connected to the output. The DS1135L output taps are selected and connected to the interval counter by a VHF switch control unit. All measurements are fully automated with each instrument controlled by the computer over an IEEE 488 bus. 2 of 6 DS1135-L DS1135L TEST CIRCUIT Figure 2 PULSE GENERATOR START 3 IN TIME INTERVAL COUNTER 50W STOP VHF SWITCH CONTROL UNIT UNIT UNDER TEST OUT 50W TAPS 1-3 3 of 6 DS1135-L ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature Short Circuit Output Current -1.0V to +6.0 V -40°C to +85°C -55°C to +125°C See J-STD-020A specification 50mA for 1 second * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. DC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Supply Voltage Active Current VCC High Level Input Voltage Low Level Input Voltage Input Leakage High Level Output Current VIH VIL IL Low Level Output Current TEST CONDITION Input-to-Output Delay Output Rise or Fall Time Power-up Time MIN TYP MAX UNITS 2.7 3.3 3.6 V 10 mA VCC +0.5 0.8 +1.0 V V mA -1.0 mA VCC =3.6V Period=1ms ICC 0V≤VI ≤VCC ICC VCC =2.7V VOH =2V ICC VCC =2.7V VOL=0.4V AC ELECTRICAL CHARACTERISTICS PARAMETER Period Input Pulse Width (-40°C to +85°C;VCC=2.7-3.6V) SYMBOL tPERIOD tWI tPLH, tPHL tOF, tOR tPU 2.0 -0.5 -1.0 8 mA (-40°C to +85°C;VCC=2.7-3.6V) MIN TYP 2 (tWI ) 100% of Delay Value See Table 1 2.0 MAX UNITS ns ns 2.5 1 ns ns ms CAPACITANCE PARAMETER Input Capacitance NOTES 2 (TA=25°C) SYMBOL CIN MIN 4 of 6 TYP MAX 10 UNITS pF NOTES DS1135-L TEST CONDITIONS Ambient Temperature: 25°C ± 3°C Supply Voltage (VCC ): 3.3V ± 0.1V Input Pulse: High: 3.0V ± 0.1V Low: 0.0V ± 0.1V Source Impedance: 50W Max. Rise and Fall Time: 3.0ns Max. — Measured between 0.6V and 2.4V. Pulse Width: 500ns Pulse Period: 1ms Output Load Capacitance: 15pF Output: Each output is loaded with the equivalent of one 74F04 input gate. Data is measured at the 1.5V level on the rising and falling edges. Note: The above conditions are for test only and do not restrict the devices under other data sheet conditions. TIMING DIAGRAM PERIOD tRISE 80% 20% tFALL 1.5V 1.5V 1.5V IN tWI tWI tPLH tPHL tOR 1.5V tOF 1.5V OUT NOTES: 1. All voltages are referenced to ground. 2. Power-up time is the time from the application of power to the time stable delays are being produced at the output. 5 of 6 DS1135-L TERMINOLOGY Period: The time elapsed between the leading edge of the first pulse and the leading edge of the following pulse. tWI (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the 1.5V point on the trailing edge or the 1.5V point on the trailing edge and the 1.5V point on the leading edge. tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the input pulse. tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge on the input pulse. tPLH (Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input pulse and the 1.5V point on the leading edge of the output pulse. tPHL (Time Delay, Falling): The elapsed time between the 1.5V point on the falling edge of the input pulse and the 1.5V point on the falling edge of the output pulse. ORDERING INFORMATION DS1135L PACKAGE TYPE: U = µSOP (118MIL) Z = SO (150MIL) 6 of 6 Dash Number Delay (NS) Time 10 12 15 20 25 30 10 12 15 20 25 30