ATMEL E1466DA

Features
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32-kHz Crystal Oscillator
1.1 V to 2.2 V Operating-voltage Range
Integrated Capacitors for Digital Trimming
Suitable for up to 12.5 pF Quartz
Output Pulse Formers
Mask Options for Motor Period and Pulse Width
Low Resistance Output for Bipolar Stepping Motor
Motor Fast-test Function
Description
The e1466D is an integrated circuit in CMOS Silicon Gate Technology for analog
clocks. It consists of a 32-kHz oscillator, frequency divider, output pulse formers and
push-pull motor drivers. Integrated capacitors are mask-selectable to accomodate the
external quartz crystal. Additional capacitance can be selected through pad bonding
for trimming the oscillator frequency.
32-kHz Clock
CMOS IC with
Digital
Trimming
e1466D
4731A–CLOCK–06/03
1
Pad Configuration
Figure 1. Pinning
C4 C3 C2 C1
VDD (1)
OSCIN
OSCOUT (1)
VSS
e1466D
TEST (2)
MOT2
MOT1 (2)
MOT1
(1) The
(2)
pads VDD and OSCOUT are interchangeable per mask option
The pads TEST and MOT1 are interchangeable per mask option
Pin Description
2
Name
Description
VDD
Positive supply voltage
VSS
Negative supply voltage
OSCIN
Oscillator input
OSCOUT
Oscillator output
MOT1/2
Motor drive outputs
C1, C2, C3, C4
Oscillator trimming inputs
TEST
TEST input/output
e1466D
4731A–CLOCK–06/03
e1466D
Functional Descripion
Oscillator
An oscillator inverter with feedback resistor is provided to generate the 32768 Hz clock frequency. Values for the fixed capacitors at OSCIN and OSCOUT are mask-selectable (see
note 3 of “Operating Characteristics”). Four capacitor pads, C1 to C4, enable the users to add
integrated trimming capacitors to OSCIN, providing 15 tuning steps.
Trimming
Capacitors
A frequency variation of typically 4 ppm for each tuning step is obtained by bonding the capacitor pads to OSCIN. As none of these pads are bonded, the IC is in an untrimmed state. Figure
3 shows the trimming curve characteristic.
Note:
For applications which utilize this integrated trimming feature, Atmel will determine optimum values for the integrated capacitors COSCIN and COSCOUT.
Capacitor pads C1 to C4: 0 = open, 1 = connected to OSCIN
Combination C1 + C4 is redundant and therefore eliminated from the list
Table 1. Frequency Trimming Table
Capacitor Pads
Motor Drive
Output
C4
C3
C2
C1
Trimming Step
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
0
1
2
3
1
0
0
0
0
0
1
1
0
1
0
1
0
1
1
0
4
5
6
7
1
1
0
0
1
1
1
0
1
0
0
1
8
9
10
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
11
12
13
14
The e1466D contains two push-pull output buffers for driving bipolar stepping motors. During a
motor pulse, the N-channel device of one buffer and the P-channel device of the other buffer
will be activated. Both N-channel transistors are on and conducting between output pulses.
The outputs are protected against inductive voltage spikes with diodes to both supply pins.
The motor output period and pulse width are mask-programmable, as listed below:
Available motor periods (TM): 125, 250, 500 ms and 2, 16 s
Available max. pulse widths (tM): 15, 6, 23.4, 31.25, 46.9 ms and 1 s
Available motor periods for motor test (TMT): 250, 500 ms and 1 s
Note:
The following constraints for combination of motor period and pulse widths have to be considered: TM > 4 ´ tM, TMT > 4 ´ tM or alternatively TM = 2 ´ tM, TMT = 2 ´ tM
3
4731A–CLOCK–06/03
Test Functions
For test purposes, the TEST pad is open. With a high resistance probe (R ³ 10 M W ,
C ³ 20 pF), a test frequency fTEST of 128 Hz can be measured at the TEST pad. Connecting
TEST (for at least 32 ms) to VDD changes the motor period from the selected value to TMT
(mask-selectable) while the pulse width remains unaffected. This feature can be used for testing the mechanical parts of the clock.
Absolute Maximum Ratings
Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device.
All inputs and outputs on Atmel’s circuits are protected against electrostatic discharges. However, precautions to minimize
the build-up of electrostatic charges during handling are recommended.
The circuit is protected against supply voltage reversal for typically 5 minutes.
Parameters
Symbol
Value
Unit
Supply voltage
VSS
-0.3 to 5 V
V
Input voltage range, all inputs
VIN
(VSS - 0.3 V) £ VIN £ (VDD + 0.3 V)
V
Output short-circuit duration
indefinite
125
mW
Tamb
-20 to +70
°C
Tstg
-40 to +125
°C
Tsld
260
°C
Power dissipation (DIL package)
Ptot
Operating ambient temperature range
Storage temperature range
Lead temperature during soldering at 2 mm distance, 10 s
4
e1466D
4731A–CLOCK–06/03
e1466D
Operating Characteristics
VSS = 0 V, VDD = 1.5 V, Tamb = +25°C, unless otherwise specified.
All voltage levels are measured with reference to VSS. Test crystal as specified below.
Parameters
Test Conditions
Symbol
Min.
Typ.
1.5
Operating voltage
VDD
1.1
Operating temperature
Tamb
-20
R1 = ¥ (2)
Operating current
IDD
2
Max.
Unit
2.2
V
+70
°C
5
mA
Motor Drive Output
VDD = 1.2 V, R1 = 200 W
Motor output current
IM
±4.3
mA
Motor period
TM
See option list
Motor period during motor test
TMT
See option list
tM
See option list
Motor pulse width
Oscillator
VSTART
Startup voltage
Within 2 s
Frequency stability
DVDD = 100 mV, VDD = 1.1 to 2.2 V
Integrated input capacitance
(3)
Integrated output capacitance
Integrated capacitance for bond option
(4)
1.2
2.2
Df/f
1
COSCIN
See option list
COSCOUT
See option list
C1
C2
C3
C4
3
4
5
6
V
ppm
pF
pF
pF
pF
TEST Input
Input current
TEST = VDD peak current
ITINH
0.6
3
10
µA
Input current
TEST = VSS peak current
ITINL
-0.6
-3
-10
µA
tTIN
23.4
31.2
ms
Input debounce delay
Notes:
1.
2.
3.
4.
Typical parameters represent the statistical mean values
See test circuit
Values can be selected in 1 pF steps. A total capacitance (COSCIN + COSCOUT) of 38 pF is available
These values are valid for 10 pF quartz applications. For CL = 12.5 pF these values change to 4.5, 6, 7.5, 9 pF
Figure 2. Functional Test
VDD
C4 C3 C2 C1
OSCIN
VSS
OSCOUT
e1466D
TEST
MOT2
R1
MOT1
MOT1
5
4731A–CLOCK–06/03
Test Crystal
Specification
Oscillation frequency
Series resistance
Static capacitance
Dynamic capacitance
Load capacitance
fOSC = 32768 Hz
RS = 30 kW
C0 = 1.5 pF
C1 = 3.0 fF
CL optionally 10 or 12.5 pF
Figure 3. Motor Output Signal During Normal Operation and During Motor Test
Detail a
VDD
VSS
TEST
MOT1
VDD
VSS
tM
MOT2
VDD
VSS
TM
TMT
Detail a:
1/fTEST
Figure 4. Typical Trimming Curve Characteristic for TM of 2 s
2.00006
Motor Period (s)
2.00005
2.00004
COX = 1.05
COX = 1.00
COX = 0.95
2.00003
2.00002
2.00001
2.00000
1.99999
1.99998
1.99997
1.99996
1.99995
1.99994
1.99993
1.99992
1.99991
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Trimming Step
COX means frequency deviation due to production process variations.
Trimming inputs C1 ... C4 are binary weighted, i.e.,
C1 ... C4 = 0 corresponds to trimming step 0
C1 ... C4 = 1 corresponds to trimming step 15
LSB = C1
6
e1466D
4731A–CLOCK–06/03
e1466D
Ordering Information
Table 2. Option List e1466Dx
Option
Motor
Load
Capacitance
Integrated Capacitance
Pulse
(tM)
ms
Test
(TMT)
ms
COSCIN(1)
COSCOUT(1)
C1
C2
C3
C4
x
Cycle
(TM)
s
pF
pF
pF
pF
pF
pF
pF
A
2
46.9
250
9
20
3
4
5
6
10
AO
2
46.9
250
9
20
3
4
5
6
10
FO
0.25
62.5
2000
9
20
3
4
5
6
10
HO
2
1000
500/
250
9
20
3
4
5
6
10
Note:
1. On-chip stray capacitance included
Option
Pad Designation
x
Pad 1
A
AO
Pad 2
Pad 3
Pad 4
Pad 5
Pad 6
Pad 7
Pad 8
Pad 8
Pad 10
Pad 11
Pad 12
OSCIN OSCOUT
MOT2
MOT1
MOT1
TEST
VSS
VDD
C4
C3
C2
C1
OSCIN OSCOUT
MOT2
MOT1
MOT1
TEST
VSS
VDD
C4
C3
C2
C1
C4
C3
C2
C1
C4
C3
C2
C1
FO
OSCIN OSCOUT
MOT2
MOT1
MOT1
TEST
VSS
VDD
HO
OSCIN OSCOUT
MOT2
MOT1
MOT1
TEST
VSS
VDD
7
4731A–CLOCK–06/03
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Printed on recycled paper.
4731A–CLOCK–06/03
xM