FUJI FA5538

FA5526/5527/5528/5536/5537/5538
Fuji Switching Power Control IC
FA5526/5527/5528
FA5536/5537/5538
Application Note
April.-2011
Fuji Electric Co., Ltd.
Fuji Electric Co., Ltd.
AN-087E Rev.1.0
April-2011
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FA5526/5527/5528/5536/5537/5538
Warning
1. This Data Book contains the product specifications, characteristics, data, materials and structures as
of April in 2011. The contents are subject to change without prior notice for specification changes or
other reasons. When using a product listed in this Data Book, be sure to obtain the latest
specifications and check the data.
2. All applications described in this Data Book give examples of applications of Fuji Electric’s products
for your reference. No right or license, either express or implied, under any patent, copyright, trade
secret or other intellectual property right owned by Fuji Electric Co., Ltd. shall be granted.
3. Although Fuji Electric Co., Ltd. continually strives to enhance product quality and reliability, a small
percentage of semiconductor products may become faulty. When using Fuji Electric semiconductor
products in your equipment, be sure to take adequate safety measures such as redundant,
flame-retardant and fail-safe design in order to prevent a semiconductor product failure from leading
to a physical injury, property damage or other problems.
4. The products introduced in this Data Book are intended for use in the following electronic and
electrical equipment which requires ordinary reliability:
・Computers ・OA equipment ・Communications equipment (terminal devices)
・ Measurement equipment ・Machine tools ・Audiovisual equipment
・ Electrical home appliances ・Personal equipment ・Industrial robots, etc.
5. If you need to use a semiconductor product in this Data Book for equipment requiring higher reliability
than normal, such as listed below, be sure to contact Fuji Electric Device Technology Co., Ltd. to
obtain prior approval. When using these products, take adequate safety measures such as a backup
system to prevent the equipment from malfunctioning when a Fuji Electric’s product incorporated in
the equipment becomes faulty.
・Transportation equipment (mounted on vehicles and ships) ・Trunk communications equipment
・Traffic-signal control equipment ・Gas leakage detectors with an auto-shutoff function
・Disaster prevention / security equipment ・Safety devices
6. Do not use a product in this Data Book for equipment requiring extremely high reliability such as:
・Space equipment ・Airborne equipment ・Atomic control equipment
・Submarine repeater equipment ・Medical equipment
7. All rights reserved. No part of this Data Book may be reproduced without permission in writing from
Fuji Electric Co., Ltd.
8. If you have any question about any portion of this Data Book, ask Fuji Electric Co., Ltd. or its sales
agencies. Neither Fuji Electric Co., Ltd. nor its agencies shall be liable for any injury or damage
caused by any use of the products not in accordance with instructions set forth herein.
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Contents
1． Outline
2． Features
・・・・・・・・・・・・・・・ 4
・・・・・・・・・・・・・・・ 4
3． External dimension diagram
・・・・・・・・・・・・・・・ 4
4． Block diagram
5． Pin assignments
・・・・・・・・・・・・・・・ 5
・・・・・・・・・・・・・・・ 5
6． Selection Guide of
FA5526/27/28/36/37/38 series
7． Ratings and characteristics
8． Characteristic curves
・・・・・・・・・・・・・・・ 6
・・・・・・・・・・・・・・・ 6 to 9
・・・・・・・・・・・・・・・ 10 to 14
9． Description of block circuits
10． Design advice
・・・・・・・・・・・・・・・ 15 to 24
・・・・・・・・・・・・・・・ 25 to 32
11． Examples of application circuits
・・・・・・・・・・・・・・・ 33
Note）
・The contents of this Data Book are subject to change without prior notice for improvement or other
reasons.
・Application examples and parts constants listed in this Data Book are intended for design reference,
without giving due consideration to unevenness in parts characteristics and usage conditions.
When using, be sure to design the relevant circuit giving due consideration to unevenness in parts
characteristics and usage conditions.
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FA5526/5527/5528/5536/5537/5538
1. Outline
FA5526/27/28/36/37/38 series are current-mode switching power control ICs that can directly drive power MOSFETs.
Low-power dissipation is achieved due to adoption of high break-down voltage CMOS process. In addition, stand-by power
consumption can substantially be reduced due to a built-in start-up circuit. Many functions are incorporated in an eight pin
package, reducing the number of external parts and allowing compact and high cost performance power supply
2. Features
▪ Built-in start-up circuit of 500V break-down voltage that is cut off after start-up (input current after cutoff: 25µA (typ.))
▪ Low power dissipation due to adoption of high break-down voltage CMOS process
Supply Current in Operating Mode : 1.4mA (typ.)
( for FA5528 and FA5538 )
▪ Built-in frequency-decreasing function at light load
▪ Oscillating frequency
FA5526/5536 : 130kHz(typ.), FA5527/5537 : 100kHz(typ.), FA5528/5538 : 60kHz(typ.)
▪ Built-in latch-mode cutoff function of overload ( over current ) for FA5526/5527/5528
▪ Built-in Auto-Recovery cutoff function of overload ( over current ) for FA5536/5537/5538
▪ Built-in latch-mode cutoff function of over-voltage for 28V(typ.) at VCC pin for FA5526/5527/5528.
▪ Built-in Auto-Recovery-mode cutoff function of over-voltage for 28V(typ.) at VCC pin for FA5536/5537/5538.
▪ Built-in Under Voltage Lock-Out for VCC pin (15V : ON, 9V : OFF)
▪ 8 pins package(DIP / SO)
3. External dimension diagram
Unit：mm
SO-8 （FA5526N/27N/28N/36N/37N/38N）
0°
-8 °
5
1
5
6.5
0.65±0.25
6.0±0.2
8
3.9±0.1
8
DIP-8 （FA5526P/27P/28P/36P/37P/38P）
1
4
9.4
1.0±0.3
4
4.9±0.1
1.5±0.3
0.18±0.08
1.7MAX
3 .4
3 M IN 4.5 MAX
0.2 0
0 .2 5
2.54
+ 0 .1
/- 0 .0
0 -1
1.27
0.40±0.1
5
0.5±0.1
5°
7.6
2.54×3=7.62
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4. Block diagram
CS (1)
5V reg
VCC
5V
ENB
11µA/4µA
Latch
1.3mA
UVLO
off
START
8.5V/7.9V
28V
2.9V
OverLoad
FB
(2)
Buf
x1
4.8V
3R
30V
R
15V/9V
ENB
OSC
Blanking
1 shot
TRG Q
CLR
Q
VCO
1Meg
5pF
T
0.28V
20k
OUT
(5)
OUT
PUT
S
60k
VCC
(6)
UVLO
0.68V
4.0V/3.5V
7.4k
VH
(8)
OVP
Q
R Q
F.F.
SLOPE
GENERATOR
+Σ
GND
(4)
IS comp.
0.52V
IS (3)
FA5526 / FA5527 / FA5528 for Timer Latched OCP
CS (1)
5V reg
VCC
5V
ENB
11µA/4µA
Auto-Recovery
off
UVLO
START
8.5V/7.9V
28V
2.9V
4.8V
OverLoad
FB
(2)
Buf
x1
3R
30V
R
15V/9V
ENB
OSC
VCO
1Meg
5pF
Blanking
1 shot
TRG Q
CLR
Q
T
0.28V
20k
OUT
(5)
OUT
PUT
S
60k
VCC
(6)
UVLO
0.68V
4.0V/3.5V
7.4k
VH
(8)
1.3mA OVP
Q
R Q
F.F.
SLOPE
GENERATOR
+Σ
IS comp.
GND
(4)
0.52V
IS (3)
FA5536 / FA5537 / FA5538 for Auto-Recovery OCP
5. Pin assignments
Pin
Symbol
Function
Description
1
CS
Soft start/latch-mode stop
Time Setting of Soft start and Over Current Protection
2
FB
Feedback input
Input for controlling current comparator threshold voltage
3
IS
Current sensor input
Input for monitoring MOSFET current
4
GND
Ground
Power supply ground
5
OUT
Output
Output for directly driving a MOSFET
6
VCC
Power supply
Power supply for ICs
7
(NC)
No connection
No connection
8
VH
High voltage input
Input terminal for start-up circuit
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6. Line-up of FA5526/27/28/36/37/38 series
Type
Switching Frequency (kHz)
Over Current Protection
Package
FA5526P/N
130 (typ.)
Latch with adjustable delay time
DIP-8/SO-8
FA5527P/N
100 (typ.)
Latch with adjustable delay time
DIP-8/SO-8
FA5528P/N
60 (typ.)
Latch with adjustable delay time
DIP-8/SO-8
FA5536P/N
130 (typ.)
Auto-Recovery
DIP-8/SO-8
FA5537P/N
100 (typ.)
Auto-Recovery
DIP-8/SO-8
FA5538P/N
60 (typ.)
Auto-Recovery
DIP-8/SO-8
7. Ratings and characteristics
＊In defining a current, “＋” represents a sink current and “－” a source current.
(1) Absolute maximum ratings
Item
Supply
voltage
Symbol
Rating
Unit
Low impedance source
(Icc>15mA)
VCC1
28
V
Built-in Zener clamp
(Icc<15mA)
VCC2
Self Limiting
V
IOH
-0.3
A
IOL
+0.6
A
VOUT
-0.3
V
OUT pin peak current
FB/ IS pin voltage
VLT
to VCC+0.3
-0.3 to 5.0
CS pin sink current
ICS
2.0
mA
CS pin minimum voltage
VCSL
-0.3
V
VH pin Voltage
VVH
-0.3
Total power dissipation (Ta=25℃)
Pd
800 (DIP-8)
400 (SO-8)
Ambient temperature
Ta
-30
Maximum junction temperature
Tj
125
Storage temperature
Tstg
-40
OUT pin voltage
V
to 500
V
mW
degree
to +85
degree
degree
to +150
Permissible power dissipation decreasing characteristics
Permissible
power dissipation
400mW(SO)
800mW(DIP)
0
-30
85
25
125
Ambient temperature Ta ( ℃ )
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(2) Recommended operating conditions
Item
Supply voltage
Symbol
MIN
TYP
MAX
Unit
18
VCC
10
26
V
DC Voltage
VVH(DC)
80
450
V(DC)
AC Line
Voltage
VVH(AC)
80
288
V(AC)
VH pin series resistor
RVH
2.2
47
k ohm
CS pin capacitor
CCS
0.01
1
µF
VCC pin capacitor
CVCC
10
VH pin voltage
µF
33
(3) Electrical characteristics (Vcc=18V, Tj=25℃, unless otherwise specified)
Oscillator (FB pin)
Item
Symbol
Condition
Oscillating frequency
Fosc
FB=3V
MIN
TYP
MAX
FA5526/36
117
130
143
FA5527/37
90
100
110
FA5528/38
54
60
66
Supply voltage stability
Fdv
Vcc = 10 to 26V
Temperature stability
FdT
Ta = -30 to 85℃
FB pin voltage for starting
frequency variation
VfbM
Frequency reduction ratio
kf
Oscillating frequency
at light load
F06
Minimum frequency *1
Fmin
*1
-2
2
+0.025
0.95
1.05
⊿f/⊿VFB
FA5526/36
310
at FB pin
=0.8V
to 0.9V
FA5527/37
240
FA5528/38
140
FA5526/36
1.1
FA5527/37
1.1
FB pin
=0.6V
FA5528/38
Unit
kHz
%
%/℃
1.15
V
kHz/V
kHz
1.1
0.4
1.1
3.0
kHz
The frequency become much smaller than 1.1kHz when intermittent switching occurs at light load near no load.
Pulse width modulator (FB pin)
Item
Symbol
Condition
MIN
TYP
MAX
Unit
Maximum duty cycle
DMAX
FB pin = 3V, CS pin = 3V
76
80
84
%
Minimum duty cycle
DMIN
FB pin = 0V, CS pin = 3V
0
%
FB voltage for pulse stop
VTHFB0
Duty cycle = 0%
200
280
360
mV
FB pin current
Ifb0
FB pin = 0V
-620
-520
-420
uA
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Current sensor (IS pin)
Item
Symbol
Condition
MIN
TYP
MAX
Unit
Voltage gain
AvIS
⊿VFB/⊿VIS
3.8
4.0
4.2
V/V
Maximum threshold voltage
VthIS1
FB pin = 4V, duty = 10%
470
520
570
mV
Slope compensation value
SLP
FB pin=4V
Minimum ON pulse width
Blanking time
Output delay time
Tmin
FB pin=3V
CS pin=0V
IS pin=1V
Tblank
FA5526/36
-24
FA5527/37
-17
FA5528/38
-12
FA5526/36
0.3
FA5527/37
0.5
FA5528/38
0.7
FA5526/36
0.2
FA5527/37
0.4
FA5528/38
0.6
mV/us
us
us
TpdIS
IS pin to OUT pin
100
ns
Item
Symbol
Condition
MIN
TYP
MAX
Unit
Charging current
ICS0
CS pin = 0V
-15
-11
-5
uA
Threshold voltage for
changing charging current
VTHCS1
Ics = -12  -4µA
3
V
Input threshold voltage
VTHCS0
OUT pin width = Tmin,
FB pin = 3V
0.68
V
Soft-start circuit (CS pin)
Over Current Protection circuit (CS pin) : Latch OFF for FA5526/27/28 and Auto-Recovery for FA5536/37/38
Item
Symbol
Condition
MIN
TYP
MAX
Unit
Charging current
ICS4
CS pin = 4V
-6
-4
-2
uA
Sink current
Isink
CS pin = 6V
34
59
84
uA
VTHCSF
ON→OFF
8.0
8.5
9.0
V
VTHCSN
OFF→ON
7.4
7.9
8.4
V
Hysteresis width
VTHHYS
VTHCSF - VTHCSN
0.6
V
Clamp voltage at latch mode
VCS2
FB pin : open
8.9
V
Item
Symbol
Condition
Detection threshold voltage
VTHFB
Cutoff threshold voltage
Cutoff circuit at overload (FB pin)
MIN
TYP
MAX
Unit
3.3
3.6
3.9
V
MIN
TYP
MAX
Unit
28
30
Cutoff circuit at overvoltage (VCC pin)
Item
Symbol
Threshold voltage
VTHVCC
CS pin charging current
ISOCS2
Condition
26
CS pin = 4V
-1.3
V
mA
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Malfunction-protective circuit at low voltage (VCC pin)
Item
Symbol
Condition
ON threshold voltage
VCCON
OFF threshold voltage
VCCOFF
Hysteresis width
VHYS
VCCON - VCCOFF
Item
Symbol
Condition
Low output voltage
VOL
IOL = 100mA
High output voltage
VOH
IOH = -100mA, VCC = 18V
Rise time
tr
Fall time
tf
MIN
TYP
MAX
Unit
13.2
15.0
16.8
V
8.0
9.0
10.0
V
4.5
6.0
7.5
V
MIN
TYP
MAX
Unit
0.5
1.0
V
Output section (OUT pin)
14.8
16.4
V
C(Load) = 1nF
37
ns
C(Load) = 1nF
59
ns
High voltage input section (VH pin, VCC pin)
Item
VH pin input current
VCC voltage in latch mode
Symbol
Condition
MIN
TYP
MAX
Unit
IHrun
VH pin = 450V,
Vcc> Vccon
12
25
37
uA
IHstb
VH pin = 100V, Vcc = 0V
7.0
mA
VCCL
VH pin = 100V
23
V
Ipre1
Vcc = 10V,
VH pin = 100V
at start-up or protection
mode ( OCP, OVP )
-6.6
-4.0
mA
Ipre2
Vcc = 13V,
VH pin = 100V
at start-up or protection
mode ( OCP, OVP )
-6.5
-3.5
mA
Symbol
Condition
TYP
MAX
Unit
FA5526/36
1.6
2.4
ICCOP1
Duty cycle
= DMAX,
FB pin
=3V,
no load
FA5527/37
1.5
2.2
FA5528/38
1.4
2.0
VCC pin charging current
Consumption current (VCC pin)
Item
Supply current during
operation
MIN
mA
ICCOP2
Duty cycle = 0％,
FB pin = 0V
1.6
2.4
mA
Consumption current in
latch mode
ICCL
FB pin, CS pin : open
290
400
uA
Zener voltage
Vz
Iz = 2mA
30
V
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8. Characteristic curves
・Unless otherwise specified, Ta=25℃, Vcc=18V
・In defining a current, “+” represents a sink current and “-” a source current.
・The data stated in this chapter are intended for giving typical IC characteristics and not for guaranteeing performance.
Variation Ratio of Switching Frequency (delta fosc)
vs. Junction Temperature (Tj)
2
2
1.5
1.5
1
delta fosc (%)
delta fosc (%)
Variation Ratio of Switching Frequency (delta fosc)
vs. VCC pin voltage (Vcc)
0.5
0
-0.5
-1
-1.5
1
0.5
0
-0.5
-1
-1.5
-2
-2
10
15
20
25
30
-40 -20
0
20
40
Vcc (V)
80 100 120 140
Minimum Switching Frequency (fmin) vs. Junction
Temperature (Tj)
Switching Frequency (fosc) vs. FB pin voltage
140
2.0
120
FA5526 / 36
1.5
100
FA5527 / 37
fmin (kHz)
fosc (kHz)
60
Tj (degree)
80
60
FA5528 / 38
40
1.0
0.5
20
0.0
0
0
0.5
1
1.5
2
2.5
-40
3
-20
0
20
40
60
80
100 120 140
Tj（degree）
VFB (V)
Maximum Duty Cycle (Dmax)
vs. Junction Temperature (Tj)
Minimum ON Width (Tmin)
vs. Junction Temperature (Tj)
81.0
800
FA5528 / 38
700
Tmin (ns)
Dmax (%)
80.5
80.0
600
FA5527 / 37
500
400
FA5526 / 36
79.5
300
79.0
200
-40 -20
0
20
40
60
80 100 120 140
-40 -20
0
20
40
60
80 100 120 140
Tj（degree）
Tj（degree）
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CS pin source current (Ics)
vs. Junction Temperature (Tj)
CS pin source current (Ics)
vs. Junction Temperature (Tj)
-3.5
-9
CS=4V
CS=0V
-4
Ics (uA)
Ics (uA)
-10
-11
-12
-4.5
-5
-13
-5.5
-14
-6
-40 -20
0
20
-40 -20
40 60 80 100 120 140
Tj （degree）
80 100 120 140
FB=3V
4
6
8
10
12
0
2
4
Vccoff (V)
16.0
15.8
15.6
15.4
15.2
15.0
14.8
14.6
14.4
14.2
14.0
0
20
40 60 80
Tj (degree)
6
Vcs (V)
8
10
12
UVLO OFF threshold voltage (Vccoff)
vs. Junction Temperature (Tj)
UVLO ON threshold voltage (Vccon)
vs. Junction Temperature (Tj)
Vccon (V)
60
CS pin current (Ics) vs. CS pin voltage (Vcs)
80
70
60
50
40
30
20
10
0
-10
-20
Vcs (V)
-40 -20
40
Ics (uA)
Ics (uA)
20
Tj （degree)
CS pin current (Ics) vs. CS pin voltage (Vcs)
80
70 FB=open
60
50
40
30
20
10
0
-10
-20
0
2
0
100 120 140
10.0
9.8
9.6
9.4
9.2
9.0
8.8
8.6
8.4
8.2
8.0
-40 -20
0
20
40 60 80 100 120 140
Tj (degree)
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OUT pin Low Output Voltage (VOL)
vs. VCC pin Voltage (Vcc)
OUT pin High Output Voltage (VOH)
vs. VCC pin Voltage (Vcc)
0.8
3
IOL = 100mA
IOH = -100mA
0.7
VOL (V)
Vcc - VOH (V)
2.5
2
1.5
0.6
0.5
0.4
0.3
1
10
15
20
25
10
30
15
20
25
30
Vcc (V)
Vcc (V)
IS pin maximum input threshold volatge(Vthis1)
vs. Junction Temerature (Tj)
IS pin input threshold voltage (Vthis)
vs. FB pin voltage (VFB)
0.53
0.6
0.52
0.5
0.51
0.4
Vthis (V)
Vthis1 (V)
Duty cycle = 50%
0.50
0.3
0.49
0.2
0.48
0.1
0.47
0
-40
-20
0
20
40
60
80
100 120 140
0
1
2
Tj (degree)
4
VFB (V)
FB pin source current (IFB) vs. FB pin voltage (VFB)
Threshold Voltage of Over-Voltage Protection
(Vthvcc) vs. Junction Temperature (Tj)
0
30.0
-100
29.5
29.0
Vthvcc (V)
-200
IFB (uA)
3
-300
-400
28.5
28.0
27.5
27.0
-500
26.5
-600
0
1
2
3
4
26.0
5
-40 -20
VFB (V)
0
20
40
60
80 100 120 140
Tj (degree)
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Start-up Circuit VCC pin Source Current (Ipre)
vs. VCC pin voltage (Vcc)
Start-up Circuit VCC pin Source Current (Ipre)
vs. Junction Temperature (Tj)
-5.5
-5.0
VVH = 100V
-5.5
VVH = 100V
Vcc = 0V
-6.0
Ipre (mA)
Ipre (mA)
-6.0
-6.5
-6.5
-7.0
-7.0
-7.5
-7.5
-8.0
-8.0
0
5
10
15
-40
-20
0
20
Vcc (V)
Start-up Circuit VCC pin Source Current
vs. VH pin voltage (VVH)
40
60 80
Tj （degree)
IS pin threshold voltage (Vthis) vs. Duty Cycle
at FB pin = 4V and CS pin = 4V
0.60
-6
FB=4V
CS=4V
-6.2
Vcc = 0V
0.55
Vthis (V)
-6.4
Ipre (mA)
100 120 140
-6.6
-6.8
-7
0.50
0.45
-7.2
-7.4
0.40
0
100
200
300
400
500
0
10
20
30
40
60
70
D (%)
IS pin threshold voltage (Vthis) vs. Duty Cycle(D)
at FB pin = 3V for FA5528/5538
IS pin threshold voltage (Vthis) vs. DutyCycle(D)
at FB pin = 2V for FA5528/5538
80
0.30
0.50
FB=2V
FB=3V
0.45
0.25
V th is (V )
Vthis (V)
50
VVH (V)
0.40
0.35
0.20
0.15
0.30
0.10
0
10
20
30
40
50
60
70
80
0
D (%)
10
20
30
40
50
60
70
80
D (%)
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Operating Mode Supply Current
vs. VCC pin voltage (Vcc)
1.7
Operating Mode Supply Current (Iccop1)
vs. Junction Temperature (Tj)
FA5526 / 36
1.7
FA5527 / 37
1.6
FA5526 / 36
Iccop1 (mA)
Iccop1 (mA)
1.6
1.5
FA5528 / 38
FA5527 / 37
1.5
FA5528 / 38
1.4
1.4
1.3
1.3
10
15
20
25
-40 -20
30
Vcc (V)
0
20
40
60
80 100 120 140
Tj (degree)
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9. Description of block circuits
(1) Start-up circuit
protection.” ).
The FA5526/27/28/36/37/38 has built-in start-up
circuits with maximum rated voltage of 500V.
Wiring is shown in Figs.1 to 3.
When power is turned on, a current is supplied to the
VCC pin from the start-up circuit, charging the capacitor,
C2, connected to the VCC pin, increasing its voltage,
activating the IC, and the power supply starts operation.
The current supplied to the VCC pin from the VH pin is
approximately 6.8mA at Vcc=0V, decreases as Vcc
increases and becomes approximately 6.1mA at the
start-up voltage.
A resistor is connected in series to the
VH pin to prevent the IC from being damaged due to
surge in AC and other lines.
Fig.1 shows the commonest wiring, connecting the VH
pin to half-wave rectified AC input voltage and taking the
Fig.1
Start-up circuit 1 (half wave)
Fig.2
Start-up circuit 2 (full wave)
longest start-up time of the three ways of wiring. When
AC input voltage is turned off after the circuit changed to
a latch mode due to overload or overvoltage protection,
the latch mode can be reset in a relatively short time of
several seconds because a current is not supplied from
the VH pin.
In Fig.2, the VH pin is connected to full-wave rectified
AC input voltage, reducing start-up time to approximately
half as compared to half-wave rectification circuit shown
in Fig.1. The latch mode can be reset in a short time
same as in Fig.1 because AC input voltage is cut off.
In Fig.3, the VH pin is connected to rectified and
smoothed AC input voltage, resulting in the shortest
start-up time of the three ways of wiring. In this way of
wiring, it takes time for the latch mode to be reset
because charged C1 voltage is applied to the VH pin
even if the IC have changed to the latch mode.
Depending on usage conditions, in general it takes
several minutes.
When VCC pin voltage exceeds ON threshold voltage
of the low-voltage malfunction-protective circuit
and the
IC is activated, the start-up circuit is cut off and VH pin
input current becomes 25uA (typ.).
When IC enters to the latch mode due to any
abnormal condition, the start-up circuit is activated
again, the latch condition is maintained and Vcc voltage
is held at approximately 23V. Here, FA5526/27/28
enters to the latch mode by overload or over-voltage,
Fig.3
Start-up circuit 3 (DC)
but FA5536/37/38 does not enter to the latch mode
without an additional external circuit (See “9.-(8)/(9)
Overload
protection,”
“9.-(10)/(11)
Over-voltage
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(2) Oscillator
The oscillator determines switching frequency. For
steady operation at heavy load, the oscillating frequency
is set at 130kHz for FA5526/36, 100kHz for FA5527/37
or 60kHz for FA5528/38 inside the IC.
In addition, the IC has a function to automatically
decrease oscillating frequency at light load to reduce
standby power dissipation. When FB pin voltage
becomes 1.05V or less at light load, the frequency starts
decreasing.
At light load, as FB pin voltage drops, the frequency
decreases almost linearly to the minimum operating
frequency (Fig.4). The minimum operating frequency,
Fig.4
Oscillating frequency
Fmin, is set at 1.1kHz.
The
oscillator
generates
a
trigger
signal
for
determining the switching frequency, a pulse signal for
C1
determining the maximum duty cycle and a ramp signal
for slope compensation.
OSC
Blanking
Rs
(3) Current comparator and PWM latch
FA5526/27/28/36/37/38
have
current
mode
IS comp.
comparators. Fig.5 shows a block diagram for basic
S Q
5
OUT
operation and Fig.6 a timing chart.
R
F.F.
A trigger signal is generated by the oscillator and input
3
to the PWM latch (F.F.) as a set signal through a blanking
circuit, increasing PMW latch output and also OUT pin
voltage.
Fig.5
IS
Current-mode basic operation circuit block
On the other hand, the current comparator (IS comp.)
monitors a MOSFET current and generates a reset
signal when OUT pin voltage reaches the threshold
voltage.
Then, PWM latch (F.F.) output and OUT pin
Blanking
Output Signal
(set pulse)
voltage go into low state
The output is controlled through varying IS comparator
threshold voltage due to a feedback signal.
As shown in Fig.7, FB pin voltage and CS pin voltage
are level-shifted and input to the current comparator (IS
comp.) as threshold voltage. In addition, the reference
Flip Flop ( F.F. )
“Q” output
( OUT pin signal )
IS pin Voltage
proportional to
Drain Current of
MOSFET “Q1”
IS comp.
Minimum Voltage
Among inverting
input
voltage of 0.52V is input to the IC to determine IS pin
maximum threshold voltage.
The lowest of the three inputs is given a high priority.
IS comp.
Output
(reset pulse)
Fig. 6
Timing chart for current-mode basic operation
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At start-up, soft start can be realized through gradually
Cs
increasing the threshold voltage based on CS pin
1
voltage.
CS
5V
At steady operation, the threshold voltage is varied
based on FB pin voltage to keep power supply output
VCC
voltage constant.
Buf
x1
FB
In addition, the maximum IS pin threshold voltage as
2
520mV limits MOSFET over-current when FB pin voltage
11µA
is very high like 4V by overload etc.
The oscillator generates a pulse to determine the
maximum duty cycle of an OUT pulse and the maximum
60k
3R
20k
R
IS comp.
0.52V
duty cycle is set at 80% (typ.) using this pulse..
3
IS
For details, refer to “9-(14) Timing chart”.
Fig.7
Rs
Current comparator
(4) Blanking
When MOSFET turns on, a surge current is generated
due to discharge current from the capacitor in the main
circuit or gate drive current. If the surge current reaches
the IS pin threshold voltage, current comparator output
could be inverted and normal pulses would not be
generated from the OUT pin.
To avoid this, a blanking function is incorporated into
the current comparator. When a trigger signal is input
from the oscillator, the blanking circuit outputs a
certain-width pulse signal as a PWM latch (F.F.) set
signal.
Since the set signal is given a high priority in PWM
latch input signals, the output of PWM latch (F.F.) will not
be inverted while the set signal is input from the blanking
circuit, even if a rest signal is input from the current
comparator (IS comp.).
As a result, the IS pin input voltage is ignored for a
blanking
time
(200ns
for
FA5526/36,
400ns
for
FA5527/37 and 600ns for FA5528/38) immediately after
an output pulse has been generated from the OUT pin
and does not respond to a surge current at turn-on.
（See Fig.8.）
Fig.8
Blanking
In general, the blanking circuit eliminates the need for
a noise filter at the IS pin.
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(5) Minimum ON pulse width
As described in “(4) Blanking,” the input voltage at the
IS pin is ignored during a blanking period right after
turn-on. Consequently, the sum of blanking time and
output delay time (100ns) is the minimum ON pulse
width at the OUT pin of the IC. The minimum ON pulse
width for FA5526/36, FA5527/37 and FA5528/38 are
300ns, 500ns and 700ns, respectively.
In addition, a dedicated comparator is incorporated not
to generate pulses at no load.
When FB pin voltage is below 0.28V or CS pin voltage
is below 0.68V, the output of the comparator is inverted
and a clear signal “CLR” is input to the blanking circuit.
Then, the blanking circuit will not output a set signal and
no set signals will be input to PMW latch (F.F.), keeping
the output voltage low.
(See “9-(14) Timing chart.”)
5V Reg.
(6) Slope compensation
In the current mode control, subharmonic oscillation
may occur at a continuous current mode operation with
a duty cycle of 50% or more.
7.4k
FB
2
To avoid this, FA5526/36, FA5527/37 and FA5528/38
VCO
OSC
Q
1Meg
5pF
have built-in slope compensation circuits.
For details of subharmonic oscillation phenomenon
SLOPE
GENERATOR
and slope compensation effect, see p.32.
60k
20k
As shown in Fig.9, slope compensation is achieved by
( CS pin voltage ) / 4
Ramp Signal
+Σ
IS comp.
0.52V
3
a input of FB pin voltage to the current comparator (IS
IS
comp.), which subtracted ramp signal generated from
Rs
oscillator passing through slope generator.
Fig.9
Slope compensation circuit
Therefore, the threshold voltage at the FB pin
gradually decreases with time within each switching
cycle as shown in Fig.10 even when voltages at the FB
pin and CS pin are constant.
(See “9-(14) Timing chart.”)
Fig.10
Slope compensation
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(7) Soft start circuit
The CS pin is connected to a built-in constant current
source. The current for soft start is 11uA.
Cs
The capacitor externally connected to the CS pin is
1
charged by the constant current source, gradually
CS
5V
increasing CS pin voltage.
MOSFET current gradually increases at start-up
because CS pin voltage is input to the current
VCC
Buf
x1
FB
2
comparator (IS comp.), realizing soft start.
11µA
As a guide for soft start time, the time tss taken until
60k
3R
20k
R
IS comp.
CS pin voltage increases from 0V to 3V is given by the
following equation.
0.52V
tss [ s ] = 0.27 * Cs [ uF ] ( typical value )
3
Here, Cs is a capacitance connected to CS pin [ uF ].
IS
In steady operation, CS pin voltage is clamped at
approximately 4V by a zener diode in the IC.
The CS pin is provided with a built-in circuit to stop
Fig.11
Soft start circuit
pulses when CS pin voltage is 0.68V or less, same as
FB pin.
(See “9-(14) Timing chart.”)
Cs
(8) Overload protection of FA5526/27/28
CS
1
FA5526, FA5527 and FA5528 have built-in time-latch
6
5V Reg.
VCC
5V
ENB
type overload protection. Fig.12 shows its block diagram
and Fig.13 its Timing chart.
UVLO
CS pin voltage is clamped at 4V by a zener diode in the
IC.
11uA/4uA
8.5V/7.7V
5V Reg.
UVLO
In steady operation, FB pin voltage is 3V or less and
VCC
Latch
2.8V
ENB
FB
OUT
5
4.8V
2
When power supply voltage drops on account of
Overload
overload or short-circuit on the load side, FB pin voltage
S Q
increases. If FB pin voltage exceeds the 3.6V threshold
R
voltage for overload protection, output voltage of a
F.F.
comparator for overload detection (Overload) is inverted
and 4V clamp of the CS pin is canceled, increasing CS
pin voltage again due to a built-in constant current
Fig.12
Overload protection circuit
source. The current supplied from the CS pin becomes
4µA.
If the power supply voltage continues to decrease and
CS pin voltage reaches the threshold voltage (8.5V) of
the comparator (Latch), the output of the comparator
(Latch) is inverted, turning off a 5V circuit in the IC and
forcing OUT pin voltage to be low.
This status is the latch mode of the IC. In the latch
mode, the start-up circuit resumes operation to supply
current to Vcc and to hold the latch mode.
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When the output voltage momentarily drops due to
abrupt load change and FB pin voltage restores to the
voltage at steady state before CS pin voltage reaches 8.5V,
the 4V clamp circuit restarts, producing no latch mode.
The latch mode can be reset through cutting off input
Secondary
Side DC
Output
Voltage
voltage or through forcibly decreasing CS pin voltage to
7.4V or less.
Cutting off the input voltage decreases VH pin voltage,
FB pin
Voltage
3.6V
supplying no current to the VCC pin. Thereafter, the latch
mode is reset when Vcc drops below the OFF threshold
voltage, 8.0Vmin.
In addition, when CS pin voltage is forcibly decreased,
8.8V
8.5V
CS pin
Voltage
the latch mode comparator is re-inverted and the IC
re-starts switching operation.
In the case of typical IC, delay time td (OLP), the time from
overload detection to the latch mode, is given by the
OUT pin
Voltage
following equation.
td1 (OLP) [ s ] = 0.93 * Cs [ uF ]
Short time
Overload
( typical value )
Here, Cs is a capacitance connected to CS pin [ uF ].
Fig.13
Overload Latch Off
Overload protection timing chart
Delay time td(OLP) is inversely proportional to CS
charging current and proportional to the difference
between CS pin clamp voltage “4V” at steady condition and
Vcc
latch-mode threshold voltage “8.5V”. Pay attention to
(20V
variations in delay time resulting from variations in
/div)
numerical values.
In addition, be aware that when the VH pin is connected
after rectification, it takes rather long time, approximately
several minutes, before the latch mode is reset.
Vds
(100V
/div)
(See “9-(1) Start-up circuit.”)
(9) Overload protection of FA5536/37/38
FA5536, FA5537 and FA5538 have built-in auto-recovery
Fig.14
type overload protection. Fig.14 shows VCC pin voltage
Overload protection waveform
of FA5538 as Auto-Recovery ( 90Vac )
and the drain voltage of power MOSFET “Q1” in the circuit
on page 33 at “6A” overload when 90Vac input is applied
Vcc
and Fig.15 shows same parameters mentioned above at
(20V
“7A” overload when 264Vac input is applied.
/div)
Switching period after the overload occurs and stop
period are calculated as follows.
Vds
Steady State to Overload : td2 (OLP) [ s ] = td1 (OLP),
(100V
After overload starts : td2 (OLP) [ s ] = 1.65* Cs [ uF ],
/div)
stop period t (stop) [ s ] = Cvcc [ uF ] *
[ Vcc(sw/OL) – Vccoff ] / ( ICCL )
Here,
Fig.15
Vcc(sw/OL) : Vcc in switching period at overload [ V ]
Overload protection waveform
of FA5538 as Auto-Recovery
Vccoff : OFF threshold voltage of U.V.L.O ( 9V (typ.))
( 264Vac )
ICCL : Consumption current in latch mode ( 290uA (typ.))
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(10) Over-Voltage Protection of FA5526/27/28
FA5526, FA5527 and FA5528 have built-in over-voltage
Cs
protection circuits to monitor Vcc voltage. Fig.16 shows
1
CS
its block diagram and Fig.17 its timing chart.
6
5V Reg.
VCC
5V
ENB
When VCC voltage increases and exceeds comparator
(OVP) reference voltage, 28V, an internal 1.3mA constant
the CS pin at 4V is 55uA, CS pin voltage quickly
ENB
4.8V
2
OUT
5
Overload
on. When CS voltage exceeds comparator (Latch)
S Q
reference voltage, 8.5V, the IC changes to the latch mode.
R
the time from over-voltage
F.F.
detection to the latch mode, is given as follows.
td (OVP) [ ms ] = 2.85 * Cs [ uF ]
OVP
2.8V
FB
increases when the 1mA constant current source is turned
(OVP),
28V
UVLO
Since sink capability of the zener diode which clamps
The delay time td
1.3mA
8.5V/7.7V
5V Reg.
UVLO
current source is tuned on.
VCC
Latch
( typical value )
Fig.16
Here, Cs is a capacitance connected to CS pin [ uF ].
Over Voltage protection circuit
( only for FA5526 / 5527 / 5528 )
In the latch mode, an internal power supply source, 5V
“Reg” circuit, is turned off and OUT pin voltage is held to
be low., and the current form the CS pin changes to 5µA.
The latch mode can be reset through decreasing Vcc
voltage due to cutting off of input voltage or through
forcibly decreasing CS pin voltage to 7.4V or less.
Moreover, pay attention to the relationship between wiring
at the VH pin and reset time in the latch mode.
（See “9-(1) Start-up circuit.”）
(11) Over-Voltage Protection of FA5536/37/38
FA5536, FA5537 and FA5538 have built-in over-voltage
protection ( OVP ) circuits to monitor Vcc voltage similar
to FA5526/27/28.
However, the OVP of FA5536/37/38 is Auto-Recovery
mode.
Therefore, when you need the OVP as latch mode, the
Fig.17
additional external circuit is necessary as mentioned on
Over-Voltage protection timing chart
( only for FA5526 / 5527 / 5528 )
page 28 to 29 ( See “10-(4)” ).
(12) Under-Voltage Lock-Out circuit
The IC has a built-in undervoltage lockout circuit to
prevent malfunction when Vcc voltage drops. When Vcc
voltage increases from 0V, the IC starts operation at Vcc =
15V (typ.). As the supply voltage decreases, the IC stops
operation at Vcc = 9V(typ.).
When the undervoltage lockout circuits operates and
the IC stops operation, OUT pin and CS pin voltage are
forced to be low, resetting soft start, and overload and
overvoltage timer latch protection.
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(13) Output circuit
The output circuit consists of push-pull configuration, capable of directly driving a MOSFET. The maximum peak
currents at the OUT pin are 0.25A for source current and 0.5A for sink current.
If the IC stops operation when the under-voltage lockout circuit operates or in the latch mode, OUT pin voltage is
forced to be low to shut down the MOSFET.
(14) Timing chart
Oscillator (OSC)
Trigger (T) Output
Blanking
CLR Signal
Blanking
Output signal
(set pulse)
FB pin
Voltage
IS pin
Voltage
IS comp. output
(reset pulse)
FF
“Q” output
OSC
Q output
OUT pin
Output voltage
Blanking Time
Fig.18
Timing chart at steady operation
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Oscillator (OSC)
Trigger (T) Output
Oscillator (OSC)
Trigger (T) Output
Blanking
CLR Signal
Blanking
CLR Signal
Blanking
Output signal
(set pulse)
Blanking
Output signal
(set pulse)
FB pin
Voltage
FB pin
Voltage
IS pin
Voltage
IS pin
Voltage
IS comp. output
(reset pulse)
IS comp. output
(reset pulse)
FF
“Q” output
FF
“Q” output
OSC
Q output
OSC
Q output
OUT pin
Output voltage
OUT pin
Output voltage
Fig.19
0.36V
Timing chart at maximum duty cycle operation
Fig.20
Timing chart at FB pin < 0.36V
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Oscillator (OSC)
Trigger (T) Output
Blanking
CLR Signal
Blanking
Output signal
(set pulse)
FB pin
Voltage
CS pin
Voltage
( CS pin Voltage ) / 4
IS pin
Voltage
IS comp. output
(reset pulse)
FF
“Q” output
OSC
Q output
OUT pin
Output voltage
Blanking Time
Minimum ON width
( The sum of Blanking Time
and Delay Time to OUT pin )
Fig.21
( CS pin voltage ) / 4 determines
ON width as high voltage period
of OUT pin
Timing chart at start-up (soft start)
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10．Design advice
(1) Start-up and stop
To properly start up and stop the power supply, optimum
values shall be set for capacitors connected to the CS pin
and VCC pin.
(1-1) At start-up (1)
It takes certain time until the output voltage reaches to
Secondary
Side DC
Output
Voltage
FB pin
Voltage
the set voltage after the IC has been activated. During this
period, FB pin voltage reaches its maximum voltage and
the 4V clamp circuit does not operate. As a result, with
8.5V
CS pin
Voltage
4V
3V
proper CS pin capacitance and proper start-up, CS pin
Start-up
of IC
voltage waveform during start-up will be as shown in
Fig.22.
a) After CS pin exceeds 4V,
FB pin voltage drops.
On the other hand, when CS pin capacitance is too small,
CS pin voltage may reach the threshold voltage of the latch
Start-up
of IC
Fig.22
b) Before CS pin exceeds 4V,
FB pin voltage drops.
CS pin voltage waveform at start-up (1)
mode as shown in Fig.23 before the output voltage
( normal start )
increases to the set value. The IC changes into a latch
mode and the power supply cannot start properly. In cases
like this, increase CS pin capacitance.
Secondary
Side DC
Output
Voltage
(1-2) At start-up (2)
DC output set voltage
Fig.24 shows Vcc voltage at start-up when proper
capacitance is connected.
FB pin
Voltage
When input power is turned on, the VCC capacitor is
charged by the current supplied from the start-up circuit
and its voltage increases. Then, when Vcc reaches the ON
threshold voltage, the IC starts operation. In steady
8.5V
CS pin
Voltage
operation, the IC operates at the voltage supplied from an
auxiliary winding. Right after IC start-up, however, Vcc
drops until the auxiliary voltage increases sufficiently.
Start-up
of IC
Determine the capacitance connected to VCC pin so that
Vcc does not drop to the OFF threshold voltage in any
Fig.23
Latch Mode
CS pin voltage waveform at start-up (2)
（when the power supply can not start up）
condition.
We recommend that you choose the capacitance
connected to VCC pin so that the bottom of Vcc becomes
larger than 11V as the result of typical experiment.
Fig.24
Vcc waveform at start-up (1)
（at normal start-up）
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When Vcc capacitance is too small, Vcc drops to the
OFF threshold voltage as shown in Fig.25 before the
auxiliary winding voltage increases sufficiently. In this case,
Vcc repeatedly goes up and down between the ON and
OFF threshold voltages, and the power supply can not
start up.
(1-3) At stopping
When the power supply is turned off by shutdown of
input voltage, output voltage remains low for certain period
of time before the IC stops operation.
Fig.25
Vcc waveform at start-up (2)
（when the power supply can not start up）
During this period, FB pin voltage increases and the CS
pin clamp circuit is cancelled because output voltage
remains low. As a result, CS pin voltage increases as
shown in Fig.26.
CS pin voltage shall not reach the threshold voltage of
Secondary
Side DC
Output
Voltage
the latch mode. As shown in Fig.27, if CS pin voltage
reaches the threshold voltage, the latch mode is held for a
OFF
Threshold
Voltage
( 9V )
VCC pin
Voltage
period of time until Vcc capacitor voltage drops to OFF
threshold voltage. As a result, the power supply cannot be
re-started even if input voltage is turned on again.
In such a case, the following measures shall be taken:
・Reduce the time taken until the IC stops operation after
FB pin
Voltage
the output voltage has dropped through reducing Vcc
capacitance.
・Suppress CS pin voltage rise through increasing CS pin
capacitance.
8.5V
CS pin
Voltage
(2) Hold time of Vcc
Fig.26
Waveform at stopping (1)
In some cases, VCC pin capacitance shall be increased
to hold Vcc above the OFF threshold voltage at abrupt load
change after the power supply has started up.
However, when VCC pin capacitance becomes larger,
start-up time gets longer.
Secondary
Side DC
Output
Voltage
In such a case, the circuit shown in Fig.28 is effective.
Reducing C2 shortens start-up time, and hold time can
be kept long because power is supplied via C4 after
OFF
Threshold
Voltage
( 9V )
VCC pin
Voltage
start-up.
FB pin
Voltage
8.5V
CS pin
Voltage
Fig.28
Latch Mode
( The period when
IC can not re-start )
Vcc circuit
Fig.27
Waveform at stopping (2)
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(3) Protection using CS pin for FA5526/27/28
In steady operation, the CS pin voltage is clamped by a
4V zener diode. Externally forcing CS pin voltage to
increase to the threshold voltage, 8.5V, for the latch mode
allows the IC to stop its operation for protection.
In this case, a current of more than the sink capacity of
4V zener diode, 84uA, shall be applied to the CS pin.
Set the input current to the CS pin at 1mA or less as a
guide.
The following shows examples of overvoltage protection
at an arbitrary voltage using the CS pin.
(3-1) Overvoltage detection on the secondary side
Fig.29
Over Voltage protection (1) for FA5526/27/28
Fig.29 shows an example of an overload detection
circuit on the secondary side to change the IC into the
latch mode.
(3-2) Detection of Vcc (1)
Fig.30 shows a circuit where the IC is stopped in the
latch mode upon detecting Vcc overvoltage. In this case,
Vcc voltage is latched at approximately ZD+8.5V.
Use a ZD whose voltage is larger than the ON threshold
voltage of the low-voltage malfunction preventive circuit.
Otherwise, the IC cannot start.
(3-3) Detection of Vcc (2)
Fig.30
Over Voltage protection (2) for FA5526/27/28
Fig.31
Over Voltage protection (3) for FA5526/27/28
Fig.32
Over Voltage protection (1) for FA5536/37/38
Fig.31 shows another circuit to detect Vcc overvoltage.
In this case, Vcc voltage is latched approximately at ZD
voltage.
Use a ZD whose voltage is larger than the ON threshold
voltage of the low-voltage malfunction preventive circuit.
Otherwise, the IC cannot start.
(4) Protection using CS pin for FA5536/37/38
FA5536/37/38 does not include any latch function.
Therefore, the external latch circuit is necessary for
Over-Voltage Protection as latch mode. Fig.32 shows
the OVP latch circuit by primary side detection at VCC pin
and Fig.33 shows the OVP latch circuit by secondary side
detection through a optocoupler “PC”.
When CS pin voltage is pulled down below 0.68V ( typ. ),
the switching is shut-down. Once the NPN transistor “Q2”
and “Q3” turn-on when the diode “ZD1” or optocoupler
“PC” supplies the current to resistor “R1” by detection of
Over-Voltage, PNP transistor “Q1” turns-on and “Q2” and
“Q3” are maintained in ON-State.
Then, CS pin voltage is maintained at low level until the
current of a diode ZD2 is cut VCC pin voltage decreases
below OFF threshold ( 9V ) .
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(5) When not using an overload protection
function
As shown in Fig.34, connect a resistor R3 of 18k ohm
between FB pin and GND.
As a result, FB pin voltage does not increase to the
threshold voltage for overload protection and the IC does
not change to the latch mode even at overload.
In this case, the latch protection for over-voltage is also
available.
(6) Correction of overload detection current
( Line Conversation )
If the power supply output becomes overload, the
current of the MOSFET is limited by the maximum
Fig.33
Over Voltage protection (2) for FA5536/37/38
Fig.34
When not using overload protection
threshold voltage of the IS pin and power supply voltage
drops. If the state continues as it is, an overload protection
function operates to stop the IC in the latch mode. For
details of an overload protection function, see “9-(8)
Overload protection function.”
When the overload protection operates, the output
current of the power supply varies depending on the input
voltage; and the higher the input voltage is, the larger the
output current.
In such a case, connect R4 between the current
detection resistor Rs and IS pin, and add a correction
resistor R5 as shown in Fig.35. The typical resistance of
R5 is several hundreds of k ohm to several Meg ohm. Note
that the above correction slightly decreases the value of
overload current limit to stop the IC in the latch mode even
if input voltage is low.
Fig.35
Correction of overload detection current
( Line Conversation )
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(7) Improvement of input power at light load
This IC is provided with a function to lower switching
frequency at light load in order to reduce power dissipation.
However, depending on the circuit used, switching
frequency cannot be sufficiently reduced, leading to
insufficient reduction of power dissipation at light load.
In such a case, connect R6 between the auxiliary winding
and the IS pin as shown in Fig.36. When R4 is 1k ohm, R6
is several hundreds of k ohm to 1Meg ohm. The smaller the
R6 is, the lower the switching frequency at light load.
However, negative voltage is applied to the IS pin due to
R6 for some time while MOSFET is ON. Be aware that the
negative voltage shall not be lower than absolute maximum
rationg,-0.3V.
Fig.36
Input power improvement circuit at light load
In addition, when switching frequency is set too low at
light load, transformer or other apparatus may produce
noise.
(8) Prevention of malfunction caused by noise
This IC is an analog IC, and noise applied to anyone of
the pins may cause malfunction. If malfunction is detected,
use the IC through referring to the following description and
fully checking a power supply unit.
In addition, arrange the capacitors connected to pins as
close to the IC as possible and take great care of wiring, for
effective noise suppression.
(8-1) FB pin
Fig.37
The FB pin sets the threshold voltage of the current
Prevention of malfunction caused by noise
(FB pin)
comparator. Any noise applied to the FB pin may disturb
output pulses. Usually the capacitor C5 is connected as
shown in Fig.37 to suppress noise.
(8-2) IS pin
As described in “9.-(4) Blanking,” this IC has a blanking
function, and malfunction caused by a surge current
produced at turn-on of the MOSFET is hard to occur.
A malfunction, however, may occur when a surge current
is excessively large or when any noise is externally applied
at other than turn-off.
In such a case, add a CR filter to the IS pin as shown in
Fig.38.
Fig.38
(8-3) VCC pin
Prevention of malfunction caused by noise
(IS pin)
Relatively large noise may occur at the VCC pin because
a large current flows from the VCC pin at the instant of
driving the MOSFET. If noise is excessively large, a
malfunction may occur of the IC. Pay full attention to
capacitance and characteristics of the capacitor between
the VCC pin and GND to reduce noise as much as possible.
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(9) Over Temperature Protection as latch mode
for FA5526 / 27 / 28
Over Temperature Protection as latch mode can be
achieved by the circuit shown in Fig.39 for FA5526/27/28.
Here, a diode D1 connected to separated line from VCC
pin, because the start-up time of IC may become too long
when the circuit including a thermistor is connected to VCC
pin of IC directly.
Please note that the circuit shown in Fig. 39 can not be
used for FA5536/37/38, because FA5536/37/38 does not
include any latch function.
(10) Prevention of malfunction caused by
negative voltage applied to pins
Fig. 39
Over Temperature Protection
by Latch Mode for FA5526 / 5527 /5528
When a large negative voltage is applied to a pin, a
parasitic element in the IC may operate and cause a
Note : OTP Latch by FA5536 / 5537 / 5538 can not
malfunction. Be sure that voltage applied to a pin shall not
be achieved by above circuit. FA5536 / 5537
be -0.3V or less.
/ 5538 may need very complicated circuit for
Voltage oscillation generated at turn-off of the MOSFET
OTP latch.
may be applied to the OUT pin via the parasitic
capacitance of the MOSFET, resulting in the negative
voltage applied to the OUT pin.
In such a case, connect a Shottky diode between each
pin and GND. Forward voltage of the Shottky diode can
suppress negative voltage at each pin. Use a Shottky
diode with low forward voltage.
Fig.40 shows an example of a circuit with a Shottky
diode connected to the OUT pin.
Fig.40
Negative voltage prevention circuit
(11) Gate circuit configuration
A resistor is generally inserted between the gate
terminal of the MOSFET and the OUT pin of the IC for
adjustment of switching speed, suppression of voltage
oscillation at the gate terminal and other purposes.
Sometimes, the drive currents for turning-on and -off
must independently determined.
In such a case, connect the gate terminal of the
MOSFET and OUT pin of the IC as shown in Fig.41 or
Fig.42.
In Fig.41, the driving current is limited by Rg1 + Rg2 at
Fig.41
Gate circuit (1)
Fig.42
Gate circuit (2)
turn-on and by only Rg2 at turn-off
In Fig.42 the driving current is limited by only RG1 at
turn-on and by parallel-connected Rg1 and Rg2 at
turn-off.
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(12) Loss calculation
IC loss shall be determined to use the IC within its rating.
Since it is hard to directly measure IC loss, an example of
calculating approximate IC loss is given below.
Total IC loss, Pd, is obtained by the following equation:
Pd = Vcc * ( Iccop1 + Qg * f ) + VVH * IHrun
Where Vcc is the supply voltage to the IC, Iccop1 is
consumption current of the IC, Qg is total gate charge of
the MOSFET, f is switching frequency, VVH is VH pin
voltage and IHrun is a current flowing into the VH pin when
the IC operates.
This equation gives an approximate value of Pd, which
is a little greater than the actual loss. Take into
consideration variation and temperature characteristics of
each value
(Example)
When the VH pin is connected to half-wave rectification
waveform at power supply of 264Vac, the average VH pin
voltage is approximately 119V.
Under above condition, let us suppose Vcc = 18V and
Qg = 80nC at Tj = 25 degree.
When using FA5528 or FA5538, according to the
specifications IHrun = 25uA = 0.025mA ( typ. ), Iccop1 =
1.4mA ( typ. ) and f = 60kHz = 0.06MHz ( typ.).
Thus, typical IC loss Pd:
Pd = 18V * ( 1.4mA + 80nC * 0.06MHz ) + 119V * 0.025mA
= 115mW ( typ. )
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(Reference)
Sub-harmonic oscillation and slope
compensation
In a peak-value-control current mode, when the
converter operates in an inductor-current continuous mode
and at duty cycle of 50% or more, the current may oscillate
at an integral multiple of switching frequency. This
oscillation is called subharmonic oscillation.
Fig.43
Inductor current without slope compensation
Fig. 43 shows an example of inductor current waveform
when a subharmonic oscillation occurs.
It is found that ON and OFF periods vary while the peak
value of an inductor current, switching cycle and current
slopes during ON and OFF periods remain unchanged.
The harmonic oscillation may increase ripple voltage
contained in the output voltage or cause an unusual noise.
The subharmonic oscillation can be prevented by giving
Fig.44
Inductor current with slope compensation
a certain gradient to the threshold of the peak current as
shown in Fig. 44. This is called slope compensation.
Generally, the gradient of slope compensation required
for preventing a subharmonic oscillation is given by the
following relational expression:
Kc 
Ld  Lu
2
Here,
Lu：Gradient of an inductor current during the ON period
Ld：Gradient of an inductor current during the OFF period
Kc：Gradient of slope compensation
The above parameters are shown in Fig.45.
Fig.45
Inductor current without slope compensation
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11. Example of an application circuit
The following circuit is common to both of FA5528 and FA5538. FA5526/27/28/36/37/38 can be used for same
topology
except the protection circuit and the transformer design which depends on switching frequency.
Note :
The example of an application circuit is intended to be used only for reference and not to guarantee performance or
characteristics.
Input power at no-load
Efficiency (Io=5A)
200
Efficiency (%)
Input power (mW)
250
150
100
50
0
50
100
150
200
Line Voltage (Vac)
250
90
89
88
87
86
85
84
83
82
81
50
300
150
200
250
300
Line voltage (Vac)
Switching frequency at no-load
Over Current Protection vs. AC Line Voltage
DC Output Current at OCP
25
20
fsw (kHz)
100
15
10
5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
0
50
100
150
200
Line voltage (Vac)
250
80 100 120 140 160 180 200 220 240 260 280
300
AC Line Voltage ( V)
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