IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER INDUSTRIAL TEMPERATURE RANGE FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER IDT74FCT161AT/CT FEATURES: DESCRIPTION: • • • • The IDT74FCT161T is a high-speed synchronous modulo-16 binary counter built using an advanced dual metal CMOS technology. It is synchronously presettable for application in programmable dividers and has two types of count enable inputs plus a terminal count output for versatility in forming synchronous multi-stage counters. The IDT74FCT161T has asynchronous Master Reset inputs that override all other inputs and force the outputs low. • • • • A and C grades Low input and output ≤1µA (max.) CMOS power levels True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Power off disable outputs permit "live insertion" Available in SOIC and QSOP packages FUNCTIONAL BLOCK DIAGRAM P1 P0 P2 P3 PE CEP CET TC CP CP CP D CP CD Q 30 D Q Q0 DETAIL A DETAIL A DETAIL A Q1 Q2 Q3 DETAIL A MR Q0 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE MARCH 2002 1 © 2002 Integrated Device Technology, Inc. DSC-5504/2 IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION MR 1 16 VCC CP 2 15 TC P0 3 14 Q0 P1 4 13 Q1 P2 5 12 Q2 P3 6 11 Q3 CEP 7 10 CET GND 8 9 Symbol Description VTERM(2) Max Unit VTERM(3) Terminal Voltage with Respect to GND –0.5 to +7 V Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Output and I/O terminals only. CAPACITANCE (TA = +25°C, F = 1.0MHz) PE Parameter(1) Symbol Conditions Typ. Max. CIN Input Capacitance VIN = 0V 6 10 pF COUT Output Capacitance VOUT = 0V 8 12 pF NOTE: 1. This parameter is measured at characterization but not tested. SOIC/ QSOP TOP VIEW PIN DESCRIPTION Pin Names CEP CET CP MR P0-3 PE Q0-3 TC Description Count Enable Parallel Input Count Enable Trickle Input Clock Pulse Input (Active Rising Edge) Asynchronous Master Reset Input (Active LOW) Parallel Data Inputs Parallel Enable Input (Active LOW) Flip-Flop Outputs Terminal Count Output FUNCTION TABLE(1) PE X L H H H CET X X H L X CEP X X H X L NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care 2 Unit Action on the Rising Clock Edge(s) Reset (Clear) Load (Px→Qx) Count (Increment) No Change (Hold) No Change (Hold) IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VCC = 5.0V ± 5% Symbol Test Conditions(1) Parameter VIH Input HIGH Level Guaranteed Logic HIGH Level VIL Input LOW Level Guaranteed Logic LOW Level IIH IIL Input HIGH Current Input LOW Current (4) (4) (4) II Input HIGH Current VIK Clamp Diode Voltage (5) Min. Typ.(2) 2V — Max. Unit — — V — 0.8 V VCC = Max. VI = 2.7V — — ±1 µA VCC = Max. VI = 0.5V — — ±1 µA VCC = Max., VI = VCC (Max.) — — ±1 µA VCC = Min., IN = –18mA — –0.7 –1.2 V –60 –120 –225 mA 2.4 2 — 3.3 3 0.3 — — 0.5 V — — 200 0.01 — 1 mV mA (3) IOS Short Circuit Current VCC = Max. , VO = GND VOH Output HIGH Voltage VOL Output LOW Voltage VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL VH ICC Input Hysteresis Quiescent Power Supply Current IOH = –8mA IOH = –15mA IOL= 48mA — VCC = Max. VIN = GND or VCC NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter is ±5µA at TA = –55°C. 5. Clock pin requires a minimum VIH of 2.5V. 3 V IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Test Conditions(1) Min. — Typ.(2) 0.5 Max. 2 Unit mA VIN = VCC VIN = GND — 0.15 0.25 mA/ MHz VCC = Max., Outputs Open Load Mode fCP = 10MHz 50% Duty Cycle CEP = CET = PE = GND MR = VCC One Bit Toggling at fi = 5MHz 50% Duty Cycle VIN = VCC VIN = GND — 1.5 3.5 mA VIN = 3.4V VIN = GND — 2 5.5 VCC = Max., Outputs Open Load Mode fCP = 10MHz 50% Duty Cycle CEP = CET = PE = GND MR = VCC Four Bits Toggling at fi = 5MHz 50% Duty Cycle VIN = VCC VIN = GND — 3.8 7.3(5) VIN = 3.4V VIN = GND — 5 12.3(5) Symbol ∆ICC Parameter Quiescent Power Supply Current TTL Inputs HIGH ICCD Dynamic Power Supply Current (4) VCC = Max., Outputs Open Load Mode CEP = CET = PE = GND MR = VCC One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. VIN = 3.4V(3) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 4 IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE IDT74FCT161AT Symbol (1) Parameter Condition tPLH tPHL tPLH tPHL Propagation Delay CP to Qx (PE Input HIGH) Propagation Delay CP to Qx (PE Input LOW) CL = 50pF RL = 500Ω tPLH tPHL (2) Min. Max. IDT74FCT161CT (2) Min. Max. Unit 2 7.2 2 5.8 ns 2 6.2 2 5.8 ns Propagation Delay CP to TC 2 9.8 2 7.4 ns tPLH tPHL Propagation Delay CET to TC 1.5 5.5 1.5 5.2 ns tPHL Propagation Delay MR to Qx 2 8.5 2 6 ns tPHL Propagation Delay MR to TC 2 7.5 2 7 ns tSU Set-up Time, HIGH or LOW, Px to CP 4 — 4 — ns tH Hold Time, HIGH or LOW, Px to CP 1.5 — 1.5 — ns tSU Set-up Time, HIGH or LOW, PE or SR to CP 9.5 — 9.5 — ns tH Hold Time, HIGH or LOW, PE or SR to CP 1.5 — 1.5 — ns tSU Set-up Time, HIGH or LOW, CEP or CET to CP 9.5 — 9.5 — ns tH Hold Time, HIGH or LOW, CEP or CET to CP 0 — 0 — ns tW Clock Pulse, Width (Load) HIGH or LOW 4(3) — 4(3) — ns tW Clock Pulse, Width (Count) HIGH or LOW 6 — 6 — ns MR Pulse Width LOW Recovery Time MR to CP (3) — — (3) — — ns ns tPHL tPHL 4 5 NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This limit is guaranteed but not tested. 5 4 5 IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS V CC SWITCH POSITION 7.0V 500Ω V OUT VIN Pulse Generator D.U.T . 50pF RT Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open 500Ω DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. CL Octal link Test Circuits for All Outputs DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. 3V 1.5V 0V 3V 1.5V 0V tREM tSU LOW-HIGH-LOW PULSE tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 3V 1.5V 0V tH 1.5V 1.5V Octal link Pulse Width Octal link Set-Up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V 1.5V CONTROL INPUT tPZL OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH Octal link SWITCH OPEN 0V tPLZ 3.5V 0.3V VOL tPHZ 0.3V VOH 1.5V 0V 0V Octal link Propagation Delay Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 6 IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT X Temperature Range FCT XXXX Device Type X Package SO Q Small Outline IC Quarter-size Small Outline Package 161AT 161CT Synchronous Presettable Binary Counter 74 - 40° to +85°C DATA SHEET DOCUMENT HISTORY 3/25/2002 Removed standard speed grade CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 7 for Tech Support: [email protected] (408) 654-6459