FAST CMOS 16-BIT REGISTER (3-STATE) IDT54/74FCT16374T/AT/CT/ET IDT54/74FCT162374T/AT/CT/ET Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Common features: – 0.5 MICRON CMOS Technology – High-speed, low-power CMOS replacement for ABT functions – Typical tSK(o) (Output Skew) < 250ps – Low input and output leakage ≤1µA (max.) – ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) – Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack – Extended commercial range of -40°C to +85°C – VCC = 5V ±10% • Features for FCT16374T/AT/CT/ET: – High drive outputs (-32mA IOH, 64mA IOL) – Power off disable outputs permit “live insertion” – Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C • Features for FCT162374T/AT/CT/ET: – Balanced Output Drivers: ±24mA (commercial), ±16mA (military) – Reduced system switching noise – Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25°C The FCT16374T/AT/CT/ET and FCT162374T/AT/CT/ET 16-bit edge-triggered D-type registers are built using advanced dual metal CMOS technology. These high-speed, low-power registers are ideal for use as buffer registers for data synchronization and storage. The Output Enable (xOE) and clock (xCLK) controls are organized to operate each device as two 8-bit registers or one 16-bit register with common clock. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16374T/AT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The FCT162374T/AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times– reducing the need for external series terminating resistors. The FCT162374T/AT/CT/ET are plug-in replacements for the FCT16374T/AT/CT/ET and ABT16374 for on-board bus interface applications. FUNCTIONAL BLOCK DIAGRAM 1OE 2OE 1CLK 2CLK 1D1 2D1 D D 2O1 1O1 C C TO 7 OTHER CHANNELS TO 7 OTHER CHANNELS 2542 drw 01 2542 drw 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND INDUSTRIAL TEMPERATURE RANGES FEBRUARY 1997 1997 Integrated Device Technology, Inc. 5.8 For the latest information regarding this part, please contact IDT's web site at http://www.idt.com or fax-on-demand service at (US)1-800-9-IDT-FAX / (International) 408-492-8391. DSC-2542/9 1 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES PIN CONFIGURATIONS 1OE 1 48 1CLK 1OE 1 48 1CLK 1 O1 2 47 1 D1 1O1 2 47 1 D1 1 O2 3 46 1 D2 1O2 3 46 1 D2 GND 4 45 GND GND 4 45 GND 1 O3 5 44 1 D3 1O3 5 44 1 D3 1 O4 6 43 1 D4 1O4 6 43 1 D4 VCC 7 42 VCC VCC 7 42 VCC 1 O5 8 41 1 D5 1O5 8 41 1 D5 1 O6 9 40 1 D6 1O6 9 40 1 D6 GND 10 39 GND GND 10 39 GND 1 O7 11 38 1 D7 1O7 11 38 1 D7 1 O8 37 1 D8 1O8 12 37 1 D8 2 O1 12 SO48-1 SO48-2 13 SO48-3 36 2 D1 2O1 13 36 2 D1 2 O2 14 35 2 D2 2O2 14 35 2 D2 GND 15 34 GND GND 15 34 GND 2 O3 16 33 2 D3 2O3 16 33 2 D3 2 O4 17 32 2 D4 2O4 17 32 2 D4 VCC 18 31 VCC VCC 18 31 VCC 2 O5 19 30 2 D5 2O5 19 30 2 D5 2 O6 20 29 2 D6 2O6 20 29 2 D6 GND 21 28 GND GND 21 28 GND 2 O7 22 27 2 D7 2O7 22 27 2 D7 2 O8 23 26 2 D8 2O8 23 26 2 D8 2OE 24 25 2CLK 2OE 24 25 2CLK E48-1 2542 drw 03 2542 drw 04 SSOP/ TSSOP/TVSOP TOP VIEW CERPACK TOP VIEW 5.8 2 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES FUNCTION TABLE(1) PIN DESCRIPTION Pin Names xDx xCLK Inputs Description xDx xCLK xOE xOx X L H Z X H H Z Load L L H ↑ ↑ L Register L H ↑ ↑ H Z Function Data Inputs Hi-Z Clock Inputs xOx 3-State Outputs. xOE 3-State Output Enable Input (Active LOW) 2542 tbl 01 Outputs L H H Z NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance ↑ = LOW-to-HIGH Transition ABSOLUTE MAXIMUM RATINGS(1) CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Description Max. VTERM(2) Terminal Voltage with Respect to –0.5 to +7.0 GND –0.5 to VTERM(3) Terminal Voltage with Respect to GND VCC +0.5 TSTG Storage Temperature –65 to +150 Unit V I OUT mA DC Output Current –60 to +120 2542 tbl 02 Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance V °C Conditions VIN = 0V Typ. 3.5 VOUT = 0V 3.5 Max. Unit 6.0 pF 8.0 NOTE: 1. This parameter is measured at characterization but not tested. pF 2542 lnk 04 2542 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT. 5.8 3 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, V CC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10% Parameter Input HIGH Level Test Conditions(1) Guaranteed Logic HIGH Level VIL Input LOW Level II H Input HIGH Current (Input pins)(5) Symbol VIH Min. 2.0 Typ.(2) — Max. Guaranteed Logic LOW Level — — 0.8 V VCC = Max. — — ±1 µA — — ±1 — — ±1 — — ±1 — — ±1 VI = VCC Input HIGH Current (I/O pins)(5) II L Input LOW Current (Input pins)(5) VI = GND Input LOW Current (I/O pins)(5) I OZH High Impedance Output Current VCC = Max. VO = 2.7V pins) (5) I OZL (3-State Output VIK Clamp Diode Voltage I OS Short Circuit Current VH Input Hysteresis I CCL I CCH I CCZ Quiescent Power Supply Current VO = 0.5V VCC = Min., I IN = –18mA VCC = Max., VO = GND(3) — VCC = Max., VIN = GND or VCC — Unit V µA — — ±1 — –0.7 –1.2 V –80 –140 –250 mA — 100 — mV — 5 500 µA 2542 lnk 05 OUTPUT DRIVE CHARACTERISTICS FOR FCT16374T Symbol IO Parameter Output Drive Current VOH Output HIGH Voltage Test Conditions(1) VCC = Max., VO = 2.5V(3) Min. –50 Typ.(2) — Max. –180 Unit mA VCC = Min. 2.5 3.5 — V 2.4 3.5 — V 2.0 3.0 — V — 0.2 0.55 V — — ±1 I OH = –3mA VIN = VIH or V IL VOL Output LOW Voltage I OFF Input/Output Power Off Leakage(5) VCC = Min. VIN = VIH or V IL VCC = 0V, VIN or V O I OH = –12mA MIL. I OH = –15mA COM'L. I OH = –24mA MIL. I OH = –32mA COM'L.(4) I OL = 48mA MIL. I OL = 64mA COM'L. ≤ 4.5V µA 2542 lnk 06 OUTPUT DRIVE CHARACTERISTICS FOR FCT162374T Symbol I ODL Parameter Output LOW Current Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V (3) Min. 60 Typ.(2) 115 Max. 200 Unit mA I ODH Output HIGH Current VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) –60 –115 –200 mA VOH Output HIGH Voltage 2.4 3.3 — V VOL Output LOW Voltage VCC = Min. VIN = VIH or V IL VCC = Min. VIN = VIH or V IL — 0.3 0.55 V I OH = –16mA MIL. I OH = –24mA COM'L. I OL = 16mA MIL. I OL = 24mA COM'L. NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. The test limit for this parameter is ± 5µA at TA = –55°C. 5.8 2542 lnk 07 4 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Test Conditions(1) Min. Typ.(2) Max. Unit — 0.5 1.5 mA VIN = VCC VIN = GND — 60 100 µA/ MHz VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle xOE = GND fi = 5MHz 50% Duty Cycle One Bit Toggling VIN = VCC VIN = GND — 0.6 1.5 mA VIN = 3.4V VIN = GND — 1.1 3.0 VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle xOE = GND Sixteen Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND — 3.0 5.5 (5) VIN = 3.4V VIN = GND — 7.5 19.0 (5) Symbol Parameter ∆ICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = 3.4V(3) ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open xOE = GND One Input Toggling 50% Duty Cycle IC Total Power Supply Current (6) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 5.8 2542 tbl 08 5 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT16374T/162374T Com'l. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU FCT16374AT/162374AT Mil. Com'l. Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit Propagation Delay xCLK to xOx Output Enable Time CL = 50pF RL = 500Ω 2.0 10.0 2.0 11.0 2.0 6.5 2.0 7.2 ns 1.5 12.5 1.5 14.0 1.5 6.5 1.5 7.5 ns 1.5 8.0 1.5 8.0 1.5 5.5 1.5 6.5 ns 2.0 — 2.0 — 2.0 — 2.0 — ns 1.5 — 1.5 — 1.5 — 1.5 — ns 7.0 — 7.0 — 5.0 — 6.0 — ns — 0.5 — 0.5 — 0.5 — 0.5 ns Output Disable Time Set-up Time HIGH or LOW, xDx to xCLK tH Hold Time HIGH or LOW, xDx to xCLK tW xCLK Pulse Width HIGH or LOW tSK(o) Output Skew (3) FCT16374CT/162374CT Com'l. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU Mil. Parameter Parameter Condition(1) Min.(2) Propagation Delay xCLK to xOx Output Enable Time CL = 50pF RL = 500Ω 2.0 Output Disable Time Set-up Time HIGH or LOW, xDx to xCLK tH Hold Time HIGH or LOW, xDx to xCLK tW xCLK Pulse Width HIGH or LOW tSK(o) Output Skew (3) FCT16374ET/162374ET Mil. Max. Min.(2) 5.2 2.0 1.5 5.5 1.5 Com'l. Mil. Max. Min.(2) Max. Min.(2) Max. Unit 6.2 1.5 3.7 — — ns 1.5 6.2 1.5 4.4 — — ns 5.0 1.5 5.7 1.5 3.6 — — ns 2.0 — 2.0 — 1.5 — — — ns 1.5 — 1.5 — 0.0 — — — ns 5.0 — 6.0 — 3.0 (4) — — — ns — 0.5 — 0.5 — 0.5 — — NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This limit is guaranteed but not tested. 5.8 ns 2542 tbl 09 6 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS V CC 500Ω Pulse Generator Switch Open Drain Disable Low Closed Enable Low V OUT VIN Test 7.0V Open All Other Tests D.U.T. 50pF RT 2542 lnk 10 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 500Ω CL 2542 drw 05 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tH tSU tREM tSU PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH 2542 drw 07 2542 drw 06 PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V DISABLE 3V 1.5V CONTROL INPUT tPZL VOH 1.5V VOL OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED 2542 drw 08 SWITCH OPEN 3.5V 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH 0V tPLZ 0.3V VOL tPHZ 0.3V VOH 1.5V 0V 0V 2542 drw 09 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 5.8 7 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XX XXXX FCT Temp. Range Device Type X Package X Process Blank B Commercial MIL-STD-883, Class B PV PA PF E Shrink Small Outline Package (SO48-1) Thin Shrink Small Outline Package (SO48-2) Thin Very Small Outline Package (SO48-3) CERPACK (E48-1) 16374T 16374AT 16374CT 16374ET 162374T 162374AT 162374CT 162374ET Non-Inverting 16-Bit Register 54 74 –55°C to +125°C –40°C to +85°C 2542 drw 10 5.8 8