16-BIT BUS SWITCH IDT74FST163245 IDT74FST163P245 ADVANCE INFORMATION Integrated Device Technology, Inc. no noise of their own while providing a low resistance path for an external driver. These devices connect input and output ports through an n-channel FET. When the gate-to-source junction of this FET is adequately forward-biased the device conducts and the resistance between input and output ports is small. Without adequate bias on the gate-to-source junction of the FET, the FET is turned off, therefore with no VCC applied, the device has hot insertion capability. The low on-resistance and simplicity of the connection between input and output ports reduces the delay in this path to close to zero. The FST163245 and FST163P245 are 16-bit TTL-compatible bus switches. The OE pins provide enable control. The FST163P245 supports precharge on the B port. So when OE is high, A and B ports are isolated and B outputs are precharged to the bias voltage through the equivalent of a 10KΩ resistor (1B1-8 precharged to VBIAS1 and 2B1-8 precharged to VBIAS1). FEATURES: • Bus switches provide zero delay paths • Extended commercial range of –40°C to +85°C • Low switch on-resistance: FST163xxx – 5Ω FST163Pxxx – 5Ω with precharge • TTL-compatible input and output levels • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Available in SSOP, TSSOP and TVSOP DESCRIPTION: The FST163245/163P245 belong to IDT's family of Bus switches. Bus switch devices perform the function of connecting or isolating two ports without providing any inherent current sink or source capability. Thus they generate little or FUNCTIONAL BLOCK DIAGRAM VBIAS1 1A1 1A1 1B1 1A8 1B8 1B1 1A8 1B8 2A1 2B1 2A8 2B8 VBIAS1 2A1 2B1 2A8 2B8 1OE 1OE 2OE 2OE FST163245 FST163P245 3513 drw 01 PIN DESCRIPTION Pin Names 1A1-8, 2A1-8 I/O I/O Bus A Description 1B1-8, 2B1-8 I/O Bus B 1OE, 2OE I Bus Switch Enable (Active LOW) VBIAS1 I Precharge Reference Voltage 3513 tbl 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE FEBRUARY 1997 1997 Integrated Device Technology, Inc. DSC-3513/- 1 IDT74FST163245, IDT74FST163P245 16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION *NC/**VBIAS1 1 48 1OE 1B1 2 47 1A1 1B2 3 46 1A2 GND 4 45 GND 1B3 5 44 1A3 1B4 6 43 1A4 VCC 7 42 VCC 1B5 8 41 1A5 1B6 9 40 1A6 GND 10 39 GND 1B7 11 38 1A7 37 1A8 Symbol Description VTERM(2) Terminal Voltage with Respect to GND TSTG Storage Temperature I OUT Max. –0.5 to +7.0 Unit V –65 to +150 °C 128 mA Maximum Continuous Channel Current 3513 tbl 02 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating condiitions for extended periods may affect reliability. 2. VCC, Control and Switch terminals. CAPACITANCE(1) Symbol SO48-1 SO48-2 SO48-3 CIN Control Input Capacitance CI/O Switch Input/Output Capacitance 1B8 12 2B1 13 36 2A1 2B2 14 35 2A2 GND 15 34 GND 2B3 16 33 2A3 Inputs 2B4 17 32 2A4 xOE L VCC 18 31 VCC 2B5 19 30 2A5 2B6 20 29 2A6 GND 21 28 GND 2B7 22 27 2A7 2B8 23 26 2A8 *NC/**GND 24 25 2OE *FST163245 **FST163P245 SSOP/ TSSOP/TVSOP TOP VIEW Conditions(2) Typ. Unit Parameter 4 Switch Off NOTES: 1. Capacitance is characterized but not tested 2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V pF pF 3513 tbl 04 FUNCTION TABLE H Outputs Bus B Data to Bus A High Z State (163245) Precharge Bus B to VBIAS (163P245) 3513 tbl 03 3513 drw 02 2 IDT74FST163245, IDTFST163P245 16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, VCC = 5.0V ±10% Parameter Input HIGH Voltage Test Conditions(1) Guaranteed Logic HIGH for Control Inputs Min. 2.0 Typ.(2) — Max. — Unit V VIL Input LOW Voltage Guaranteed Logic LOW for Control Inputs — — 0.8 V II H Input HIGH Current VCC = Max. VI = VCC — — ±1 µA II L Input LOW Voltage VI = GND — — ±1 IOZH High Impedance Output Current IOZL (3-State Output pins) IOS Short Circuit Current VIK Clamp Diode Voltage Symbol VIH RON IOFF Switch On Resistance(4) Input/Output Power Off Leakage Current (5) IO Precharge Output ICC Quiescent Power Supply Current VO = VCC — — ±1 VO = GND — — ±1 VCC = Max., VO = GND(3) — 300 — mA VCC = Min., IIN = –18mA — –0.7 –1.2 V — 5 7 Ω — 10 15 Ω — — 1 µA 0.15 — — mA — 0.1 3 VCC = Max. VCC = Min. VIN = 0.0V 163xxx, ION = 30mA 163Pxxx VCC = Min. VIN = 2.4V 163xxx, ION = 15mA 163Pxxx VCC = 0V, VIN or VO ≤ 4.5V VCC = Min., BIASV = 2.4V, VO = 0V VCC = Max., VIN = GND or VCC NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Measured by voltage drop between ports at indicated current through the switch. 5. This parameter applies to the FST163P245 only. 3 µA µA 3513 tbl 05 IDT74FST163245, IDT74FST163P245 16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ∆ICC ICCD IC Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Total Power Supply Current (6) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open Enable Pin Toggling 50% Duty Cycle VCC = Max. Outputs Open Enable Pins Toggling (16 Switches Toggling) fi = 10MHz 50% Duty Cycle Min. — Typ.(2) 0.5 Max. 1.5 Unit mA VIN = VCC VIN = GND — 30 40 µA/ MHz/ Switch VIN = VCC VIN = GND — 4.8 6.4 mA VIN = 3.4 VIN = GND — 5.3 7.9 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fiN) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fi = Input Frequency N = Number of Switches Toggling at fi All currents are in milliamps and all frequencies are in megahertz. 3513 tbl 06 SWITCHING CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, VCC = 5.0V ±10% Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ |QCI| Description Data Propagation Delay Ai to Bi, Bi to Ai(3,4) Switch Turn on Delay OE to Ai, Bi Switch Turn off Delay OE to Ai, Bi Charge Injection (5,6) Condition(1) CL = 50pF RL = 500Ω Min.(2) — Typ. — Max. 0.25 Unit ns 1.5 — 6.5 ns 1.5 — 5.5 ns — 1.5 — pC 3513 tbl 07 NOTES: 1. See test circuit and waveforms. 2. Minimum limits guaranteed but not tested. 3. This parameter is guaranteed by design but not tested. 4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 2.5ns for 50pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay on the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side. 5. Measured at switch turn off, load = 50 pF in parallel with 10MΩ scope probe, VIN = 0.0 volts. 6. Characterized parameter. Not 100% tested. 4 IDT74FST163245, IDTFST163P245 16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS V CC SWITCH POSITION 500Ω Pulse Generator Switch Open Drain Disable Low Closed Enable Low V OUT VIN Test 7.0V Open All Other Tests D.U.T. 50pF RT 3513 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 500Ω CL 3513 lnk 03 PULSE WIDTH SET-UP, HOLD AND RELEASE TIMES DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tSU 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH 3513 lnk 05 3513 lnk 04 PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V DISABLE 3V 1.5V CONTROL INPUT OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH 3513 lnk 06 SWITCH OPEN 0V tPLZ tPZL VOH 1.5V VOL 3.5V 0.3V VOL tPHZ 0.3V VOH 1.5V 0V 0V 3513 lnk 07 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 5 IDT74FST163245, IDT74FST163P245 16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX FST 16 XX Temp. Range Device Type X Package PV PA PF Shrink Small Outline Package (SO48-1) Thin Shrink Small Outline Package (SO48-2) Thin Very Small Outline Package (SO48-3) 163245 163P245 16-Bit Bus Switch 16-Bit Bus Switch with Precharge 74 –40°C to +85°C 3513 drw 08 6