PWM Doubler/Quad Logic FEATURES IR3599/IR3599A DESCRIPTION 3.3V supply voltage Configurable phase multiplier as either doubler or quad from a single PWM input Capable of generating high output switching frequencies from 200k-800kHz Tri-state PWM input and outputs for power stage shutdown IR3599A is configured to accept IR’s patented Active Tri-Level (ATL) PWM signals while IR3599 accepts industry’s standard tri-state PWM signals VCC Power-on-reset Dual Flat No-Lead (DFN) Package Lead free RoHS compliant package APPLICATIONS Servers and Desktop Computers High Phase Count and Phase Shedding Applications High Frequency and High Efficiency VRM IR3599/IR3599A is a phase multiplier which is designed to double or quadruple the effective maximum phase count from the controller, enabling a well-controlled, high phase count voltage regulator. Each IR3599/IR3599A is able to drive up to four independent power stages from one PWM input. The IR3599/IR3599A can be configured as DOUBLER logic where one PWM signal is internally split to drive the two power stages 180° out of phase, each at half of the PWM input frequency. The IR3599/IR3599A can also be configured as QUAD logic where one PWM signal is internally split at 0º, 90º, 180º, and 270º respectively, and each at 1/4 of the PWM input frequency. IR3599A features the patented IR Active Tri-Level (ATL) PWM input and output, designed to work with IR digital multi-phase controller and IR PowIRstage. The unique doubler/quad mode ATL tri-state timing allows the VR to transition into tri-state faster during load releases. IR3599 features industry’s standard tri-state PWM input and output interfaces, designed to work with general multi-phase controllers, drivers or power stages. IR3599/IR3599A also incorporates a power-on reset feature, which ensures the device is active only after the supply voltage exceeds a certain minimum operating threshold. ORDERING INFORMATION Base Part Number Package Type IR3599 Standard Pack Orderable Part Number Form Quantity DFN 2 mm x 2 mm Tape and Reel 3000 IR3599MTRPBF IR3599A DFN 2 mm x 2 mm Tape and Reel 3000 IR3599AMTRPBF IR3599 DFN 2 mm x 2 mm Tape and Reel 100 IR3599MTRPBF IR3599A DFN 2 mm x 2 mm Tape and Reel 100 IR3599AMTRPBF 1 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A ORDERING INFORMATION IR3599A ― IR3599 ― PBF – Lead Free PBF – Lead Free TR – Tape and Reel TR – Tape and Reel M – DFN Package M – DFN Package PWM_IN 1 V1p8 2 VCC 3 FUNCTION 4 8 PWM1 GND 7 PWM2 Pad = Pin 9 6 PWM3 5 PWM4 Top View 2x2 DFN Figure 1: IR3599/IR3599A Package Top View 2 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 IR3599/IR3599A PWM Doubler/Quad Logic FUNCTIONAL BLOCK DIAGRAM LDO VCC V1p8 POR PWM_IN Tri-state Input Circuit FUNCTION PWM1 PWM2 PWM3 PWM4 Tri-state Output Circuit Control Logic GND Figure 2: IR3599/IR3599A Simplified Functional Block Diagram TABLE 1: FUNCTION CONFIGURATION TABLE 3 Function PWM Mode Phase Mode Part number 0 IR ATL Quad IR3599A 1 IR ATL Doubler IR3599A 0 Standard Tri-state Quad IR3599 1 Standard Tri-state Doubler IR3599 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A TYPICAL APPLICATIONS 12V VIN PWM SW Vout_L1 GND C P U +3.3V VIN VCC Function PWM1 PWM2 PWM_IN PWM3 IR3599A PWM4 V1P8 PWM4 GND PWM SW GND VIN PWM SW GND VIN RCSP Rseries RTh Rseries PWM CCS RCS PWM1 ISEN1 IRTN1 RCSM +3.3V SW GND VCC IR3565 VSEN VRTN RRES PWM2 ISEN2 IRTN2 TSEN1 VIN RTh2 PWM V18A PWM3 ISEN3 IRTN3 TSEN2 12V RTh3 VINSEN VRDY1 VRDY2 SVT/SV_ALERT SV_DIO SV_CLK VV CPU Serial Bus VV VV Rseries SW GND VIN PWM SW GND PWM4 ISEN4 IRTN4 VIN PWM SW GND VDDIO/SV_ADDR PWM1_L2 ISEN1_L2 IRTN1_L2 SM_DIO SM_CLK RCSP_L2 Rseries RTh PWM EN PWROK/EN_L2/INMODE VDDIO Applicable circuit when pin is configured as VDDIO only I2C Bus VIN VCC GND VRHOT_CRIT# From System +3.3V PWM1 Function PWM2 PWM_IN PWM3 IR3599A PWM4 V1P8 PWM4 RVIN_1 RVIN_2 SW GND RCS +3.3V VIN VCC CCS Function RCSM_L2 PWM2_L2 ISEN2_L2 IRTN2_L2 VSEN_L2 VRTN_L2 PWM1 PWM2 PWM_IN PWM3 IR3599A PWM4 V1P8 PWM4 GND PWM C P U VIN PWM SW GND ADDR_PROT GND Vout_L2 SW GND +3.3V VCC PWM1 PWM2 PWM_IN PWM3 IR3599APWM4 V1P8 PWM4 Function GND VIN PWM SW GND VIN PWM SW GND Figure 3: 20-Phase CPU VR solution using IR3599/A in QUAD mode & PowIRstage with the 6-phase Controller 4 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A PIN DESCRIPTIONS PIN # PIN NAME 1 PWM_IN 2 V1p8 1.8V internal LDO output. Place a high quality low ESR 0.47uF ceramic capacitor from this pin to the IR3599/IR3599A GND. 3 VCC Connect this pin to a +3.3V bias supply. Place a high quality low ESR 0.1uF ceramic capacitor from this pin to the IR3599/IR3599A GND. 4 FUNCTION The FUNCTION pin controls the Phase Mode (Doubler or Quad Modes). The FUNCTION pin levels are controlled by connecting the FUNCTION pin to Ground or VCC. Refer to the configuration instructions in Table 1 to program the FUNCTION pin. At power up, the function pin selection is latched into the IR3599/IR3599A, and therefore cannot be changed after initial power up. 5 PWM4 Channel 4 PWM signal to the power stage 6 PWM3 Channel 3 PWM signal to the power stage 7 PWM2 Channel 2 PWM signal to the power stage 8 PWM1 Channel 1 PWM signal to the power stage (PAD) 9 GND 5 PIN DESCRIPTION The PWM_IN is the control signal input. Connect this pin to the PWM output of the controller. In Doubler mode, PWM_IN controls the behavior of PWM1 and PWM2. In QUAD mode, PWM_IN controls the behavior of PWM1, PWM2, PWM3, and PWM4. Bias and reference ground. All signals are referenced to this node. www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A ABSOLUTE MAXIMUM RATINGS Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications are not implied. VCC -0.3V to +4.0V PWM_IN, FUNCTION -0.3V to VCC +0.3V V1P8 -0.3V to 2.2V PWMx -0.3V to VCC +0.3V ESD 2KV, HBM Class 1-C Thermal Information Thermal Resistance (ΘJC) 1 8.9°C/W Thermal Resistance (ΘJA) 73.2°C/W Maximum Junction Temperature 150°C Maximum Storage Temperature Range -65°C to 150°C Maximum Lead Temperature (Soldering 10s) 300°C Note 1: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. TBD: To be determined by Design Engineer. 6 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A ELECTRICAL SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS FOR RELIABLE OPERATION WITH MARGIN Recommended Operating Ambient Temperature Range -40°C to 85°C Maximum Operating Junction Temperature 125°C VCC Supply Voltage Range +2.85V to +3.6V PWM Output frequency Range 200k-800kHz ELECTRICAL CHARACTERISTICS Unless otherwise specified, these specifications were tested at +25°C. VCC = 3.3V. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT 2.85 3.3 3.6 V Supply Supply Voltage VCC Supply Bias Current Idle IVCC_ATL IR3599A only. PWM_IN floating. Note 1 - 1.07 - mA IVCC_TRI IR3599 only. PWM_IN floating. Note 1 - 1.48 - mA IVCC _ATL IR3599A only. fPWMx = 400kHz, D=10%, no load. - 3.04 - mA IVCC_TRI IR3599 only. fPWMx = 400kHz, D=10%, no load. - 1.39 - mA IVCC _ATL IR3599A only. fPWMx = 400kHz, D=10%, no load. - 4.08 - mA IVCC_TRI IR3599 only. fPWMx = 400kHz, D=10%, no load. - 1.38 - mA VCC Rising Threshold for POR - 2.625 - V VCC Falling Threshold for POR - 2.56 - V 1.67 1.8 1.93 V Supply Bias Current ― DOUBLER Mode Supply Bias Current ― QUAD Mode LDO Output Voltage VLDO VCC=3.3V PWM Input IR ATL Mode (IR3599A only) PWM Input High Threshold VIH(PWM) - 1.0 - V PWM Input Low Threshold VIL(PWM) - 0.85 - V PWM Tri-level High Threshold VTH(PWM) - 2.51 - V PWM Tri-level Low Threshold VTL(PWM) - 2.36 - V PWM Input Current Low IIL(PWM_ATL) VPWM = 0V - 0.92 - mA PWM Input Current High IIH(PWM_ATL) VPWM = 1.8V - 0.92 - mA - 43 - ns Minimum Recognized PWM Pulse Width Note 1 PWM Input Standard Tri-state Mode (IR3599 only) PWM Input High Rising Threshold VIH(PWM) - 2.5 - V PWM Input High Falling Threshold VIL(PWM) - 2.35 - V PWM Input Low Rising Threshold VTH(PWM) - 1.0 - V PWM Input Low Falling Threshold VTL(PWM) - 0.85 - V PWM Input Current Low IIL(PWM_TRI) VPWM = 0V - 0.35 - mA PWM Input Current High IIH(PWM_TRI) VPWM = 3.3V - 0.6 - mA 7 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic PARAMETER PWM Input Tri-State Float Voltage PWM Input Impedance SYMBOL VPWM_IN CONDITIONS Floating PWM_IN = floating RPWM Minimum Recognized PWM Pulse Width Note 1 IR3599/IR3599A MIN TYP MAX UNIT - 1.55 1.4 - 1.5 1.62V - 4.2 - kΩ - 39 - ns V PWM Output (IR3599A only) PWM Output High Threshold VOH(PWM) 1.6 - 2.0 V PWM Output Low Threshold VOL(PWM) - - 0.4 V Transition Time ― Rise Transition Time ― Fall Propagation Delay ― Turn-on Propagation Delay ― Turn-off tR(HS) CPCB=50pF. Measured from 10% to 90% PWM output. Note 1 - 12.8 - ns tF(HS) CPCB=50pF. Measured from 90% to 10% PWM output. Note 1 - 7.9 - ns tPDH(HS) Unloaded. Measured from PWM_IN rising edge to PWM1 rising edge. Note 1 - 15.3 - ns tPDL(HS) Unloaded. Measured from PWM_IN falling edge to PWM1 falling edge. Note 1 - 9.2 - ns tPDTS(en) Unloaded. Measured from the edge PWM_IN enters tri-state to PWM1 high impedance. Note 1 - 10.5 - ns tPDTS(dis) Unloaded. Measured from the edge PWM_IN exits tri-state to PWM1 high or low. Note 1 - 24.3 - ns Propagation Delay ― Enter Tri-State Propagation Delay ― Exit Tri-State Output Impedance ― Source RHS_SOURCE - 90 - Ω Output Impedance ― Sinking RHS_SINK - 57 - Ω PWM Output High Threshold VOH(PWM) 2.85 - - V PWM Output Low Threshold VOL(PWM) PWM Output (IR3599 only) Transition Time ― Rise Transition Time ― Fall Propagation Delay ― Turn-on Propagation Delay ― Turn-off - - 0.4 V tR(HS) CPCB=50pF. Measured from 10% to 90% PWM output. Note 1 - 8.4 - ns tF(HS) CPCB=50pF. Measured from 90% to 10% PWM output. Note 1 - 8.1 - ns tPDH(HS) Unloaded. Measured from PWM_IN rising edge to PWM1 rising edge. Note 1 - 10.8 - ns tPDL(HS) Unloaded. Measured from PWM_IN falling edge to PWM1 falling edge. Note 1 - 8.6 - ns tPDTS(en) Loaded with 5kΩ pull-up and 5kΩ pull-down resistors. Measured from the edge PWM_IN enters tri-state to PWM1 enters tri-state. Note 1 - 34.5 - ns tPDTS(dis) Loaded with 5kΩ pull-up and 5kΩ pull-down resistors. Measured from the edge PWM_IN exits tri-state to PWM1 high or low. Note 1 - 23.6 - ns RHS_SOURCE - 55 - Ω RHS_SINK - 45 - Ω Propagation Delay ― Enter Tri-State Propagation Delay ― Exit Tri-State Output Impedance Source Output Impedance ― Sinking Note 1: Guaranteed by design but not tested in production. 8 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 IR3599/IR3599A PWM Doubler/Quad Logic MODE AND TIMING DIAGRAMS VCC FUNCTION 400kHz PWM_IN 200kHz PWM1 PWM2 200kHz Doubler Mode PWM3 NC PWM4 NC 800kHz FUNCTION PWM_IN 200kHz PWM1 PWM2 200kHz Quad Mode PWM3 PWM4 200kHz 200kHz Figure 4: IR3599/IR3599A Phase Modes 9 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A 12V 2 Phase Controller PowIRstage PWM1 PWMØ1 Doubler Mode PWMØ2 Doubler Mode PWM2 PWM3 PowIRstage PowIRstage PWM4 PowIRstage PWM 1 PWM 2 PWM1 PWM2 PWM3 PWM4 Figure 5: IR3599A timing when configured in DOUBLER mode (IR ATL PWM signals at input) 10 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A 12V 2 Phase Controller PowIRstage PWM1 PWMØ1 Doubler Mode PWMØ2 Doubler Mode PWM2 PWM3 PowIRstage PowIRstage PWM4 PowIRstage PWM 1 PWM 2 PWM1 PWM2 PWM3 PWM4 Figure 6: IR3599 timing when configured in DOUBLER mode (Industry Standard Tri-state PWM signals at input) 11 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A 12V 2 Phase Controller PowIRstage PWMØ1 Quad Mode PWM1 PWM2 PWM3 PWM4 PowIRstage PowIRstage PowIRstage PowIRstage PWMØ2 Quad Mode PWM5 PWM6 PWM7 PWM8 PowIRstage PowIRstage PowIRstage PWM 1 PWM 2 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 PWM8 Figure 7: IR3599A timing when configured in Quad mode (IR ATL PWM signals at input) 12 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A 12V 2 Phase Controller PowIRstage PWMØ1 Quad Mode PWM1 PWM2 PWM3 PWM4 PowIRstage PowIRstage PowIRstage PowIRstage PWMØ2 Quad Mode PWM5 PWM6 PWM7 PWM8 PowIRstage PowIRstage PowIRstage PWM 1 PWM 2 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 PWM8 Figure 8: IR3599 timing when configured in Quad mode (Industry Standard Tri-state PWM signals at input) 13 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic GENERAL DESCRIPTION IR3599/IR3599A IR ACTIVE TRI-LEVEL (ATL) PWM INPUT/OUTPUT SIGNAL IR3599/IR3599A is a phase multiplier which is designed for high phase count applications to reduce the number of interface signals between controller and drivers. Each IR3599/IR3599A can be configured to drive up to four independent power stages from one PWM input. When it is configured in doubler mode, only two PWM output signals are controlled by the single PWM input. The doubler logic alternates the two PWM outputs at half of the PWM input frequency so that it can generate two out of phase PWM signals. The rest two PWM output are in tri-state. When it is configured in quad mode, all four PWM output are controlled by the single PWM input. The quad logic will alternate the four PWM outputs at 0º, 90º, 180º, and 270º respectively, and each at 1/4 of the PWM input frequency. The phase modes for doubler and quad are shown in Figure 4. IR3599A features the patented IR Active Tri-Level (ATL) PWM input and output, designed to work with IR digital multi-phase controller and IR PowIRstage. IR3599 features industry’s standard tri-state PWM input and output interfaces, designed to work with general multi-phase controllers, drivers or power stages. THEORY OF OPERATION POWER-ON RESET (POR) IR3599/IR3599A incorporates a power-on reset feature, which ensures the device is active only after the supply voltage is high enough to generate 1.8V. IR3599/IR3599A is powered from 3.3V DC supply. An internal LDO generates a 1.8V rail to power the PWM output in IR3599A. During initial startup, the 1.8V rail follows the rising 3.3V supply voltage, proportional to an internal resistor tree. All PWM outputs are disabled and in a high impedance state before the VCC supply voltage exceeds the POR rising threshold. During normal operation the IR3599/IR3599A continue to remain active until the VCC supply voltage falls below the POR falling threshold. 14 www.irf.com | © 2012 International Rectifier The IR3599A is driven by a patented active tri-level (ATL) PWM control signal provided by the IR digital PWM controllers and also delivers the ATL PWM signals to the following power stages. During normal operation, PWM input signal swings between 0V and 1.8V and the generated PWM output signals also swings between 0 and 1.8V. When PWM input signal crosses a voltage level higher than the Tri-level high threshold, it will enter tri-state operation. The IR3599A provides a 1.0mA typical pull-up current to drive the PWM input to the tri-state condition of 3.3V when the PWM controller output is in its high impedance state. The 1.0mA typical current is designed for driving worst case stray capacitances and transition the IR3599A into the tri-state condition rapidly to avoid a prolonged period of conduction in the following power stage during faults. This fast tri-state operation eliminates the need for any tri-state hold-off time of the PWM signal to dwell in the shutdown window. Immediately after the IR3599A is driven into the tri-state mode, the 1mA current is disabled so that power is conserved. Once the IR3599A enters tri-state operation, all of the PWM outputs will be transitioned to high impedance states in order to also transition the power stages into tri-state. This allows the system to operate in single phase mode when PS2 mode is the mode mode of operation. When the PWM input signal level falls below the tri-level low threshold, the IR3599A will switch back into normal operation. INDUSTRY STANDARD TRI-STATE PWM INPUT/OUTPUT SIGNAL The IR3599 accepts industry’s standard 3.3V and 5V tri-state PWM signals. It doubles or quadruples the single PWM input and then delivers multi-phase PWM signals to the drivers or power stages. During normal operation, the PWM input swings from ground to 3.3V or 5V and the generated PWM output signals will swing from ground to VCC. If the PWM input is released from the controller side or if the PWM level is within a range of 1.65V, the IR3599 will enter tri-state operation. The floating PWM input will be driven by the IR3599 to its tri-state window and all the PWM outputs will also transition to tri-state. July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A DOUBLER/QUAD MODE REACTION TO TRI‐STATE PWM INPUT In Doubler or quad mode, anytime there is a tri-state on the PWM_IN, all PWM outputs (PWMx) are tristated immediately with minimum delays. When the PWM_IN transitions from a tri-state to a high and then from a high to a low, only the 0 deg phase (PWM1) operates. This allows the VR to operate properly in PS2 mode and during load releases. Once the PWM_IN sees a transition from a low to a high, the doubler or quad function starts again, with output on the other PWM pins. The tri-state timing when configured in doubler mode or quad mode are shown in Figure 5 - Figure 8. FREQUENCY RANGE The IR3599/IR3599A is designed to operate over a wide input and output frequency range. When operating in Doubler mode, the input frequency at the PWM_IN input is 2x the output frequency. When operating in Quad mode, the input frequency at the PWM_IN input is 4x the output frequency. The IR3599/IR3599A is designed to operate with output frequencies between 200 kHz and 800 kHz. CONFIGURING THE PHASE MODES The IR3599/IR3599A can operate in 2 separate Phase modes which are Doubler and Quad. Table 1 shows the user how to configure the Modes utilizing the FUNCTION pin. The FUNCTION selection (pin 4) is latched into the IR3599/IR3599A at power up, and cannot be changed after power on reset. SUPPLY DECOUPLING CAPACITOR VCC decoupling to the IR3599/IR3599A is provided by a 0.1uF bypass capacitor CVcc located close to the supply input pin. A series resistor Rvcc, typically 10Ω, is added in series with the supply voltage to filter high frequency ringing and noise. A 0.47uF bypass capacitor located close to V1p8 output pin is recommended for the internal LDO decouple. 15 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A ENVIRONMENTAL QUALIFICATIONS Consumer Qualification Level Moisture Sensitivity Level Machine Model (JESD22-A115A) Human Body Model (JESD22-A114F) ESD Charged Device Model (JESD22-C101D) “package type” MSL1 Class B Maximum MM ESD Voltage ≥ 200V to ≤400V Class 1C Maximum HBM ESD Voltage ≥ 2000V to ≤ 4000V Class III Maximum CDM ESD Voltage ≥ 500V to ≤1000V RoHS Compliant Yes † Qualification standards can be found at International Rectifier web site: http://www.irf.com †† Exceptions to AEC-Q101 requirements are noted in the qualification report. 16 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A MARKING INFORMATION IR ? IR ? Site Code Site Code 3599A 3599 Date/Lot/Marking Code Date/Lot/Marking Code YWLC? YWLC? Figure 9: Package Marking PACKAGE INFORMATION DFN 2 x 2mm, 8-pin 17 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8 PWM Doubler/Quad Logic IR3599/IR3599A Data and specifications subject to change without notice. This product will be designed and qualified for the Consumer market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. www.irf.com 18 www.irf.com | © 2012 International Rectifier July 02, 2012 | V1.8