INTERSIL ISL43L220IRZ

ISL43L220
®
Data Sheet
April 12, 2005
Ultra Low ON-Resistance, Low Voltage,
Single Supply, Dual SPDT Analog Switch
The Intersil ISL43L220 device is a low ON-resistance, low
voltage, bidirectional, dual single-pole/double-throw (SPDT)
analog switch designed to operate from a single +1.1V to
+4.5V supply. Targeted applications include battery powered
equipment that benefit from low RON (0.22Ω) and fast
switching speeds (tON = 11ns, tOFF = 5ns). The digital logic
input is 1.8V logic-compatible when using a single +3V supply.
FN6093.2
Features
• Pb-Free Available as an Option (RoHS Compliant)
(See Ordering Info)
• ON Resistance (RON)
- V+ = +4.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.22Ω
- V+ = +3.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.26Ω
- V+ = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5Ω
• RON Matching Between Channels. . . . . . . . . . . . . . . . 0.03Ω
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This part may be used to “mux-in”
additional functionality while reducing ASIC design risk. The
ISL43L220 is offered in a small form factor package,
alleviating board space limitations.
• RON Flatness Across Signal Range . . . . . . . . . . . . . . 0.03Ω
The ISL43L220 is a committed dual single-pole/double-throw
(SPDT) that consist of two normally open (NO) and two
normally closed (NC) switches. This configuration can also be
used as a dual 2-to-1 multiplexer. The ISL43L220 is pin
compatible with the MAX4684 and MAX4685.
• Guaranteed Break-Before-Make
TABLE 1. FEATURES AT A GLANCE
ISL43L220
Number of Switches
2
SW
SPDT or 2-1 MUX
4.3V RON
0.22Ω
4.3V tON/tOFF
11ns/5ns
3V RON
0.26Ω
3V tON/tOFF
14ns/6ns
1.8V RON
0.5Ω
1.8V tON/tOFF
20ns/8ns
Packages
10Ld 3x3 thin DFN
• Single Supply Operation. . . . . . . . . . . . . . . . . +1.1V to +4.5V
• Low Power Consumption (PD). . . . . . . . . . . . . . . . . . <0.3µW
• Fast Switching Action (V+ = +4.3V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ns
• 1.8V Logic Compatible (+3V supply)
• Available in 10 lead 3x3 thin DFN
• ESD HBM Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >9kV
Applications
• Battery powered, handheld, and portable equipment
- Cellular/mobile phones
- Pagers
- Laptops, notebooks, palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and video switching
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL43L220
Pinout
Ordering Information
(Note 1)
ISL43L220 (TDFN)
TOP VIEW
PART NO.
(BRAND)
10 NO2
V+ 1
9 COM2
NO1 2
8 IN2
COM1 3
IN1 4
7 NC2
NC1 5
6 GND
NOTE:
1. Switches Shown for Logic “0” Input.
Truth Table
LOGIC
PIN NC
PIN NO
0
ON
OFF
1
OFF
ON
NOTE:
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL43L220IR
(220)
-40 to 85
10 Ld 3x3 thin DFN
L10.3x3A
ISL43L220IR-T
(L20)
-40 to 85
10 Ld 3x3 thin DFN
Tape and Reel
L10.3x3A
ISL43L220IRZ
(220) (See Note)
-40 to 85
10 Ld 3x3 thin DFN
(Pb-free)
L10.3x3A
ISL43L220IRZ-T
(L20) (See Note)
-40 to 85
10 Ld 3x3 thin DFN
L10.3x3A
Tape and Reel (Pb-free)
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both
SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Logic “0” ≤0.5V. Logic “1” ≥1.4V with a 3V supply.
Pin Descriptions
PIN
FUNCTION
V+
System Power Supply Input (+1.1V to +4.5V)
GND
Ground Connection
IN
Digital Control Input
COM
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
2
FN6093.2
April 12, 2005
ISL43L220
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 4.7V
Input Voltages
NO, NC, IN (Note 2) . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current NO, NC, or COM . . . . . . . . . . . . . . . . . ±300mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±500mA
ESD Rating:
HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>9kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>500V
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1kV
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
10 Ld 3x3 DFN Package . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range
ISL43L220IR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on NC, NO, IN, or COM exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 4.3V Supply
PARAMETER
Test Conditions: V+ = +3.9V to +4.5V, GND = 0V, VINH = 1.6V, VINL = 0.5V (Notes 4, 6),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
Full
0
-
V+
V
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 3.9V, ICOM = 100mA, VNO or VNC = 0V to V+
(See Figure 5)
ON Resistance, RON
RON Matching Between Channels,
∆RON
V+ = 3.9V, ICOM = 100mA, VNO or VNC = Voltage at
max RON (Note 9)
RON Flatness, RFLAT(ON)
V+ = 3.9V, ICOM = 100mA, VNO or VNC = 0V to V+
(Note 7)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 4.5V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V+ = 4.5V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V,
or Floating
25
-
0.23
0.35
Ω
Full
-
-
0.35
Ω
25
-
0.03
0.06
Ω
Full
-
-
0.06
Ω
25
-
0.03
0.08
Ω
Full
-
-
0.08
Ω
25
-45
-
45
nA
Full
-110
-
110
nA
25
-45
-
45
nA
Full
-100
-
100
nA
DYNAMIC CHARACTERISTICS
V+ = 3.9V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Turn-ON Time, tON
V+ = 3.9V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Turn-OFF Time, tOFF
25
-
12
17
ns
Full
-
-
22
ns
25
-
5
10
ns
Full
-
-
15
ns
Break-Before-Make Time Delay, tD
V+ = 4.5V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 3, Note 8)
Full
2
4
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2)
25
-
128
-
pC
OFF Isolation
RL = 50Ω, CL = 5pF, f = 100kHz, VCOM = 1VRMS
(See Figure 4)
25
-
68
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 100kHz, VCOM = 1VRMS,
(See Figure 6)
25
-
-95
-
dB
Total Harmonic Distortion
f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 600Ω
25
-
0.003
-
%
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
115
-
pF
COM ON Capacitance, CCOM(ON)
25
-
224
-
pF
3
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
FN6093.2
April 12, 2005
ISL43L220
Electrical Specifications - 4.3V Supply
Test Conditions: V+ = +3.9V to +4.5V, GND = 0V, VINH = 1.6V, VINL = 0.5V (Notes 4, 6),
Unless Otherwise Specified (Continued)
TEMP
(°C)
(NOTE 5)
MIN
TYP
Full
1.1
-
4.5
V
25
-
-
0.06
µA
Full
-
-
1
µA
Input Voltage Low, VINL
Full
-
-
0.5
V
Input Voltage High, VINH
Full
1.6
-
-
V
Full
-0.5
-
0.5
µA
PARAMETER
TEST CONDITIONS
(NOTE 5)
MAX
UNITS
POWER SUPPLY CHARACTERISTICS
Power Supply Range
V+ =1.1V to 4.5V, VIN = 0V or V+
Positive Supply Current, I+
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 4.5V, VIN = 0V or V+ (Note 8)
NOTES:
4. VIN = input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parts are 100% tested at +25°C. Limits across the full temperature range are guaranteed by design and correlation.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
8. Guaranteed but not tested.
9. RON matching between channels is calculated by subtracting the channel with the highest max Ron value from the channel with lowest max Ron
value, between NC1 and NC2 or between NO1 and NO2.
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 4, 6),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
Full
0
-
V+
V
25
-
0.29
0.4
Ω
Full
-
-
0.4
Ω
25
-
0.03
0.06
Ω
Full
-
-
0.06
Ω
25
-
0.03
0.1
Ω
Full
-
-
0.1
Ω
25
-
1.1
-
nA
Full
-
25
-
nA
25
-
1.7
-
nA
Full
-
48
-
nA
25
-
14
20
ns
Full
-
-
25
ns
25
-
6
12
ns
Full
-
-
17
ns
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0V to V+
(See Figure 5, Note 8)
RON Matching Between Channels,
∆RON
V+ = 2.7V, ICOM = 100mA, VNO or VNC= Voltage at max
RON (Notes 8, 9)
RON Flatness, RFLAT(ON)
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0V to V+
(Notes 7, 8)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.3V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V+ = 3.3V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V,
or Floating
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Turn-OFF Time, tOFF
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Break-Before-Make Time Delay, tD
V+ = 3.3V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 3, Note 8)
Full
2
7
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2)
25
-
95
-
pC
4
FN6093.2
April 12, 2005
ISL43L220
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 4, 6),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
OFF Isolation
RL = 50Ω, CL = 5pF, f = 100kHz, VCOM = 1VRMS
(See Figure 4)
25
-
68
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 100kHz, VCOM = 1VRMS
(See Figure 6)
25
-
-95
-
dB
Total Harmonic Distortion
f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 600Ω
25
-
0.003
-
%
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
115
-
pF
COM ON Capacitance, CCOM(ON)
25
-
224
-
pF
Full
1.1
-
4.5
V
25
-
0.014
-
µA
Full
-
0.52
-
µA
Input Voltage Low, VINL
Full
-
-
0.5
V
Input Voltage High, VINH
Full
1.4
-
-
V
Full
-0.5
-
0.5
µA
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current, I+
V+ =1.1V to 3.6V, VIN = 0V or V+
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 3.3V, VIN = 0V or V+ (Note 8)
Electrical Specifications - 1.8V Supply
PARAMETER
Test Conditions: V+ = +1.65V to +2V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Notes 4, 6),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
Full
0
-
V+
V
25
-
0.5
0.8
Ω
Full
-
-
0.8
Ω
25
-
1.1
-
nA
Full
-
25
-
nA
25
-
1.7
-
nA
Full
-
48
-
nA
25
-
22
28
ns
Full
-
-
33
ns
25
-
9
15
ns
Full
-
-
20
ns
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 1.65V, ICOM = 100mA, VNO or VNC = 0V to V+,
(See Figure 5, Note 8)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 2.0V, VCOM = 0.3V, 1.8V, VNO or VNC = 1.8V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V+ = 2.0V, VCOM = 0.3V, 1.8V, or VNO or VNC = 0.3V,
1.8V, or Floating
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
V+ = 1.65V, VNO or VNC = 1.0V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Turn-OFF Time, tOFF
V+ = 1.65V, VNO or VNC = 1.0V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Break-Before-Make Time Delay, tD
V+ = 2.0V, VNO or VNC = 1.0V, RL = 50Ω, CL = 35pF
(See Figure 3, Note 8)
Full
2
9
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2)
25
-
49
-
pC
OFF Isolation
RL = 50Ω, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See
Figure 4)
25
-
68
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See
Figure 6)
25
-
-95
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
115
-
pF
COM ON Capacitance, CCOM(ON)
25
-
224
-
pF
5
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
FN6093.2
April 12, 2005
ISL43L220
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.65V to +2V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Notes 4, 6),
Unless Otherwise Specified (Continued)
TEMP
(°C)
(NOTE 5)
MIN
TYP
Input Voltage Low, VINL
Full
-
-
0.4
V
Input Voltage High, VINH
Full
1.0
-
-
V
Full
-0.5
-
0.5
µA
PARAMETER
TEST CONDITIONS
(NOTE 5)
MAX
UNITS
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 2.0V, VIN = 0V or V+ (Note 8)
Electrical Specifications - 1.1V Supply
Test Conditions: V+ = +1.1V, GND = 0V, VINH = 1.0V, VINL = 0.3V (Note 4), Unless Otherwise Specified
TEMP
(°C)
(NOTE 5)
MIN
TYP
Full
0
-
V+
V
25
-
2.6
3
Ω
Full
-
3.4
4
Ω
25
-
30
-
ns
Full
-
35
-
ns
25
-
15
-
ns
Full
-
20
-
ns
Full
-
4
-
ns
Input Voltage Low, VINL
Full
-
0.3
-
V
Input Voltage High, VINH
Full
-
0.6
-
V
Full
-
0.5
-
µA
PARAMETER
TEST CONDITIONS
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 1.1V, ICOM = 100mA, VNO or VNC = 0V to V+,
(See Figure 5)
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
V+ = 1.1V, VNO or VNC = 1.0V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Turn-OFF Time, tOFF
V+ = 1.1V, VNO or VNC = 1.0V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Break-Before-Make Time Delay, tD
V+ = 1.1V, VNO or VNC = 1.0V, RL = 50Ω, CL = 35pF
(See Figure 3, Note 8)
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 1.1V, VIN = 0V or V+ (Note 8)
Test Circuits and Waveforms
V+
LOGIC
INPUT
50%
C
0V
tOFF
SWITCH
INPUT VNO
SWITCH
INPUT
VOUT
90%
SWITCH
OUTPUT
V+
tr < 20ns
tf < 20ns
VOUT
NO or NC
COM
IN
90%
0V
LOGIC
INPUT
GND
RL
50Ω
CL
35pF
tON
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
-----------------------------V OUT = V
(NO or NC) R + R
L
( ON )
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
6
FN6093.2
April 12, 2005
ISL43L220
Test Circuits and Waveforms (Continued)
V+
RG
SWITCH
OUTPUT
VOUT
C
VOUT
COM
NO or NC
∆VOUT
VG
GND
IN
CL
V+
ON
ON
LOGIC
INPUT
OFF
LOGIC
INPUT
0V
Q = ∆VOUT x CL
Repeat test for all switches.
FIGURE 2B. TEST CIRCUIT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
V+
V+
LOGIC
INPUT
C
NO
VNX
VOUT
COM
NC
0V
SWITCH
OUTPUT
VOUT
90%
0V
CL
35pF
RL
50Ω
IN
GND
LOGIC
INPUT
tD
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 3B. TEST CIRCUIT
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE TIME
V+
C
V+
C
SIGNAL
GENERATOR
RON = V1/100mA
NO or NC
NO or NC
IN
0V or V+
VNX
100mA
IN
V1
0V or V+
COM
ANALYZER
GND
COM
RL
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 4. OFF ISOLATION TEST CIRCUIT
7
Repeat test for all switches.
FIGURE 5. RON TEST CIRCUIT
FN6093.2
April 12, 2005
ISL43L220
Test Circuits and Waveforms (Continued)
V+
C
V+
C
SIGNAL
GENERATOR
NO or NC
COM
50Ω
NO or NC
IN1
IN
0V or V+
0V or V+
IMPEDANCE
ANALYZER
NC or NO
COM
ANALYZER
GND
COM
N.C.
GND
RL
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 6. CROSSTALK TEST CIRCUIT
Detailed Description
The ISL43L220 is a bidirectional, dual single pole/double
throw (SPDT) analog switch that offers precise switching
capability from a single 1.1V to 4.5V supply with low onresistance (0.22Ω) and high speed operation (tON = 11ns,
tOFF = 5ns). The device is especially well suited for portable
battery powered equipment due to its low operating supply
voltage (1.1V), low power consumption (4.5µW max), low
leakage currents (110nA max), and the tiny DFN package.
The ultra low on-resistance and Ron flatness provide very low
insertion loss and distortion to applications that require signal
reproduction.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
8
Repeat test for all switches.
FIGURE 7. CAPACITANCE TEST CIRCUIT
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch signal range is
reduced and the resistance may increase, especially at low
supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
VNO or NC
VCOM
GND
OPTIONAL PROTECTION
DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL43L220 construction is typical of most single supply
CMOS analog switches, in that they have two supply pins:
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL43L220 4.7V
maximum supply voltage provides plenty of room for the
10% tolerance of 4.3V supplies, as well as room for
overshoot and noise spikes.
The minimum recommended supply voltage is 1.1V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer
FN6093.2
April 12, 2005
ISL43L220
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 20 details the high Off Isolation and Crosstalk
rejection provided by this part. At 100kHz, Off Isolation is
about 68dB in 50Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
Logic-Level Thresholds
Leakage Considerations
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2.0V to 3.6V (see Figure 16). At 3.6V
the VIH level is about 1.27V. This is still below the 1.8V
CMOS guaranteed high output minimum level of 1.4V, but
noise margin is reduced.
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
to the electrical specification tables and Typical Performance
curves for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, the signal response is reasonably flat even
past 30MHz with a -3dB bandwidth of 120MHz (see
Figure 19). The frequency response is very consistent over a
wide V+ range, and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analogsignal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
Typical Performance Curves TA = 25°C, Unless Otherwise Specified
0.27
3
ICOM = 100mA
0.26
ICOM = 100mA
2.5
0.25
2
V+ = 2.7V
0.23
RON (Ω)
RON (Ω)
0.24
V+ = 3V
0.22
V+ = 1.1V
1.5
1
0.21
V+ = 1.5V
0.2
V+ = 3.6V
0.5
V+ = 4.3V
0.19
V+ = 1.62V
0
0.18
0
1
2
VCOM (V)
3
4
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
9
5
0
0.5
V+ = 1.8V
1
1.5
2
VCOM (V)
FIGURE 10. ON RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FN6093.2
April 12, 2005
ISL43L220
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
0.32
0.28
V+ = 4.3V
ICOM = 100mA
0.26
0.3
85°C
0.28
0.24
85°C
0.22
RON (Ω)
RON (Ω)
V+ = 2.7V
ICOM = 100mA
0.2
0.26
25°C
0.24
25°C
0.22
0.18
0.16
0.14
0
1
-40°C
0.2
-40°C
2
3
4
0.18
5
0
0.5
1
VCOM (V)
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
0.5
2.5
3.5
3
V+ = 1.1V
ICOM = 100mA
3
-40°C
85°C
2.5
RON (Ω)
0.4
RON (Ω)
2
FIGURE 12. ON RESISTANCE vs SWITCH VOLTAGE
V+ = 1.8V
ICOM = 100mA
0.45
1.5
VCOM (V)
0.35
25°C
2
85°C
1.5
0.3
1
25°C
-40°C
0.25
0.5
0
0.2
0
0.5
1
1.5
2
0
0.2
0.4
VCOM (V)
0.6
0.8
1
1.2
VCOM (V)
FIGURE 13. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 14. ON RESISTANCE vs SWITCH VOLTAGE
1.5
150
1.4
1.3
100
VINH AND VINL (V)
1.2
Q (pC)
50
V+ = 4.3V
V+ = 1.8V
0
V+ = 3V
1.1
1
VINH
0.9
0.8
VINL
0.7
0.6
-50
0.5
0.4
-100
0
1
2
3
4
VCOM (V)
FIGURE 15. CHARGE INJECTION vs SWITCH VOLTAGE
10
5
0.3
1
1.5
2
2.5
3
3.5
4
4.5
V+ (V)
FIGURE 16. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
FN6093.2
April 12, 2005
ISL43L220
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
14
60
13
12
50
11
10
tOFF (ns)
30
85°C
25°C
5
4
1
1.5
2
2.5
3
V+ (V)
3.5
4
3
4.5
1.5
1
2
2.5
3
3.5
4
4.5
V+ (V)
FIGURE 17. TURN - ON TIME vs SUPPLY VOLTAGE
FIGURE 18. TURN - OFF TIME vs SUPPLY VOLTAGE
-10
V+ = 3V
10
V+ = 3V
GAIN
0
PHASE
20
40
60
80
RL = 50Ω
VIN = 0.2VP-P to 2VP-P
1
100
10
100
CROSSTALK (dB)
-20
PHASE (DEGREES)
NORMALIZED GAIN (dB)
-40°C
6
-40°C
0
85°C
8
7
25°C
20
10
9
-20
20
-30
30
-40
40
-50
50
-60
60
ISOLATION
-70
70
-80
80
CROSSTALK
-90
90
-100
100
-110
1k
600
OFF ISOLATION (dB)
tON (ns)
40
10k
100k
FREQUENCY (MHz)
1M
10M
110
100M 500M
FREQUENCY (Hz)
FIGURE 19. FREQUENCY RESPONSE
FIGURE 20. CROSSTALK AND OFF ISOLATION
100
50
V+ = 4.5V
V+ = 4.5V
VCOM = 0.3V
50
0
0
iOFF (nA)
iON (nA)
25°C
25°C
-50
-50
85°C
-100
85°C
-100
-150
0
1
2
3
VCOM/NX (V)
4
FIGURE 21. ON LEAKAGE vs SWITCH VOLTAGE
11
5
0
1
2
3
4
5
VNX (V)
FIGURE 22. OFF LEAKAGE vs SWITCH VOLTAGE
FN6093.2
April 12, 2005
ISL43L220
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
114
PROCESS:
Submicron CMOS
12
FN6093.2
April 12, 2005
ISL43L220
Thin Dual Flat No-Lead Plastic Package (TDFN)
L10.3x3A
2X
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
0.15 C A
A
D
MILLIMETERS
2X
0.15 C B
E
SYMBOL
MIN
A
0.70
A1
-
A3
6
INDEX
AREA
b
TOP VIEW
B
0.20
A
C
SEATING
PLANE
D2
6
INDEX
AREA
0.08 C
A3
SIDE VIEW
(DATUM B)
0.10 C
7
8
D2/2
1
0.80
-
-
0.05
-
0.25
0.30
5,8
2.30
2.40
7,8
-
3.00 BSC
1.40
e
1.50
1.60
7,8
0.50 BSC
-
k
0.25
-
-
-
L
0.20
0.30
0.40
8
L1
-
-
0.15
1
N
10
2
Nd
5
3
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
NX k
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
E2
E2/2
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
NX L
N
N-1
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
NX b
e
(Nd-1)Xe
REF.
BOTTOM VIEW
5
0.10 M C A B
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
CL
NX (b)
0.75
Rev. 1 6/04
2
(DATUM A)
8
E2
NOTES
3.00 BSC
2.20
E
//
MAX
0.20 REF
D
D2
NOMINAL
(A1)
L1
5
9 L
10. COMPLIANT TO JEDEC MO-229-WEED-3 except for
dimensions E2 & D2.
e
SECTION "C-C"
C C
9. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
TERMINAL TIP
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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13
FN6093.2
April 12, 2005