INTERSIL ISL78100

ISL78100
®
Data Sheet
December 17, 2007
FN6626.0
High Power LED Driver
Features
The ISL78100 is a high-power LED backlight driver with an
integrated 36V FET designed to drive up to 8 high-power
LEDs in series. The PWM converter runs from an internally
generated 1MHz clock. With efficiencies over 90%, the
regulator provides tight control of LED current and may be
configured in either boost or buck topologies, allowing from
3 to 8 series diodes to be driven from wide input voltages.
• Drives 3 to 8 high-power LEDs in series, up to 32V
LED light level may be controlled either by:
• Light output temperature compensation
• 2.7V to 16V input voltage range
• Boost or Buck configurable switch
• 3A integrated FET
• Automotive load dump protection
• LED over-temperature protection
1. LED DC bias current set via the LEVEL pin, or
• LED disconnect
2. External low frequency PWM control via the
ENABLE/PWM pin.
• PWM/analog light level control
• TS-16949 and AEC-Q100 Compliant
• Pb-free (RoHS compliant)
Applications
• Automotive display backlighting
• Automotive LED lighting
Pinout
ISL78100ARZ
781 00ARZ
20 Ld 4x4 QFN
L20.4x4C
VDC 1
ISL78100ARZ-TK*
781 00ARZ
20 Ld 4x4 QFN
Tape and Reel
L20.4x4C
VHI 2
ISL78100ARZ-T*
781 00ARZ
20 Ld 4x4 QFN
Tape and Reel
L20.4x4C
15 ENL
14 MODE
THERMAL
PAD
OVP 3
1
13 EN/PWM
12 SWS1
SWD2 5
11 SWS2
TMAX 10
SWD1 4
BUCK/BOOSTN 6
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
16 VBAT
PKG.
DWG. #
17 NC
PACKAGE
(Pb-free)
FB 9
PART
MARKING
TEMP 8
PART
NUMBER
(Note)
20 VIN
Ordering Information
18 GND
ISL78100
(20 LD 4X4 QFN)
TOP VIEW
19 FAULT
The ISL78100 is packaged in a 20 Ld 4mmx4mm QFN
package and is specified for operation over the -40°C to
+105°C temperature range.
• Small, 20 Ld 4mmx4mm QFN package
LEVEL 7
In both control modes, optional over-temperature thermal
protection of the LED reduces the LED DC bias current
above an adjustable set temperature, protecting the LED
from thermal damage. An optional fault monitor drives an
external FET between the input supply and inductor,
providing short circuit current protection for the LED and
inductor as well as load dump protection for automotive
applications. For low cost applications the pass transistor
may be omitted and the fault pin bypassed.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL78100
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Maximum pin voltage, all pins except below 6.5V
VIN, SWS1, SWS2, EN/PWM . . . . . . . . . . . . . . . . . . . . . . . . . . .18V
VBAT, FAULT, FB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24V
|VHI - SWS1, SWS2| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V
SWD1, SWD2, OVP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34V
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A
Thermal Resistance
θJA (°C/W) / θJC (°C/W)
20 Ld QFN Package (Notes 1, 2). . . . .
39
2.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
VBAT = VIN = 12V, VDC = 5V, TA = -40°C to +105°C unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
VIN
Input Supply Voltage
IOUT = 350mA, 8 LEDs, BUCK/BOOSTN = GND
5
16
V
VIN
Input Supply Voltage
IOUT = 350mA, 5 LEDs, BUCK/BOOSTN = GND,
TMAX disabled
2.7
12
V
VBAT
Input Supply Monitor
Normal operating range
2.7
16
V
Supply Fault Threshold
If VBAT > VBATFAULT, FAULT pin is switched to
ground
17.6
21
24
V
ISEN
Supply Current in VIN
No switching, EN/PWM = 1
2.7
3.5
mA
ISDIS
Supply Current in VIN
No switching, EN/PWM = 0
0.6
2.5
µA
RSWITCH
Power FET On-Resistance
ISWITCH = 600mA
0.15
0.25
Ω
VDC
Regulated Auxiliary Supply
5
5.25
V
VBATFAULT
4.75
ROUTOL
Auxiliary Supply Open Loop Output
Resistance
VIN < VDC
40
Ω
ROUTCL
Auxiliary Supply Closed Loop Output
Resistance
VIN > 6V, F < 100Hz
6.5
Ω
Output Drive Current
4 LED output string. VIN = VBAT = 10V
ILIMBOOST
Power Switch Current Limit
ILIMBUCK
IOUT
1
A
BUCK/BOOSTN = GND
3.6
A
Power Switch Current Limit
BUCK/BOOSTN = VDC
2.4
A
OVPH
Overvoltage Positive Going Voltage
Mode Threshold
Upper threshold to enter overvoltage fault mode,
TA = +25°C
32
V
OVPL
Overvoltage Negative Going Voltage
Mode Threshold
Lower threshold to exit overvoltage fault mode,
TA = +25°C
VGATE
Protection FET VGS (Gate Clamp)
VIN - VFAULT
VGATE
Protection FET VGS (Gate Clamp)
VFB
VLEVEL
FBUV FAULT
31
20
23
V
9.76
12.2
14.64
V
VFAULT - VIN
8.16
10.2
12.24
V
Feedback Voltage
System in regulation, VLEVEL = 1V,
VIN = 12V, 6 LEDs
0.18
0.2
0.22
V
Light Control Voltage Linear Input
Range
Mode = 1, analog control of LED current
0.25
3
V
Feedback Undervoltage Fault
VLEVEL = 1V, EN/PWM = 3V
100
200
mV
2
160
FN6626.0
December 17, 2007
ISL78100
Electrical Specifications
PARAMETER
FBOV FAULT
fSW
VBAT = VIN = 12V, VDC = 5V, TA = -40°C to +105°C unless otherwise specified. (Continued)
DESCRIPTION
CONDITIONS
Feedback Overvoltage Fault
VLEVEL = 1V, EN/PWM = 3V
Switching Frequency
MIN
TYP
MAX
UNIT
220
250
300
mV
800
1000
1150
kHz
fDIMMING
Maximum Recommended PWM
Dimming Frequency
Mode = 1, modulation signal applied to EN/PWM
10
kHz
tSWITCH
Load Switch Transition Time
CGATE = 2nF
100
ns
RLSDRIVERL
Load Switch Driver Impedance Low
EN/PWM = 0
30
50
Ω
RLSDRIVERH
Load Switch Driver Impedance High
EN/PWM = 3V
30
52
Ω
40
50
60
ms
0.85
1
1.24
ms
tFAULT
Fault Timer Period
tDELAY
Start-up Delay
Timed LX switching delay
VFAULTPUMP
Fault Pin Charge Pump
VBAT = VIN = 3V
VBOOST
Boost Mode Threshold
BUCK/BOOSTN = GND
VBUCK
Buck Mode Threshold
BUCK/BOOSTN = VDC
VMODEL
Mode Low Threshold
MODE = GND
VMODEH
Mode High Threshold
MODE = VDC
enFAULT
Input Level Applied to TMAX Pin to
Enable Fault Protection
disFAULT
Input Level Applied to TMAX Pin to
Disable Fault Protection
0.96VDC
V
enTEMP
Input Level Applied to TEMP Pin to
Enable Temperature Compensation
0.5
V
disTEMP
Input Level Applied to TEMP Pin to
Disable Temperature Compensation
TCOMPP
VFB Positive Temperature
Compensation; VFB/VFBnom
VTEMP/VDC = 0.80
1.26
TCOMPN
VFB Negative Temperature
Compensation; VFB/VFBnom
VTEMP/VDC = 0.20
0.74
6
V
0.4VDC
0.94VDC
V
V
1/3VDC
2/3VDC
V
V
0.9VDC
0.08
V
V
TTRIP
Internal Temperature Protection
Threshold
135
°C
THYS
Internal Temperature Protection
Hysteresis
25
°C
VEN/PWML
EN/PWM Pin Input Low Threshold
VEN/PWMH
EN/PWM Pin Input High Threshold
VDCUVLO
VDC Undervoltage Lockout
RSchottky
Internal Schottky Diode for Buck
1.2
2.5
V
V
15
2.6
V
23
Ω
.
TABLE 1. LIGHT OUTPUT CONTROL, VDC = 5.0V
MODE
1
TEMP
OPERATING MODE
(VDC - 0.25) > V > 0.25V Standard Mode light level to PWM modulation of EN/PWM input; LED bias current determined by
LEVEL voltage, nominal 1V
Don’t Care
V < 0.25V
0
V < (VDC - 0.25)
3
Disable temperature compensation
Fixed Bias Mode VFB level internally set to 0.4V, independent of VLEVEL
FN6626.0
December 17, 2007
ISL78100
Typical Performance Curves
100
100
8 LEDs
95 ILEDpeak = 380mA
85
10%@10kHz
80
50%@100Hz
10%@1kHz
50%@10kHz
70
85
80
99% @ 100Hz
70
10%@100Hz
65
6
8
10
12
VIN (V)
14
16
60
18
4
8
10
12
14
16
100
3 LEDs
95 ILEDpeak = 380mA
95
85
80
75
10%@10kHz
70
65
8
6
85
5 LEDs
80
75
ILEDpeak = 380mA
70
PWM = 10kHz
8 LEDs, VIN = 12V
5 LEDs, VIN = 9V
65
10%@100Hz
4
8 LEDs
90
99%@10kHz
99%@100Hz
EFFICIENCY (%)
90
60
0
10
VIN (V)
FIGURE 3. 3 LEDs EFFICIENCY vs INPUT VOLTAGE vs
DIMMING FREQUENCY AND DUTY CYCLE
5 LEDs @ 100Hz
8 LEDs, VIN = 12V
5 LEDs, VIN = 9V
300
3 LEDs, VIN = 5V
8 LEDs
ILEDpeak = 380mA
3
2
3 LEDs @ 100Hz
1
8 LEDs @ 1kHz
DILED (%)
250
8 LEDs @ 10kHz
150
10% @ 100Hz
0
-1
-2
10% @ 10kHz
-3
100
-4
50
20
40
60
80
PWM DIMMING DUTY CYCLE (%)
FIGURE 5. LEDs PWM DIMMING LINEARITY
4
99% @ 10kHz
-5
5 LEDs @ 10kHz
0
0
100
4
ILEDpeak = 380mA
350
200
20
40
60
80
PWM DIMMING DUTY CYCLE (%)
FIGURE 4. 8 AND 5 LEDs EFFICIENCY vs PWM DUTY CYCLE
400
ILED (mA)
6
FIGURE 2. 5 LEDs EFFICIENCY vs INPUT VOLTAGE vs
DIMMING FREQUENCY AND DUTY CYCLE
100
EFFICIENCY (%)
10% @ 100Hz
VIN (V)
FIGURE 1. 8 LEDs EFFICIENCY vs INPUT VOLTAGE vs
DIMMING FREQUENCY AND DUTY CYCLE
60
10% @ 10kHz
75
65
60
99% @ 10kHz
90
50%@1kHz
75 99%@1kHz
5 LEDs
ILEDpeak = 380mA
95
99%@10kHz
EFFICIENCY (%)
EFFICIENCY (%)
90
99%@100Hz
100
-6
99% @ 100Hz
6
8
10
12
VIN (V)
14
16
18
FIGURE 6. 8 LEDs CURRENT ACCURACY vs INPUT VOLTAGE
FN6626.0
December 17, 2007
ISL78100
Typical Performance Curves (Continued)
16
10
5 LEDs
ILEDpeak = 380mA
8
12
6
10
10% @ 100Hz
2
0
DILED (%)
DILED (%)
4
99% @ 10kHz
-2
10% @ 10kHz
-4
4
6
8
10
VIN (V)
12
14
-4
16
99% @ 100Hz
8 LEDs
395 I
LEDpeak = 380mA
390 DUTY CYCLE = 99%
ILED (mA)
385
380
PWM @ 1kHz
375
370
365
PWM @ 10kHz
360
PWM @ 100Hz
355
350
6
8
10
12
VIN (V)
14
16
18
FIGURE 9. 8 LEDs LINE REGULATION OF PWM DUTY
CYCLE OF 99%
4
5
6
7
VIN (V)
8
9
10
FIGURE 8. 3 LEDs CURRENT ACCURACY vs INPUT VOLTAGE
400
ILED (mA)
99% @ 10kHz
4
-2
FIGURE 7. 5 LEDs CURRENT ACCURACY vs INPUT VOLTAGE
420
415
410
405
400
395
390
385
380
375
370
365
360
355
350
5 LEDs
ILEDpeak = 380mA
DUTY CYCLE = 99%
99% @ 10kHz
99% @ 100Hz
4
6
8
10
VIN (V)
12
14
16
FIGURE 10. 5 LEDs LINE REGULATION OF PWM DUTY
CYCLE OF 99%
410
40
8 LEDs
39 I
LEDpeak = 380mA
38 DUTY CYCLE = 10%
3 LEDs
ILEDpeak = 380mA
DUTY CYCLE = 99%
405
400
395
PWM @ 100Hz
37
ILED (mA)
ILED (mA)
6
0
99% @ 100Hz
-8
390
385 PWM @ 100Hz
380
375
36
35
PWM @ 1kHz
PWM @ 10kHz
34
33
370
32
PWM @ 10kHz
365
360
8
2
-6
-10
3 LEDs
ILEDpeak = 380mA
14
4
5
6
7
VIN (V)
31
8
9
FIGURE 11. 3 LEDs LINE REGULATION OF PWM DUTY
CYCLE OF 99%
5
10
30
6
8
10
12
VIN (V)
14
16
18
FIGURE 12. 8 LEDs LINE REGULATION OF PWM DUTY
CYCLE OF 10%
FN6626.0
December 17, 2007
ISL78100
41
42
5 LEDs
40 ILEDpeak = 380mA
DUTY CYCLE = 10%
39
10% @ 100Hz
3 LEDs
41 I
LEDpeak = 380mA
40 DUTY CYCLE = 10%
38
37
10% @ 10kHz
36
38
37
36
35
PWM @ 10kHz
34
35
34
33
32
6
8
10
12
VIN (V)
14
16
18
4
400
0.1000
RSET = 0.5Ω
350 DUTY CYCLE = 100%
300
7
VIN (V)
8
9
10
EN/PWM = 0
VLEVEL = 1V
TA = +25°C
IQ (mA)
8 LED
200
6
0.0100
5 LED
250
5
FIGURE 14. 3 LEDs LINE REGULATION OF PWM DUTY
CYCLE OF 10%
FIGURE 13. 5 LEDs LINE REGULATION OF PWM DUTY
CYCLE OF 10%
ILED (mA)
PWM @ 100Hz
39
ILED (mA)
ILED (mA)
Typical Performance Curves (Continued)
150
0.0010
100
50
3 LED
0
0
0.2
0.4
0.6
VLEVEL (V)
0.8
1.0
FIGURE 15. LED CURRENT vs VLEVEL BIAS
8
10
12
VIN (V)
14
16
VIN
8 LEDs
ILED = 350mA
LX
LX
IL
IL
FB
FIGURE 17. START-UP WAVEFORMS
6
18
FIGURE 16. QUIESCENT CURRENT (NON-SWITCHING)
VIN
8 LEDs
ILED = 350mA
0.0001
6
FB
FIGURE 18. START-UP WAVEFORMS ZOOM-IN
FN6626.0
December 17, 2007
ISL78100
Typical Performance Curves (Continued)
LX
LX
8 LEDs
VIN = 16V
PWM = 100Hz
8 LEDs
VIN = 16V
PWM = 10kHz
IL
IL
VOUT
(AC
COUPLED)
VOUT
(AC
COUPLED)
FB
FB
FIGURE 20. 50% PWM DIMMING AT 10kHz
FIGURE 19. 50% PWM DIMMING AT 100Hz
LX
LX
IL
IL
VOUT
(AC
COUPLED)
VOUT
(AC
COUPLED)
8 LEDs
VIN = 12V
PWM = 1kHz
FB
FIGURE 21. 10% PWM DIMMING AT 1kHz
8 LEDs VIN = 16V
DUTY CYCLE = 50%
PWM = 1kHz
FIGURE 22. 50% PWM DIMMING AT 1kHz ZOOM-IN
LX
LX
TRANSIENT RESPONSE WHEN LOAD DYNAMICALLY
CHANGES FROM 7LEDs TO 8LEDs
VIN = 12V
8 LEDs VO
ILED = 350mA
TRANSIENT RESPONSE WHEN LOAD DYNAMICALLY
CHANGES FROM 8 LEDs TO 7 LEDs
VIN = 12V
8 LEDs VO
ILED = 350mA
VOUT
(WITH 25.6V
OFFSET)
7 LEDs VO
FIGURE 23. TRANSIENT RESPONSE OPERATES FROM
8 TO 7 LEDs
7
FB
VOUT
(WITH 25.6V
OFFSET)
7 LEDs VO
FIGURE 24. TRANSIENT RESPONSE OPERATES FROM
7 TO 8 LEDs
FN6626.0
December 17, 2007
ISL78100
Typical Performance Curves (Continued)
VIN
FB = 0V
VOUT
IL
VOUT
ILED
8LEDs
VIN = 3.3V
ILED = 380mA
FIGURE 25. OVP AND RESET
FIGURE 26. CURRENT LIMIT
Typical Boost Mode Application Diagram
VBAT
VIN
VDC
0.1µF
VHI
FAULT
SWD1
VBAT
SWD2
VDC
TEMP
SENSOR
OVP
BUCK/BOOSTN
PWM
TEMP
SWS1
TMAX
SWS2
EN/PWM
ENL
MODE
FB
LEVEL
GND
1V
FIGURE 27. TYPICAL BOOST MODE APPLICATION CIRCUIT
8
FN6626.0
December 17, 2007
ISL78100
Pin Descriptions
PIN
NAME
1
VDC
Internally regulated 5V supply, tracks VIN for input voltages less than 5V. LDO output can also be biased with
external supply if VIN is <5.5V. A minimum of 3.3µF decoupling capacitor is needed in this pin.
2
VHI
Power FET gate drive supply. Can be biased with external supply if VIN is <5.5V
3
OVP
Overvoltage monitor input; tie to VOUT for normal operation
4
SWD1
NMOS power FET drain
5
SWD2
NMOS power FET drain
6
DESCRIPTION
BUCK/BOOSTN Tie to GND for BOOST operation and to VDC for Buck operation
7
LEVEL
Sets LED bias current level; VFB(nominal) = VLEVEL/5
8
TEMP
Temperature reference, tie to GND to disable temperature compensation
9
FB
10
TMAX
Maximum LED temperature set point; if TEMP voltage exceeds TMAX, FB set point will be reduced
11
SWS2
NMOS power FET source
12
SWS1
NMOS power FET source
13
EN/PWM
14
MODE
15
ENL
LED load isolation MOS gate driver
16
VBAT
Input supply monitor
17
NC
18
GND
19
FAULT
20
VIN
LED current feedback
Chip enable and light modulation PWM dimming input
Digital Input; tie to GND to set FB reference to 400mV, tie to VDC to control FB reference with LEVEL input
Leave floating (internally connected)
Ground return and FB ground reference
Gate drive of fault protection FET. Driven low under fault conditions
Input supply
9
FN6626.0
December 17, 2007
Functional Block Diagram
2.7V TO 16V
L
VBAT
FAULT
VIN
VDC
VHI
10
GND
CLOCK AND RAMP
GENERATOR
START-UP
CHARGE PUMP
VSTART
FAULT CONTROL
AND TIMER
HALT
LDO AND REF
REF
VSTART
CLK
RAMP
OVP
SWD2
VDC
POR
LEVEL (T)
INNER LOOP
PWM CONTROL
AND CURRENT
LIMIT
EN O/P
LEVEL
SWS1
FET
CURRENT
SENSE
SWS2
LIGHT CONTROL
VDC
EN O/P
ENL
MODE
EN/PWM
MODE CONTROL
BUCK/
BOOSTN
TEMPERATURE
COMPENSATION
LOAD
CURRENT
SENSE
FB
ISL78100
HALT
TEMP
TMAX
FN6626.0
December 17, 2007
FIGURE 28. ISL78100 BLOCK DIAGRAM
ISL78100
REF
SWD1
CLK
RAMP
HALT
ISL78100
Theory of Operation
VIN
General Description
FB
LEVEL
SHIFT
GND
0.5
VOLTAGE
FEEDBACK
RSENSE
The ISL78100 is a flexible, highly integrated high-power LED
driver consisting of a PWM switching controller and
integrated 36V NDMOS power FET. The device can drive up
to 8 series high-power LED's at currents up to 1A at 16V
input or 5 LEDs at current up to 350mA at 2.7V input. The
control loop can be configured as either a boost or buck
regulator with the configuration of the BUCK/BOOSTN pin,
providing an output voltage above or below the input supply
voltage, depending on the number of stacked LEDs. The
controller operates from 2.7V to 16V depending on the
numbers of LEDs and current required and can be powered
by a single lithium ion battery, 5V or 12V regulated supplies
or automotive electrical systems. LED current is sensed
through a low value resistor in series with the LED. A
thermistor can be used to implement a thermal protection
scheme to limit the maximum LED temperature to a preset
desirable level.
+
ISL78100
VDC/2
FIGURE 29. FB REFERENCE AUTO SWITCH
Start-up
To maximize external PWM switching speed, the ISL78100
does not include an internal soft-start circuit. When VDC
exceeds the power-on reset threshold, switching is delayed
for 1ms (tDELAY) allowing the output capacitor to charge
through the inductor. If soft-start control is required, a
suitable application circuit is shown in Figure 30.
VBAT
Switching Regulator
The ISL78100 employs a current mode PWM control
scheme with a nominal switching frequency of 1MHz. This
provides fast transient response and enables the use of low
profile inductors and compact multilayer ceramic capacitors.
Settling time is optimized by the use of a simple control loop
without an error amplifier, relying instead on intrinsic gain
within the direct summing path. Due to the lower loop gain,
offset must be accounted for when setting up initial LED bias
current. Refer to the “Application Configurations” on page 11
of the datasheet for further information. Figure 28 shows a
block diagram of the system.
Application Configurations
VBAT FAULT
10µH
L1
VOUT
ISL78100 VIN
COUT
C1
4.7nF
SWD1
SWD2
20µF
R1
FB
SWS1 SWS2
R2
2k
100
0.5
RSENSE
FIGURE 30. EXTERNAL SOFT-START CIRCUIT
Light Level Control
Two light control schemes are provided:
Operating Modes
The ISL78100 can operate as either a buck or boost
regulator. Hardwire BUCK/BOOSTN to GND for boost mode
or to VDC for buck mode. In buck mode the power NDMOS
drive circuit is "floated" (boot-strapped) allowing the NDMOS
gate to be driven above VIN to fully enhance the power
NDMOS. An internal Schottky diode between VDC (5V) and
VHI reduces external component count. Use a ceramic
capacitor of at least 50nF between VHI and SWS1/2 to
bootstrap VHI.
LED Load Connection
ISL78100 includes an auto-sensing FB level shift circuit that
enables the LED load to be connected to either GND or VIN.
An internal sense circuit monitors the FB pin voltage. When
the level exceeds VDC/2, the feedback reference voltage is
switched from GND to VIN. Refer to the application section
of the datasheet for typical application schematics.
11
1. An external PWM signal via the EN/PWM pin, providing
low frequency PWM dimming.
2. Bias current level adjustment via the LEVEL input or fixed
internal bias.
PWM Dimming
LED color temperature varies with bias current. In
backlighting applications, PWM dimming offers better control
of color temperature because current through the LEDs is
kept constant. A 5V gate driver (ENL) synchronized to
EN/PWM can be used to control an external N-Channel FET
and disconnect the LED stack during the PWM off-period.
The switch prevents discharge of the output capacitor by the
LED load, maintaining a constant bias independent of PWM
duty cycle. Operation at 1kHz PWM rate is shown in
Figure 31 and Figure 32. The load disconnect switch
improves PWM dynamic range, linearity and color
temperature control. To further improve the linearity of PWM
dimming, an internal timer delays system shutdown via
EN/PWM for 50ms.
FN6626.0
December 17, 2007
ISL78100
The value of VFB should be limited to between 50mV and
450mV for linear operation. For minimum light output, VFB
may be set below 50mV. With MODE tied to GND, voltage
across the feedback resistor is set at ~400mV via an internal
reference. In either operating mode, if LED temperature
control is enabled, the value of VFB will be reduced when
maximum LED temperature is exceeded.
.
Input Overvoltage
FIGURE 31. OPERATION WITH ENL CONTROLLED FET
For automotive applications, an external high voltage NFET
driven by the FAULT pin disconnects the device from the
input supply in response to voltage spikes on the input
supply. During start-up, an internal charge pump drives the
FAULT pin above the input voltage, ensuring the NFET is
fully enhanced and powering up the device. In normal
operation, the switching node of the boost regulator or the
floating supply of the buck regulator is used to pump FAULT
above VIN. On detection of an overvoltage, the FAULT pin is
discharged to GND. The gate to source voltage of the
NDMOS is internally limited to ±15V to prevent voltage
stress.
Fault Protection
The external NFET is also used as a fault protection switch,
disconnecting the input supply if a fault occurs for more than
50ms. The system monitors feedback voltage regulation,
output overvoltage and input overvoltage. For applications
not requiring input voltage or fault protection, connect VBAT
and VIN directly together. All faults except input supply
overvoltage latch the ISL78100 into an off-state that can be
cleared by either power cycling the input supply or the
EN/PWM pin. Connecting the TMAX pin to VDC disables the
fault latch function (LED over-temperature control is also
disabled).
FIGURE 32. OPERATION WITH NO ENL CONTROLLED FET
Bias Current Dimming
Current in the LED load is determined by the value of the
feedback resistor and the target feedback regulation voltage
as shown in Equation 1:
V FB
I LED = ----------------------R SENSE
(EQ. 1)
With MODE tied to VDC, voltage across the feedback
resistor is set by VLEVEL as shown in Equation 2:
V LEVEL
V FB = ---------------------5
(EQ. 2)
12
Output Overvoltage Protection (OVP)
If the FB pin is shorted to ground or an LED fails open circuit,
output voltage in BOOST mode can increase to potentially
damaging voltages. An optional overvoltage protection
circuit can be enabled by connection of the OVP pin to the
output voltage. The device will stop switching if the output
voltage exceeds OVPH and re-start when the output voltage
falls below OVPL. During sustained OVP fault conditions,
VOUT will saw-tooth between the upper and lower threshold
voltages at a frequency determined by the magnitude of
current available to discharge the output capacitor and the
value of output capacitor used.
The OVP threshold can be set to a lower value by using an
external zener diode and resistor, as shown in Figure 33. R1
should be adjusted to minimize offset in the FB voltage due
to FB pin input current. A value of 100Ω is recommended.
FN6626.0
December 17, 2007
ISL78100
Component Selection
VBAT
Input Capacitor
10µH
L1
VBAT FAULT
VOUT
VIN
ISL78100
COUT
SWD1
SWD2
20µF
ZOVP
FB
SWS1 SWS2
R1
100
0.5
RSENSE
Considerably more input current ripple is generated in buck
mode than boost mode. In buck mode input current is
alternately switched between IOUT and zero. The RMS
current flow in the input capacitor is given by Equation 3:
FIGURE 33. EXTERNAL OVP CIRCUIT
Over-Temperature Shutdown
2
An internal sense circuit disables PWM switching if the die
temperature exceeds +135°C. Switching is re-enabled when
the temperature falls below +100°C.
Internal 5V LDO
An internal LDO between VIN and VDC regulates VDC to 5V,
to power control and gate drive circuits when VIN exceeds
5.1V. In normal operation decouple VDC with at least 3.3µF.
In applications where the input supply is less than 5.5V, VDC
should be tied directly to VIN.
LED Temperature Control
LED lifetime reduces dramatically with elevated
temperature. An over-temperature control circuit utilizing the
thermistor voltage at TEMP reduces the LED bias current
when VTEMP exceeds the threshold voltage on TMAX. To
minimize noise injection, use a potential divider between
VDC and GND to set the voltage on TMAX, as shown in
Figure 34. The value of TMAX for a specific threshold
temperature is determined by the choice of thermistor
temperature coefficient. Disable the function by connecting
the TMAX pin to VDC and TEMP pin to GND.
THERMISTOR
CREG
0.47µF
CLOSE
TO LEDs
RM1
20k
TMAX
LDO
RM2
80k
+
FB LEVEL
CURRENT
TEMP
TEMPERATURE
COMPENSATION
RT
10k
GND
ISL78100
FIGURE 34. OVER-TEMPERATURE CIRCUIT
13
I CAPRMS = I OUT • ( D – D )
(EQ. 3)
Where: D = Duty Cycle
The input current is maximum for D = 0.5 and when IOUT
approaches current limit (2.4A) giving a value of around
1.2A.
A capacitor with low internal series resistance should be
chosen to minimize heating effects and improve system
efficiency, such as X5R or X7R ceramic capacitors, which
offer small size and a lower value of temperature and voltage
coefficient compared to other ceramic capacitors.
In boost mode input current flows continuously into the
inductor, with an AC ripple component proportional to the
rate of inductor charging only and smaller value input
capacitors may be used. It is recommended that an input
capacitor of at least 10µF be used. Ensure the voltage rating
of the input capacitor is suitable to handle the full supply
range.
In automotive applications, the input capacitor can be
protected from exposure to high voltages present during
fault conditions (load dump) by connecting it downstream of
the fault protection switch, as shown in Figures 39 and 40.
Inductor
0.5
VDC
RSENSE
VIN
Switching regulators require input capacitors to deliver peak
charging current and to reduce the impedance of the input
supply. This reduces interaction between the regulator and
input supply, improving system stability. The high switching
frequency of the loop causes almost all ripple current to flow
in the input capacitor, which must be rated accordingly.
Careful selection of inductor value will optimize circuit
operation. Inductor type and value influence many key
parameters, including ripple current, current limit, efficiency,
transient performance and stability. Internal slope
compensation has been optimized for inductor values
between 4.7µH and 10µH. Ensure the inductor current rating
is capable of handling the current limit value in the
configuration used (2.4A for buck, 3.5A for boost). If an
inductor core is chosen with too low a current rating,
saturation in the core will cause the effective inductor value
to fall, leading to an increase in peak to average current
level, poor efficiency and overheating in the core.
FN6626.0
December 17, 2007
ISL78100
Rectifier Diode
In buck mode:
A high speed rectifier diode is necessary to prevent
excessive voltage overshoot, especially in the boost
configuration. Low forward voltage and reverse leakage
current will minimize losses, making Schottky diodes the
preferred choice. Similarly to the inductor, a diode with a
suitable current rating to handle current limit in the
configuration must be used.
( V IN – V OUT ) × D
D
V RIPPLE = ----------------------------------------------- × ⎛ --------------------------- + ESR⎞
⎝f × C
⎠
2 × fs × L
s
OUT
where:
V OUT
D = ---------------V IN
The output capacitor acts to smooth the output voltage and
in the boost configuration supplies load current directly
during the conduction phase of the power switch. Ripple
voltage consists of two components, the first due to charging
and discharging of the capacitor; the second due to IR drop
across the ESR of the capacitor by inductor ripple current.
Compensation
The ISL78100 employs a direct summing control loop with
current feedback. No error amplifier is used in the system.
The arrangement provides fast transient response and
makes use of the output capacitor to compensate the loop.
The effect of the pole associated with the inductor is
minimized by the current feedback. The number of LEDs,
their DC bias current and the value of feedback resistor alter
loop stability due to their effect on feedback factor, which is
heavily influenced by the small signal impedance of the
LEDs. Generally, higher numbers of LEDs, lower bias levels
and smaller values of feedback resistor will require smaller
output capacitors to achieve loop stability. A combination of
low ESR electrolytic and ceramic capacitors may be used to
reduce implementation costs.
In boost mode:
(EQ. 4)
where:
V OUT – V IN
D = -------------------------------V OUT
(EQ. 5)
and
IO
( V OUT – V IN ) ( 1 – D )
I LPK = ------------- + ------------------------------------ × -----------------2×L
1–D
fs
(EQ. 8)
For a low ESR ceramic capacitor, output ripple is dominated
by the charging and discharging of the output capacitor.
Care should be taken to ensure the voltage rating of the
capacitor exceeds the maximum output voltage.
Output Capacitor
IO
D
V RIPPLE = ---------------- × ------- + I LPK × ESR
C OUT F S
(EQ. 7)
(EQ. 6)
TABLE 2. BOOST MODE COMPENSATION. 2.7V OPERATION
VOUT (V)
7
10.5
14
17.5
21
24.5
28
3
4
5
6
7
8
DMAX
DMAX
40µF
20µF
20µF
VFB
IOUT
LED’s
2
50mV
50mA
Electrolytic
94µF
47µF
Ceramic
40µF
20µF
100mV
100mA
Electrolytic
94µF
Ceramic
60µF
60µF
40µF
40µF
40µF
200mV
350mA
Electrolytic
94µF
47µF
47µF
47µF
ILIM
ILIM
ILIM
Ceramic
60µF
40µF
40µF
40µF
200mV
1A
Electrolytic
ILIM
ILIM
ILIM
ILIM
ILIM
ILIM
ILIM
Ceramic
TABLE 3. BOOST MODE COMPENSATION 6V OPERATION
VOUT (V)
7
10.5
14
17.5
21
24.5
28
3
4
5
6
7
8
40µF
20µF
20µF
20µF
20µF
40µF
40µF
40µF
40µF
VFB
IOUT
LED’s
2
50mV
50mA
Electrolytic
94µF
47µF
Ceramic
40µF
20µF
141µF
47µF
100mV
100mA
Electrolytic
Ceramic
60µF
60µF
60µF
200mV
350mA
Electrolytic
141µF
47µF
47µF
Ceramic
60µF
60µF
40µF
60µF
40µF
40µF
40µF
200mV
1A
Electrolytic
94µF
47µF
ILIM
ILIM
ILIM
ILIM
ILIM
Ceramic
40µF
40µF
14
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December 17, 2007
ISL78100
TABLE 4. BOOST MODE COMPENSATION 12V OPERATION
VOUT (V)
7
10.5
14
17.5
21
24.5
28
VFB
IOUT
LED’s
2
3
4
5
6
7
8
50mV
50mA
Electrolytic
DMIN
DMIN
DMIN
60µF
40µF
40µF
40µF
47µF
47µF
40µF
20µF
40µF
40µF
47µF
47µF
20µF
40µF
40µF
40µF
40µF
Ceramic
100mV
100mA
Electrolytic
200mV
350mA
Electrolytic
Ceramic
Ceramic
200mV
1A
DMIN
DMIN
DMIN
DMIN
DMIN
DMIN
40µF
47µF
47µF
DMIN
DMIN
DMIN
20µF
20µF
Electrolytic
Ceramic
CERAMIC CAPACITORS
Many ceramic capacitors have strong voltage and
temperature coefficients, which reduces effective
capacitance as the applied voltage or operating temperature
is increased. Pay careful attention when selecting ceramic
capacitor type. X5R and X7R families provide much better
stability than Y5V, which should generally be avoided unless
additional capacitance is added to compensate for the
significant changes in value, which occurs overvoltage and
temperature.
TABLE 5. CERAMIC CAPACITOR VARIABILITY
• Place several via holes (thermal vias) under the chip to a
backside ground plane to improve heat dissipation
• Maximize the copper area around the thermal vias to
spread heat away from the chip.
Cost-Sensitive Applications
For cost-sensitive applications, the BOM can be reduced
considerably by:
1. Removing temperature compensation
2. Removing the fault-protection switch
3. Removing the load isolation switch
CAPACITOR TYPE
TYPICAL VOLTAGE
VARIATION
TEMPERATURE
VARIATION
4. Switching the FB into internal fixed bias mode (400mV
across VFB)
X7R, 10V
-30% at 10V
-15% at +125°C
In this configuration, light level may be controlled using the
EN/PWM input to modulate the output current.
X5R, 25V
-50% at 25V
-9% at +85°C
Y5V, 6.3V
-90% at 6.3V
-65% at +85°C
Layout Considerations
PCB layout is very important for the converter to function
properly. The following general guidelines should be
followed:
In the absence of the load isolation switch, LED bias current
will vary with PWM duty cycle, due to the discharge of the
output capacitor by the LED’s during the PWM off-time.
Therefore, low dimming frequencies can only be used in
such an application.
• Separate the Power Ground and Signal Ground; connect
them only at one point close to the GND pin.
• Maximize the Power Ground area as much as possible. It
is essential to ensure the Power Ground return between
CIN, COUT, and SWS1,2 as least obstructive as possible.
• Place the input capacitor close to VIN and SWS1, SWS2
pins in boost mode.
• Make the following PC traces as short as possible:
- from SWD1, SWD2 to the inductor in boost mode
- from SWS1,SWS2 to the inductor in buck mode
- from COUT to PGND
• Feedback signals levels are small to improve efficiency.
Ensure the reference connection (GND or VIN) between
the sense resistor and IC pin doesn't carry switching
current.
15
FN6626.0
December 17, 2007
ISL78100
Boost Mode Application Diagram
VBAT
VIN
FAULT
SWD1
VBAT
SWD2
VDC
EN
VHI
OVP
TEMP
SWS1
TMAX
SWS2
EN/PWM
ENL
MODE
FB
LEVEL
GND
BUCK/BOOSTN
FIGURE 35. BASIC BOOST APPLICATION CIRCUIT
Boost Mode with Overcurrent Fault and LED Temperature Protections
Application Diagram
VBAT
VIN
FAULT
SWD1
VBAT
SWD2
VDC
TEMP
SENSOR
EN
VLEVEL (0V TO 2.5V)
VHI
OVP
TEMP
SWS1
TMAX
SWS2
EN/PWM
ENL
MODE
FB
LEVEL
GND
BUCK/BOOSTN
FIGURE 36. BOOST MODE APPLICATION WITH OVERCURRENT FAULT PROTECTION AND
LED TEMPERATURE PROTECTION
16
FN6626.0
December 17, 2007
ISL78100
Typical Buck Application Diagram
VBAT
VHI
VIN
FAULT
SWD1
VBAT
SWD2
VDC
EN
OVP
TEMP
SWS1
TMAX
SWS2
EN/PWM
ENL
MODE
FB
LEVEL
GND
BUCK/BOOSTN
FIGURE 37. BASIC BUCK APPLICATION CIRCUIT
Buck Mode with Overcurrent Fault and LED Temperature Protections
Application Diagram
VBAT
VIN
FAULT
SWD1
VBAT
SWD2
VDC
TEMP
SENSOR
EN
VLEVEL (0V TO 2.5V)
VHI
OVP
TEMP
SWS1
TMAX
SWS2
EN/PWM
ENL
MODE
FB
LEVEL
GND
BUCK/BOOSTN
FIGURE 38. BUCK MODE WITH OVERCURRENT FAULT AND LED TEMPERATURE
PROTECTIONS APPLICATION
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
17
FN6626.0
December 17, 2007
ISL78100
Automotive Applications
The protection circuit is applicable to buck, boost, and
supply-return load applications.
The LED load and ISL78100 may be protected against load
dumps and other electrical faults in automotive supplies with
a minor addition to the standard application schematic:
A small reduction in efficiency is caused by the drop in the
power Schottky.
• A reverse transient automotive-rated protection power
Schottky must be added in series with the input supply
Unless alternative transient protection is provided,
minimum BOM automotive applications must include the
circuit changes noted previously.
• A 500Ω current limit resistor must be inserted in series
with the VBAT pin
• The fault protection NFET must be specified to handle
100V VDS conditions.
Automotive Boost Application Diagram
VBAT
RLIM
VIN
500
FAULT
SWD1
VBAT
SWD2
VDC
TEMP
SENSOR
EN
VLEVEL (0V TO 2.5V)
VHI
OVP
TEMP
SWS1
TMAX
SWS2
EN/PWM
ENL
MODE
FB
LEVEL
GND
BUCK/BOOSTN
FIGURE 39. AUTOMOTIVE BOOST MODE APPLICATION DIAGRAM
Automotive Minimum BOM Boost Application Diagram
VBAT
VIN
FAULT
SWD1
VBAT
SWD2
VDC
EN
VLEVEL (0V TO 2.5V)
VHI
OVP
TEMP
SWS1
TMAX
SWS2
EN/PWM
ENL
MODE
FB
LEVEL
GND
BUCK/BOOSTN
FIGURE 40. AUTOMOTIVE MINIMUM BOM BOOST MODE APPLICATION
18
FN6626.0
December 17, 2007
ISL78100
Package Outline Drawing
L20.4x4C
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 11/06
4X
4.00
2.0
16X 0.50
A
B
16
6
PIN #1 INDEX AREA
20
6
PIN 1
INDEX AREA
1
4.00
15
2 .70 ± 0 . 15
11
(4X)
5
0.15
6
10
0.10 M C A B
4 20X 0.25 +0.05 / -0.07
20X 0.4 ± 0.10
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0 . 1
C
BASE PLANE
( 3. 8 TYP )
(
SEATING PLANE
0.08 C
2. 70 )
( 20X 0 . 5 )
SIDE VIEW
( 20X 0 . 25 )
C
0 . 2 REF
5
( 20X 0 . 6)
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
19
FN6626.0
December 17, 2007