INTERSIL ISL88694IH5

ISL88694
®
Data Sheet
January 21, 2005
FN8239.1
SMBus Accelerator (SMA)
Features
The ISL88694 SMBus accelerator (SMA) is a dual active
pull-up bus terminator designed to improve data
transmission speed on SMBus or similar 2-wire serial bus
interfaces. The ISL88694 is also compatible to the I2C serial
bus.
• Active Termination for SMBus lines
The SMA detects rising input transitions with two internal
voltage references and two comparators per channel. After
the voltage on a data line crosses the first threshold
(VTRIPL), the boost pull-up current source is activated to
speed transition. After the voltage crosses the second
threshold (VTRIPH), the boost pull-up current source is deactivated, leaving an active pull-up current of 275µA on the
line. When both channels are HIGH, the pull-up current for
both lines is reduced to 100µA to save power. Internal logic
ensures that the active and boost pull-up current sources are
not activated during downward transitions.
• 8kV ESD Protection on SDA and SCL Pins
The level for VTRIPH is controlled by a bandgap voltage
referred to VDD. This feature makes the switching behavior
invariant for all power supply voltages between 2.7V and
5.5V.
• Data Acquisition
A noise filter on each channel prevents the circuit from
responding to input transitions that do not exceed a voltagetime threshold. To activate the boost circuit, the input must
exceed VTRIPL by 100Vns (typical) (See Figure 10).
• Portable Instrumentation
The SMA permits operation of the bus at frequencies up to
100kHz, despite the capacitive loads of multiple devices
and/or long PC board traces. Enhanced ESD protection on
the accelerator pins are guaranteed to withstand 8kV ESD
(HBM) events.
• Facilities Tracking System
The SMBus Accelerator provides an essential function in
SMBus applications because of distributed capacitance of
SMBus and multiple device input capacitances at various
nodes. By incorporating SMA, systems using SMBus or I2C
can reliably increase their bus load without the risk of data
loss.
• Enhances System Bus Signal Rise Time
• Increases Bus Capacity While Guaranteeing Data Integrity
• 2.2mA Rise Time Supply Current
• Wide Operating Voltage Range: 2.7V to 5.5V
• 2-Wire SMBus and I2C Compatible (100kHz)
• Small Package - SOT23-5
• Pin-for-Pin Compatible with the LTC1694
• Pb-Free Available (RoHS Compliant)
Target Applications
• Servers
• Routers
• Battery Chargers
• Notebook
• PC
Pinout
ISL88694
(5 LD SOT-23)
TOP VIEW
VDD
1
GND
2
N.C.
3
5
SMBus1
4
SMBus2
Ordering Information
PART NUMBER
PACKAGE
TEMP RANGE (°C)
ISL88694IH5
5-pin SOT
-40 to 85
ISL88694IH5Z (Note) 5-pin SOT (Pb-Free)
-40 to 85
Add “-TK” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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ISL88694
Pin Descriptions
SOT-23
SYMBOL
DESCRIPTION
1
VDD
Supply Voltage
2
GND
Ground
3
N.C.
No Connect
4
SMBus1
Active Pull-Up for SMBus
5
SMBus2
Active Pull-Up for SMBus
System Diagram
ISL88694
VDD
SMBus1
SMBus2
GND
BUS SIGNALS
DATA
CLK
Devices;
SBS, PCI,
Compact PCI,
PMCI, ACPI,
ICMB, IPMI,
IPMB,SMBus,
I2C, 2-Wire.
DATA IN
CLK IN
CLK OUT
CLK IN
CLK OUT
DATA OUT
Device 1
DATA IN
DATA OUT
Device N
IC Block Diagram
VDD
1.825mA 175µA 100µA
VTRIPH=
VDD-0.5V
+
SMBus1
Control
VTRIPL=
0.75V
+
+
VTRIPH=
VDD-0.5V
+
VTRIPL=
SMBus2
8kV ESD
Protection
0.75V
8kV ESD
Protection
Control
1.825mA 175µA 100µA
VDD
2
GND
FN8239.1
January 21, 2005
ISL88694
Absolute Maximum Ratings
Recommended Operating Conditions
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 6.5V
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . 300°C
ESD min other pins (HBM). . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV
ESD SMBus1 and SMBus2 pins (HBM) . . . . . . . . . . . . . . . . . .>8kV
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings
provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification are not implied.
For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some
performance characteristics may degrade when the device is not operated under the listed test conditions.
Electrical Specifications
SYMBOL
Over operating conditions unless otherwise specified, Typical values are measured at VDD = 3.3V and
TA = +25°C
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
2.7
5.5
V
0.05
50
V/msec
ANALOG PARAMETERS
VDD
Supply Voltage Range
VDD RAMP VDD Ramp Rate
IDD
Supply Current
SMBus1=SMBus2=Open
80
100
µA
IOUT_SB
Standby Pull-Up Current
SMBus1=SMBus2=VDD-1.0V
80
125
µA
IOUT_A1
Active Pull-Up Current
SMBus1=GND; SMBus2=Open
125
275
350
µA
SMBus1= Open; SMBus2=GND
125
275
350
µA
IOUT_A2
IOUT_B1
Boost Pull-Up Current (Figure 1) VTRIPL<SMBus1<VTRIPH, SMBus2=Open
1.6
2.2
mA
IOUT_B2
VTRIPL<SMBus2<VTRIPH, SMBus1=Open
1.6
2.2
mA
VTRIPL
Input Voltage Threshold Low
0.65
0.75
0.85
V
VTRIPH
Input Voltage Threshold High
VDD-0.60
VDD - 0.50
VDD - 0.40
V
fMAX
SMBus Max Frequency
100
kHz
NSS
Noise Spike Suppression
(Note 1) (Figure 10)
20
V-nsec
NOTES:
1. Measured as area under triangular waveform above VTRIPL, with time as base and VIN as height (See Figure 10).
3
FN8239.1
January 21, 2005
ISL88694
370
3.75
350
2.60
BOOST PULL-UP CURRENT, IOUT_B (µA)
ACTIVE PULL-UP CURRENT, IOUT_A (µA)
Typical Performance Curves
330
310
290
VDD=5.5V
270
250
VDD=2.7V
230
210
-60
-40
-20
0
20
40
60
80
2.45
2.15
2.00
VDD=2.7V
1.85
1.70
1.55
-60
100
VDD=5.5V
2.30
-40
-20
TEMPERATURE (°C)
120
0.95
110
0.90
100
90
VDD=5.5V
80
VDD=2.7V
60
50
40
-60
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 3. STANDBY PULL-UP CURRENT. SMBus1,2=VDD-0.5V
4
20
40
60
80
100
FIGURE 2. BOOST PULL-UP CURRENT. SMBus PIN = VDD/2.
INPUT THRESHOLD LOW, VTRIPL (V)
STANDBY PULL-UP CURRENT, IOUT_SB (µA)
FIGURE 1. ACTIVE PULL-UP CURRENT. SMBus PIN=0V
70
0
TEMPERATURE (°C)
0.85
0.80
VDD=5.5V
0.75
VDD=2.7V
0.70
0.65
0.60
0.55
-60
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 4. VTRIPL VOLTAGE
FN8239.1
January 21, 2005
ISL88694
Typical Performance Curves
(Continued)
95
90
0.65
SUPPLY CURRENT, IDD (µA)
INPUT THRESHOLD HIGH, VTRIPH (VDD-V)
0.70
0.60
0.55
VDD=5.5V
0.50
VDD=2.7V
0.45
0.40
VDD=5.5V
80
75
VDD=2.7V
70
65
60
0.35
0.30
-60
85
-40
-20
0
20
40
60
80
55
-60
100
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 6. IDD CURRENT. SMBus1=SMBus2=OPEN.
FIGURE 5. VTRIPH VOLTAGE
BOOST PULL-UP CURRENT, IOUT_B (mA)
3.5
3.0
2.5
VDD=5.0V
2.0
1.5
VDD=2.7V
1.0
0.5
0
0
1
2
3
4
5
6
SMBus VOLTAGE (V)
FIGURE 7. BOOST PULL-UP CURRENT vs. SMBus VOLTAGE
Functional Description
SMBus Overview
The SMBus or I2C bus is a 2-wire multimaster bus, meaning
that more than one device connected to the bus is capable of
controlling it. Master devices communicate to other master
or slave devices using one clock and one data line. These
are both bidirectional.
In order to allow multimaster operation without bus
contention, it is necessary to allow each bus to be connected
to a positive supply voltage via a current-source or pull-up
resistor (see “System Diagram” on page 2). When the bus is
free, both lines are HIGH. The output stages of devices
5
connected to the bus must have an open-drain or opencollector to perform the wired-AND function.
Simple pull-up resistors on the clock and data lines work well
unless there are long signal lines or many devices
connected to the bus. Then, the combined capacitance of
the bus increases the rise time on the signal to such an
extent that the communication becomes unreliable or fails to
meet the bus timing specifications. Smaller resistors can
sometimes compensate for the extra capacitance, but this
increases the current consumption when the signal lines are
pulled LOW.
FN8239.1
January 21, 2005
ISL88694
ISL88694 Operation
With ISL88694 SMA
To improve the operation of the SMBus where larger bus
capacitance exists, the ISL88694 provides active pull-up
using switched current sources. When the bus is idle and
both lines are HIGH, a standby pull-up current of 100µA is
used to maintain the signal level while minimizing power
consumption. When either of the two signals is pulled LOW,
an active pull-up current of 275µA maintains a good VOL
noise margin.
When the bus line is released, it is pulled high by the
ISL88694 active current until the voltage exceeds the
VTRIPL level for a period of time. This voltage-time
combination filters out noise on the signal line. Once the
ISL88694 detects a valid rising edge, a 2.2mA boost current
pulls the bus line high very quickly (see Figure 8). This boost
current turns off when the input level reaches the VTRIPH
threshold and the pull-up current returns to the active level. If
both inputs are HIGH, the pull-up current drops to the
standby level of 100µA.
VTRIPH
With RC
Pullup
VTRIPL
R=15.8K
C= 200pF
FIGURE 9. ISL88694 SMBus SYSTEM BOOST PULL-UP
COMPARED TO RESISTOR PULL-UP (VDD =
2.7V).
VDD
With ISL88694 SMA
VTRIPH
VTRIPH
With SMA
Without SMA
With RC
Pullup
VTRIPL
VTRIPL
R=15.8K
C= 200pF
Gnd
SMBus1
SMBus2
FIGURE 8. ISL88694 SMBus SYSTEM BOOST PULL-UP
COMPARED TO RESISTOR PULL-UP (VDD =
5.5V).
6
>20Vns
(Typical)
t
FIGURE 10. NOISE SUPPRESSION. BOOST CURRENT
APPLIED WHEN INPUT SIGNAL EXCEEDS 20Vns
(TYPICAL).
FN8239.1
January 21, 2005
ISL88694
Package Outline Drawing
5-Lead, SOT23, Package Code H5
0.007 (0.20)
B 0.0006 (0.15)
B
0.108 (2.75) BSC
0.054 (1.38) BSC
0.065 (1.65)
0.061 (1.55)
CL
4X
0.35 H A-B D
0.35 C A-B D
2X N/2 TIPS
3
1
0.075 (1.90) BSC
12° REF.
TYP.
0.118 (3.00)
0.110 (2.80)
0.033 (0.85)
0.035 (0.90)
0.038 (0.95)
BSC
Parting Line
Seating Plane
0.10 R MIN.
0.10 R
MIN.
0.20 in
0.0008 (0.02)
0.0040 (0.10)
SEATING PLANE
0.043 (1.10) MAX
.019 (0.50)
.012 (0.30)
0-8°C
0.575 REF.
NOTES:
1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH
3. DIMENSIONING AND TOLERANCES PER ASME, Y14.5-1994
4. THIS PART IS COMPLIANT WITH JEDEC SPECIFICATION MO-193.
5. THIS PART IS FULL COMPLIANCE TO EIAJ SPECIFICATION SC-74
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
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FN8239.1
January 21, 2005