STMICROELECTRONICS LK115D30-TR

LK115XX30
LK115XX33 - LK115XX50
Very low drop with inhibit voltage regulators
Features
■
Very low dropout voltage (0.2 V typ.)
■
Very low quiescent current
(Typ. 0.01 µA in off mode, 280 µA in on mode)
■
Output current up to 100 mA
■
Two logic-controlled electronic shutdowns
■
Output voltages of 3.0; 3.3; 5.0 V
■
Internal current and thermal limit
■
Only 2.2 µF for stability
■
VOUT tolerance ± 3 % at 25 °C
■
Supply voltage rejection: 80 dB (typ)
■
Temperature range: -40 °C to 125 °C
SO-8
It requires only a 2.2 µF capacitor for stability
allowing space and cost saving.
Description
The LK115XX series are very low drop regulators
available in SO-8 package and in a wide range of
output voltages.
The very low drop voltage (0.2 V) and the very low
quiescent current (0.01 µA in OFF MODE, 280 µA
in ON MODE) make them particularly suitable for
low noise, low power applications and specially in
battery powered systems.
Both active HIGH and active LOW shutdown logic
control are available (pin 2 and 3). This means
that when the device is used as a local regulator,
it is possible to put a part of the board in standby,
decreasing the total power consumption.
Table 1.
July 2008
Device summary
Order codes
Output voltages
LK115D30-TR
3V
LK115D33-TR
3.3 V
LK115D50-TR
5V
Rev 4
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14
Contents
LK115XX30 - LK115XX33 - LK115XX50
Contents
1
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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LK115XX30 - LK115XX33 - LK115XX50
1
Diagram
Figure 1.
Schematic diagram
Diagram
3/14
Pin configuration
2
Pin configuration
Figure 2.
Pin connection (top view)
Table 2.
Truth table
Note:
4/14
LK115XX30 - LK115XX33 - LK115XX50
ON/OFF (Pin 2)
ON/OFF (Pin 3)
Status
H
L
ON
H
H
OFF
L
L
OFF
L
H
NOT ALLOWED
Logic levels are those defined in the electrical characteristics.
LK115XX30 - LK115XX33 - LK115XX50
3
Maximum ratings
Table 3.
Absolute maximum ratings
Symbol
Note:
Parameter
Maximum ratings
Value
Unit
20
V
VI
DC input voltage
IO
Output current
Internally limited
PTOT
Power dissipation
Internally limited
TSTG
Storage temperature range
-40 to 150
°C
TOP
Operating junction temperature range
-40 to 125
°C
Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these condition is not implied.
5/14
Test circuits
LK115XX30 - LK115XX33 - LK115XX50
4
Test circuits
Figure 3.
Supply current (On mode)
Figure 4.
Supply current (Off mode)
Note:
The switch emulates the two possibilities to set the regulator in OFF mode.
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LK115XX30 - LK115XX33 - LK115XX50
Electrical characteristics
5
Electrical characteristics
Table 4.
Electrical characteristics for LK115D30 (refer to the test circuits, TJ = 25 °C, CI = 0.1 µF,
CO = 2.2 µF unless otherwise specified.)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
IO = 10 mA, VI = 5 V
2.910
3
3.090
IO = 10 mA, VI = 5 V, Ta= -40 to 125°C
2.850
Unit
VO
Output voltage
VI
Operating input voltage
Iout
Output current limit
ΔVO
Line regulation
VI = 4 to 20 V, IO = 0.5 mA
2
10
mV
ΔVO
Load regulation
VI = 4 V, IO = 0.5 to 100 mA
4
20
mV
Quiescent current
(On Mode)
VI = 4 to 20 V, IO = 0
0.28
0.5
VI = 4 to 20 V, IO = 100 mA
1.5
3
(Off Mode)
VI = 4 to 20 V
0.01
2
Supply voltage rejection
IO = 5 mA
VI = 5 V ± 1V
Id
SVR
IO = 100 mA
Output noise voltage
(RMS)
B = 10 Hz to 100 kHz
Vd
Dropout voltage
IO = 60 mA
ON/OFF Control (pin 2)
VLIc
ON/OFF Control (pin 3)
CO
Output bypass
capacitance
20
120
eN
VHIc
V
3.150
200
V
mA
mA
f = 120 Hz
79
f = 1 kHz
74
f = 10 kHz
57
µA
dB
66
µV
0.17
V
Pin 3 to GND, OFF
0
0.5
Pin 3 to GND, ON
2.4
Vin
Pin 2 to Vin, OFF
Vin-0.2
Vin
Pin 2 to Vin, ON
0
Vin-2.4
ESR = 0.5 to 10 Ω, IO = 0 to 100 mA
2
V
10
V
µF
7/14
Electrical characteristics
Table 5.
Symbol
LK115XX30 - LK115XX33 - LK115XX50
Electrical characteristics for LK115D33 (refer to the test circuits, TJ = 25 °C, CI = 0.1 µF,
CO = 2.2 µF unless otherwise specified.)
Parameter
Test conditions
IO = 10 mA, VI = 5.3 V
Min.
Typ.
Max.
3.2
3.3
3.4
Unit
VO
Output voltage
VI
Operating input voltage
Iout
Output current limit
ΔVO
Line regulation
VI = 4.3 to 20 V, IO = 0.5 mA
2
10
mV
ΔVO
Load regulation
VI = 4.3 V, IO = 0.5 to 100 mA
4
20
mV
Quiescent current
(On Mode)
VI = 4.3 to 20 V, IO = 0
0.28
0.5
VI = 4.3 to 20 V, IO = 100 mA
1.5
3
(Off Mode)
VI = 4.3 to 20 V
0.01
2
Supply voltage rejection
IO = 5 mA
VI = 5.3 V ± 1V
Id
SVR
V
IO = 10 mA, VI = 5.3 V, Ta= -40 to 125°C
3.135
3.465
IO = 100 mA
20
120
200
V
mA
mA
f = 120 Hz
79
f = 1 kHz
74
f = 10 kHz
57
µA
dB
eN
Output noise voltage
(RMS)
B = 10 Hz to 100 kHz
72.6
µV
Vd
Dropout voltage
IO = 60 mA
0.17
V
VHIc
ON/OFF Control (pin 2)
VLIc
ON/OFF Control (pin 3)
CO
Output bypass
capacitance
8/14
Pin 3 to GND, OFF
0
0.5
Pin 3 to GND, ON
2.4
Vin
Pin 2 to Vin, OFF
Vin-0.2
Vin
Pin 2 to Vin, ON
0
Vin-2.4
ESR = 0.5 to 10Ω, IO = 0 to 100 mA
2
V
10
V
µF
LK115XX30 - LK115XX33 - LK115XX50
Table 6.
Symbol
Electrical characteristics
Electrical characteristics for LK115D50 (refer to the test circuits, TJ = 25 °C, CI = 0.1 µF,
CO = 2.2 µF unless otherwise specified.)
Parameter
Test conditions
Min.
Typ.
Max.
IO = 10 mA, VI = 7 V
4.85
5
5.15
IO = 10 mA, VI = 7 V, Ta= -40 to 125°C
4.75
Unit
VO
Output voltage
VI
Operating input voltage
Iout
Output current limit
ΔVO
Line regulation
VI = 6 to 20 V, IO = 0.5 mA
3
15
mV
ΔVO
Load regulation
VI = 6 V, IO = 0.5 to 100 mA
4
20
mV
Quiescent current
(On Mode)
VI = 6 to 20 V, IO = 0
0.28
0.5
VI = 6 to 20 V, IO = 100 mA
1.5
3
(Off Mode)
VI = 6 to 20 V
0.01
2
Supply voltage rejection
IO = 5 mA
VI = 7 V ± 1V
Id
SVR
V
5.25
IO = 100 mA
20
120
200
V
mA
mA
f = 120 Hz
75
f = 1 kHz
70
f = 10 kHz
55
µA
dB
eN
Output noise voltage
(RMS)
B = 10 Hz to 100 kHz
110
µV
Vd
Dropout voltage
IO = 60 mA
0.17
V
VHIc
ON/OFF Control (pin 2)
VLIc
ON/OFF Control (pin 3)
CO
Output bypass
capacitance
Pin 3 to GND, OFF
0
0.5
Pin 3 to GND, ON
2.4
Vin
Pin 2 to Vin, OFF
Vin-0.2
Vin
Pin 2 to Vin, ON
0
Vin-2.4
ESR = 0.5 to 10Ω, IO = 0 to 100 mA
2
V
10
V
µF
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Package mechanical data
6
LK115XX30 - LK115XX33 - LK115XX50
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
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LK115XX30 - LK115XX33 - LK115XX50
Package mechanical data
SO-8 mechanical data
Dim.
mm.
Min.
Typ.
inch.
Max.
Min.
Typ.
Max.
A
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.04
0.010
A2
1.10
1.65
0.043
0.065
B
0.33
0.51
0.013
0.020
C
0.19
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
E
3.80
4.00
0.150
0.157
e
1.27
0.050
H
5.80
6.20
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
k
ddd
8° (max.)
0.1
0.04
0016023/C
11/14
Package mechanical data
LK115XX30 - LK115XX33 - LK115XX50
Tape & reel SO-8 mechanical data
mm.
inch.
Dim.
Min.
A
Max.
Min.
330
13.2
Typ.
Max.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
12/14
Typ.
0.504
22.4
0.519
0.882
Ao
8.1
8.5
0.319
0.335
Bo
5.5
5.9
0.216
0.232
Ko
2.1
2.3
0.082
0.090
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
LK115XX30 - LK115XX33 - LK115XX50
7
Revision history
Table 7.
Document revision history
Date
Revision
07-Jun-2006
3
Order codes updated.
07-Jul-2008
4
Added Table 1 on page 1.
Revision history
Changes
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LK115XX30 - LK115XX33 - LK115XX50
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