Leshan Radio Co ., Ltd High-precision Low Voltage Detector LR6301 )HDWXUHV /5LVDVHULHVRIKLJKSUHFLVLRQYROWDJH GHWHFWRUZLWKXOWUDORZFXUUHQWFRQVXPSWLRQ Q$W\SDW9GG 9,WFDQZRUNDWYHU\ ORZYROWDJHZKLFKPDNHVLWSHUIHFWIRUV\VWHP UHVHW /5LVFRPSRVHGRIKLJKSUHFLVLRQ YROWDJHUHIHUHQFHFRPSDUDWRURXWSXWGULYHUDQG UHVLVWRUDUUD\,QWHUQDOO\SUHVHWGHWHFWYROWDJH KDVDORZWHPSHUDWXUHGULIWDQGUHTXLUHVQR H[WHUQDOWULPPLQJ 7ZRW\SHRIRXWSXW&026DQG1FKDQQHO RSHQGUDLQDUHDYDLODEOH /5LVDYDLODEOHLQ627627 72627SDFNDJHVZKLFKLV3EIUHH +LJKSUHFLVLRQGHWHFWLRQ9ROWDJH 'HWHFWLRQ9ROWDJH 9a9LQ9VWHSV 3UHFLVHK\VWHUHVLV W\S 2SHUDWLQJ9ROWDJHUDQJH 9a9 8OWUDORZFXUUHQWFRQVXPSWLRQ 9'' 9 7ZR2XWSXWIRUPV RSHQGUDLQ Q$W\SDW &026DQG1FKDQQHO Externally Programmable Time Delay Generator WWe declare that the material of product compliance with RoHHS requirements. $SSOLFDWLRQ 6HOHFWLRQ*XLGH 3RZHUPRQLWRUIRUSRUWDEOHHTXLSPHQWVXFKDV 3'$'6&0RELOHSKRQH1RWHERRN03 /5;;;;; &38DQG/RJLF&LUFXLW5HVHW %DWWHU\&KHFNHU %DWWHU\%DFNXS&LUFXLW 3DFNDJH7\SH 50 627 51 627 60 627 7 72 'HIDXOW 3E)UHH 3RZHU)DLOXUH'HWHFWRU 3LQ$VVLJQPHQW 2XWSXW7\SH 1 1FK2SHQGUDLQ & &026 'HWHFWRU9ROWDJH 9 9 Ver 1.5 Nov 2009 9 9 1/22 Leshan Radio Co ., Ltd 3LQ'HVFULSWLRQ 627 3,11XPEHU 627 72 627 3,11DPH )XQFWLRQ 9287 9'' 966 1& CD 9ROWDJHGHWHFWLRQRXWSXW3LQ 9ROWDJHLQSXW3LQ *1'3LQ 1RFRQQHFWLRQ Externally Programmable Time Delay 3URGXFW&ODVVLILFDWLRQ 3URGXFW1DPH /5;;150 /5;;151 /5;;160 /5;;17 /5;;&50 /5;;&51 /5;;&60 /5;;&7 'HWHFWRU9ROWDJH ;;9 ;;9 ;;9 ;;9 ;;9 ;;9 ;;9 ;;9 2XWSXW7\SH 1FK2SHQ'UDLQ 1FK2SHQ'UDLQ 1FK2SHQ'UDLQ 1FK2SHQ'UDLQ &026 &026 &026 &026 3DFNDJH 627 627 627 72 627 627 627 72 627 72 627 627 3URGXFW0DUN,QIRUPDWLRQ 3URGXFW12 LR6301-09CSM LR6301-20CT LR6301-27CSM LR6301-30CT 0DUN LR6301-09C LR6301-20C LR6301-27C LR6301-30C LR6301-09NRM LR6301-21NRN LR6301-27CRM LR6301-30CRM N609 N621 C627 C630 Ver 1.5 Nov 2009 ([DPSOH /5160 / 5 1;; ([DPSOH /5&50 & 2/22 Leshan Radio Co ., Ltd %ORFNGLDJUDP LR6301-XXN Open Drain Output Configuration LR6301-XXC Complementary Output Configuration 2 2 Input RD * GND 5 1 Reset Output RD 1 Vref 3 Input Reset Output Vref 3 CD GND 5 CD $EVROXWH0D[LPXP5DWLQJV ,QSXW9ROWDJHUDQJH 9a9 2XWSXW9ROWDJHUDQJH 9a9 0D[LPXP2XWSXWFXUUHQW P$ 0D[LPXPSRZHUGLVVLSDWLRQ P: $PELHQWWHPSHUDWXUH a & 6WRUDJHWHPSHUDWXUH a & /HDGWHPSHUDWXUHDQGWLPH &6 5HFRPPHQGHG:RUN&RQGLWLRQV ,WHP ,QSXW9ROWDJHUDQJH $PELHQWWHPSHUDWXUH 0LQ 5HFRPPHQGHG 0D[ XQLW 9 (OHFWULFDO&KDUDFWHULVWLFV /5&1;; 9 6\PERO 3DUDPHWHU 9'(7 'HWHFWRU7KUHVKROG 'HWHFWRU7KUHVKROG +\VWHUHVLV &XUUHQWFRQVXPSWLRQ 0D[LPXPRSHUDWLQJ YROWDJH 0LQLPXP2SHUDWLQJ YROWDJH 9+<6 ,66 9''+ 9''/ ,287 73/+ 2XWSXWFXUUHQW 2XWSXW'HOD\7LPH Ver 1.5 Nov 2009 7RSW 8QOHVVRWKHUZLVHVSHFLILHG 5HIHUHQFHGDWD 0D[ 7\S 0LQ 9 9'' 9 X$ 9 9 P$ P$ &RQGLWLRQV 1FK 9'6 9 9'' 9 9'6 9 9'' 9 3FK 9'6 9 9'' 9 8QLW 9 X6 3/22 Leshan Radio Co ., Ltd /5&1;; 9 6\PERO 3DUDPHWHU 9'(7 'HWHFWRU7KUHVKROG 'HWHFWRU7KUHVKROG +\VWHUHVLV &XUUHQWFRQVXPSWLRQ 0D[LPXPRSHUDWLQJ YROWDJH 0LQLPXP2SHUDWLQJ YROWDJH 9+<6 ,66 9''+ 9''/ ,287 73/+ 2XWSXW'HOD\7LPH 3DUDPHWHU 9'(7 'HWHFWRU7KUHVKROG 'HWHFWRU7KUHVKROG +\VWHUHVLV &XUUHQWFRQVXPSWLRQ 0D[LPXPRSHUDWLQJ YROWDJH 0LQLPXP2SHUDWLQJ YROWDJH ,66 9''+ 9''/ ,287 73/+ 2XWSXWFXUUHQW 2XWSXW'HOD\7LPH Ver 1.5 Nov 2009 7RSW 8QOHVVRWKHUZLVHVSHFLILHG 5HIHUHQFHGDWD 0D[ 7\S 0LQ 9 9'' 9 X$ 9 9 P$ P$ X6 1FK 9'6 9 9'' 9 3FK 9'6 9 9'' 9 6\PERO 9+<6 &RQGLWLRQV 2XWSXWFXUUHQW /5&1;; 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7\S 0D[ 0LQ 7\S 0D[ /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; /5;;; Ver 1.5 Nov 2009 &RQGLWLRQ 9GG 9GHW 9 7\S 6XSSO\&XUUHQW ,VV>X$@ 0D[ &RQGLWLRQ 7\S 0D[ 9GG 9GHW 9 6/22 Leshan Radio Co ., Ltd 2XWSXW 0LQLPXP 'HWHFWRU7KUHVKROG 7HPSHUDWXUH 'HOD\ 2SHUDWLQJ &RHIILFLHQW 9ROWDJH 7LPH ,RXW>P$@ ,RXW>P$@ 73/+>XV@ 9''/>9@ 9'(7 7SSP& &RQGLWLRQ0LQ7\S &RQGLWLRQ 0LQ 7\S 0D[ 7\S 0D[ &RQGLWLRQ 7\S 2XWSXW&XUUHQW 2XWSXW&XUUHQW 9GG 9 9GG 9 1&+ 1&+ 9'6 9 9'6 9 9'' 9 Ver 1.5 Nov 2009 9'' 9 & 7RSW & 7/22 Leshan Radio Co ., Ltd OPERATING DESCRIPTION FOR DELAY CD The LR6301 with SOT23-5 series devices consist of precision voltage detector that drives a time delay generator. Figures 37 and 38 show a timing diagram and a typical application. Initially consider that input voltage Vin is at a nominal level and it is greater than the voltage detector upper threshold (VDET+). The voltage at Pin 5 and capacitor CD will be at the same level as Vin, and the reset output (Pin 1) will be in the high state for active low devices, or in the low state for active high devices. If there is a power interruption and Vin becomes significantly deficient, it will fall below the lower detector threshold (VDET−) and the external time delay capacitor CD will be immediately discharged by an internal N−Channel MOSFET that connects to Pin 5. This sequence of events causes the Reset output to be in the low state for active low devices, or in the high state for active high devices. After completion of the power interruption, Input Voltage, Pin 2 Vin will again return to its nominal level and become greater than the VDET+. The voltage detector will turn off the N−Channel MOSFET and allow pullup resistor RD to charge external capacitor CD, thus creating a programmable delay for releasing the reset signal. When the voltage at Pin 5 exceeds the inverter/buffer threshold, typically 0.675 Vin, the reset output will revert back to its original state. The voltage detector and inverter/buffer have built-in hysteresis to prevent erratic reset operation. Although these device series are specifically designed for use as reset controllers in portable microprocessor based systems, they offer a cost−effective solution in numerous applications where precise voltage monitoring and time delay are required. Vin VDET+ VDET− Vin Capacitor, Pin 5 Reset Output (Active Low), Pin 1 0.675 Vin Vin VDET− 0V Reset Output (Active High), Pin 1 Vin VDET− 0V tD2 Timing Waveforms Ver 1.5 Nov 2009 8/22 Leshan Radio Co ., Ltd APPLICATION CIRCUIT INFORMATION VDD 2 VDD * Input 1 5 Microprocessor LR6301 CD Reset Reset Output CD * Required for GN D 3 GND NCP303 Microprocessor Reset Circuit 2.85 V 2.70 V Vin < 2.7 ON 2 Input 5 1 LR6301 To Additional Circuitry CD Reset Output Vin > 2.835 ON 3 GN D Battery Charge Indicator Vsupply 5.0 V 1.0 V 0V 2 1 5 CD CD 470 k Input LR6301 3 To Additional Circuitry Reset Output 0.001 F Missing Pulse GN D Input 0V Vin 0.675*Vin CD Reset Output tD2 Missing Pulse Detector or Frequency Detector Ver 1.5 Nov 2009 9/22 Leshan Radio Co ., Ltd VDD RH 2 VDD Input RL 5 CD 1 NCP301 LR6301 LSN27T1 3 Microprocessor Reset Reset Output GN D GN D Microprocessor Reset Circuit with Additional Hysteresis Comparator hysteresis can be increased with the addition of resistor RH. The hysteresis equations have been simplified and do not account for the change of input current Iin as Vin crosses the comparator threshold. The internal resistance, Rin is simply calculated using Iin = 0.26 A at 2.6 V. Vin Decreasing: V th RR Vin Increasing: V th H 1 V DET in RH 1 V DET V HYS R in R L VHYS = Vin Increasing − Vin Decreasing Test Data ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ Vth Decreasing (V) Vth Increasing (V) VHYS (V) RH () RL (k) 2.70 2.70 2.70 2.70 2.70 2.70 2.70 2.70 2.70 2.70 2.84 2.87 2.88 2.91 2.90 2.94 2.98 2.70 3.04 3.15 0.135 0.17 0.19 0.21 0.20 0.24 0.28 0.27 0.34 0.35 0 100 100 100 220 220 220 470 470 470 − 10 6.8 4.3 10 6.8 4.3 10 6.8 4.3 5.0 V 100 k Test Data C 2 C (F) fOSC (kHz) IQ (A) 0.01 2590 21.77 1 0.1 490 21.97 Reset Output 1.0 52 22.07 Input 82 k 5 CD NCP301 LR6301 LSN27T1 3 GN D Simple Clock Oscillator Ver 1.5 Nov 2009 10/22 Leshan Radio Co ., Ltd Vsupply This circuit monitors the current at the load. As current flows through the load, a voltage drop with respect to ground appears across Rsense where Vsense = Iload * Rsense. The following conditions apply: Load VDD Rsense 2 If: ILoad VDET − /Rsense ILoad (VDET −+VHYS)/Rsense Input 50 k 5 CD NCP301 LR6301 LSN27T1 3 1 Then: Reset Output = 0 V Reset Output = VDD Microcontroller Reset Output GND GND Microcontroller Systems Load Sensing Vsupply 2 5 CD 5 CD Input NCP301 LR6301 LSN27T1 3 GND 2 Input NCP301 LR6301 LSN27T1 3 GND 2 Input 1 Reset Output 1 Reset Output Vin = 1.0 V to 10 V 5 CD NCP301 LR6301 LSN27T1 3 1 Reset Output GND A simple voltage monitor can be constructed by connecting several voltage detectors as shown above. Each LED will sequentially turn on when the respective voltage detector threshold (VDET− +VHYS) is exceeded. Note that detector thresholds (VDET−) that range from 0.9 V to 4.9 V in 100 mV steps can be manufactured. LED Bar Graph Voltage Monitor Ver 1.5 Nov 2009 11/22 Leshan Radio Co ., Ltd Power Supply 1 2 Input 5 1 LR6301 CD Reset Output 3 GN D 2 Input Reset Output To MCU or Logic Circuitry Power Supply 2 1 LR6301 Reset Output 3 GN D 2 Input Power Supply 3 LR6301 1 Reset Output 3 GN D For monitoring power supplies with a time delay reset, only a single LR6301 with delay capacitor is required. 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Leshan Radio Company Ltd. No. 287 West People Road, Leshan, Sichuan, China. Telephone: + 86-833-2150227 Fax: + 86-833-2150003 E-mail: [email protected] Website: www.lrc.cn Ver 1.5 Nov 2009 22/22