LINER LT1226CN8

LT1226
Low Noise Very High Speed
Operational Amplifier
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DESCRIPTIO
FEATURES
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Gain of 25 Stable
1GHz Gain Bandwidth
400V/µs Slew Rate
2.6nV/√Hz Input Noise Voltage
50V/mV Minimum DC Gain, RL = 500Ω
1mV Maximum Input Offset Voltage
±12V Minimum Output Swing into 500Ω
Wide Supply Range ±2.5V to ±15V
7mA Supply Current
100ns Settling Time to 0.1%, 10V Step
Drives All Capacitive Loads
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APPLICATI
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Wideband Amplifiers
Buffers
Active Filters
Video and RF Amplification
Cable Drivers
Data Acquisition Systems
The LT1226 is a member of a family of fast, high performance amplifiers that employ Linear Technology
Corporation’s advanced bipolar complementary
processing.
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The LT1226 is a low noise, very high speed operational
amplifier with excellent DC performance. The LT1226
features low input offset voltage and high DC gain. The
circuit is a single gain stage with outstanding settling
characteristics. The fast settling time makes the circuit an
ideal choice for data acquisition systems. The output is
capable of driving a 500Ω load to ±12V with ±15V supplies
and a 150Ω load to ±3V on ±5V supplies. The circuit is also
capable of driving large capacitive loads which makes it
useful in buffer or cable driver applications.
TYPICAL APPLICATI
Photodiode Preamplifier, AV = 5.1kΩ, BW = 15MHz
Gain of +25 Pulse Response
V+
+
LT1226
51Ω
–
5.1k
51Ω
LT1226 TA01
LT1226 TA02
1
LT1226
PACKAGE/ORDER I FOR ATIO
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Total Supply Voltage (V+ to V –) ............................... 36V
Differential Input Voltage ......................................... ±6V
Input Voltage ............................................................±VS
Output Short Circuit Duration (Note 1) ............ Indefinite
Operating Temperature Range
LT1226C ................................................ 0°C to 70°C
Maximum Junction Temperature
Plastic Package .............................................. 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
ELECTRICAL CHARACTERISTICS
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AXI U
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ABSOLUTE
ORDER PART
NUMBER
TOP VIEW
NULL
1
8
NULL
–IN
2
7
V+
+IN
3
6
OUT
V–
4
5
NC
LT1226CN8
LT1226CS8
S8 PART MARKING
N8 PACKAGE
S8 PACKAGE
8-LEAD PLASTIC DIP 8-LEAD PLASTIC SOIC
1226
LT1226 PO01
VS = ±15V, TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 2)
IOS
Input Offset Current
IB
Input Bias Current
en
Input Noise Voltage
f = 10kHz
in
Input Noise Current
f = 10kHz
RIN
Input Resistance
VCM = ±12V
Differential
CIN
Input Capacitance
Input Voltage Range +
MIN
TYP
MAX
UNITS
0.3
1.0
mV
100
400
nA
4
8
µA
2.6
nV/√Hz
1.5
pA/√Hz
24
40
15
MΩ
kΩ
2
pF
12
14
V
Input Voltage Range –
– 13
– 12
V
CMRR
Common-Mode Rejection Ratio
VCM = ±12V
94
103
dB
PSRR
Power Supply Rejection Ratio
VS = ±5V to ±15V
94
110
dB
AVOL
Large Signal Voltage Gain
VOUT = ±10V, RL = 500Ω
50
150
V/mV
VOUT
Output Swing
RL = 500Ω
12.0
13.3
±V
IOUT
Output Current
VOUT = ±12V
24
40
mA
SR
Slew Rate
(Note 3)
250
400
V/µs
Full Power Bandwidth
10V Peak, (Note 4)
6.4
MHz
GBW
Gain Bandwidth
f = 1MHz
1
GHz
tr, tf
Rise Time, Fall Time
AVCL = + 25,10% to 90%, 0.1V
5.5
Overshoot
AVCL = +25, 0.1V
35
%
Propagation Delay
50% VIN to 50% VOUT
5.5
ns
Settling Time
10V Step, 0.1%, AV = – 25
100
ns
Differential Gain
f = 3.58MHz, AV = +25, RL = 150Ω
0.7
%
Differential Phase
f = 3.58MHz, AV = +25, RL = 150Ω
0.6
Deg
RO
Output Resistance
AVCL = +25, f = 1MHz
3.1
IS
Supply Current
ts
2
7
ns
Ω
9
mA
LT1226
ELECTRICAL CHARACTERISTICS VS = ±5V, TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 2)
IOS
Input Offset Current
IB
Input Bias Current
MIN
Input Voltage Range +
2.5
Input Voltage Range –
TYP
MAX
1.0
1.4
mV
100
400
nA
4
8
µA
4
UNITS
V
–3
–2.5
V
CMRR
Common-Mode Rejection Ratio
VCM = ±2.5V
94
103
dB
AVOL
Large Signal Voltage Gain
VOUT = ±2.5V, RL = 500Ω
VOUT = ±2.5V, RL = 150Ω
50
100
75
V/mV
V/mV
VOUT
Output Voltage
RL = 500Ω
RL = 150Ω
3.0
3.0
3.7
3.3
±V
±V
IOUT
Output Current
VOUT = ±3V
20
40
mA
SR
Slew Rate
(Note 3)
250
V/µs
Full Power Bandwidth
3V Peak, (Note 4)
13.3
MHz
GBW
Gain Bandwidth
f = 1MHz
700
MHz
tr, tf
Rise Time, Fall Time
AVCL = +25, 10% to 90%, 0.1V
8
ns
Overshoot
AVCL = +25, 0.1V
25
%
Propagation Delay
50% VIN to 50% VOUT
8
ns
ts
Settling Time
– 2.5V to 2.5V, 0.1%, AV = – 24
IS
Supply Current
60
ns
7
ELECTRICAL CHARACTERISTICS
9
mA
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
VS = ±15V, (Note 2)
VS = ± 5V, (Note 2)
MIN
Input VOS Drift
TYP
MAX
0.3
1.0
1.3
1.8
UNITS
mV
mV
µV/°C
6
IOS
Input Offset Current
VS = ±15V and VS = ± 5V
100
600
nA
IB
Input Bias Current
4
9
µA
CMRR
Common-Mode Rejection Ratio
VS = ±15V and VS = ± 5V
VS = ±15V, VCM = ±12V and VS = ± 5V, VCM = ± 2.5V
92
103
dB
PSRR
Power Supply Rejection Ratio
VS = ±5V to ±15V
92
110
dB
AVOL
Large Signal Voltage Gain
VS = ±15V, VOUT = ±10V, RL = 500Ω
VS = ±5V, VOUT = ±2.5V, RL = 500Ω
35
35
150
100
V/mV
V/mV
VOUT
Output Swing
VS = ±15V, RL = 500Ω
VS = ±5V, RL = 500Ω or 150Ω
12.0
3.0
13.3
3.3
±V
±V
IOUT
Output Current
VS = ±15V, VOUT = ±12V
VS = ±5V, VOUT = ±3V
24
20
40
40
mA
mA
SR
Slew Rate
VS = ±15V, (Note 3)
250
IS
Supply Current
VS = ±15V and VS = ± 5V
Note 1: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 2: Input offset voltage is tested with automated test equipment
in <1 second.
400
7
V/µs
10.5
mA
Note 3: Slew rate is measured between ±10V on an output swing of ±12V
on ±15V supplies, and ±2V on an output swing of ±3.5V on ±5V supplies.
Note 4: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πVp.
3
LT1226
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TYPICAL PERFOR A CE CHARACTERISTICS
Input Common Mode Range vs
Supply Voltage
8.0
20
10
+VCM
–VCM
5
OUTPUT VOLTAGE SWING (V)
15
7.5
7.0
6.5
6.0
0
5
0
10
15
5
0
20
10
15
Output Voltage Swing vs
Resistive Load
15
10
VS = ±5V
0
100
1k
4.5
110
3.5
–5
0
5
10
5
125
2
4.5
4.25
4.0
TEMPERATURE (°C)
3.5
–50
–25
0
25
50
75
100
125
LT1226 TPC06
Output Short Circuit Current vs
Temperature
VS = ±5V
50
45
40
SOURCE
SINK
35
30
25
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
LT1226 TPC07
10k
55
VS = ±15V
I +I
IB = B+ B–
3.75
100
1k
LOAD RESISTANCE (Ω)
OUTPUT SHORT CIRCUIT CURRENT (mA)
INPUT BIAS CURRENT (µA)
6
75
100
10
15
Input Bias Current vs Temperature
4.75
50
90
LT1226 TPC05
9
25
VS = ±5V
70
–10
5.0
0
100
80
VS = ±15V
–25
VS = ±15V
INPUT COMMON MODE VOLTAGE (V)
10
SUPPLY CURRENT (mA)
LT1226 TPC03
Open Loop Gain vs
Resistive Load
4.0
Supply Current vs Temperature
20
TA = 25°C
LT1226 TPC04
7
15
120
3.0
–15
10k
8
10
SUPPLY VOLTAGE (±V)
VS = ±15V
TA = 25°C
IB+ + IB–
IB =
2
LOAD RESISTANCE (Ω)
4
–50
5
0
OPEN LOOP GAIN (dB)
INPUT BIAS CURRENT (µA)
OUTPUT VOLTAGE SWING (Vp-p)
VS = ±15V
10
5
0
20
5.0
5
–VSW
Input Bias Current vs Input
Common Mode Voltage
TA = 25°C
∆VOS = 30mV
20
+VSW
10
LT1226 TPC02
LT1226 TPC01
25
15
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
30
TA = 25°C
RL = 500Ω
∆VOS = 30mV
TA = 25°C
TA = 25°C
∆VOS < 1mV
SUPPLY CURRENT (mA)
MAGNITUDE OF INPUT VOLTAGE (V)
20
4
Output Voltage Swing vs
Supply Voltage
Supply Current vs Supply Voltage
LT1226 TPC08
LT1226 TPC09
LT1226
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TYPICAL PERFOR A CE CHARACTERISTICS
Power Supply Rejection Ratio vs
Frequency
Input Noise Spectral Density
1.0
0.1
10
en
1
100
10
1k
100
80
–PSRR
+PSRR
60
40
0
100
0.01
100k
10k
10k
100k 1M
FREQUENCY (Hz)
1k
10M
FREQUENCY (Hz)
Voltage Gain and Phase vs
Frequency
100
60
VS = ±15V
VS = ±5V
40
30
20
6
OUTPUT SWING (V)
VOLTAGE GAIN (dB)
80
VS = ±5V
4
AV = –25
10M
AV = +25
0
–2
–4
AV = –25
–6
–10
VS = ±15V
TA = 25°C
AV = –25
34
C = 0pF
30
28
26
24
C = 1000pF
C = 500pF
22
18
20
0
60
80
40
SETTLING TIME (ns)
100
Slew Rate vs Temperature
500
450
FREQUENCY (Hz)
LT1226 TPC16
VS = ±15V
AV = –25
–SR
SLEW RATE (V/µs)
GAIN BANDWIDTH (MHz)
100M
100M
LT1226 TPC15
Gain Bandwidth vs Temperature
1.05
1.0
0.95
0.90
10M
10M
FREQUENCY (HZ)
1M
120
1.10
0.1
C = 100pF
C = 50pF
32
VS = ±15V
1
100M
10M
LTC1226 TPC14
VS = ±15V
TA = 25°C
AV = +25
1M
100k
1M
FREQUENCY (Hz)
20
1.15
100k
10k
LT1226 TPC12
AV = +25
–8
0
100M
100
OUTPUT IMPEDANCE (Ω)
1k
Frequency Response vs
Capacitive Load
2
Closed Loop Output Impedance vs
Frequency
0.01
10k
20
36
LT1226 TPC13
10
40
0
100M
VS = ±15
TA = 25°C
10mV SETTLING
8
PHASE MARGIN (DEGREES)
90
TA = 25°C
10
100
10k
100k 1M
1k
FREQUENCY (Hz)
60
38
10
VS = ±15V
50
80
Output Swing vs Settling Time
110
VS = ±15V
TA = 25°C
100
LT1226 TPC11
LT1226 TPC10
70
COMMON MODE REJECTION RATIO (dB)
100
120
VS = ±15V
TA = 25°C
VOLTAGE MAGNITUDE (dB)
in
POWER SUPPLY REJECTION RATIO (dB)
VS = ±15V
TA = 25°C
AV = +101
RS = 100kΩ
INPUT VOLTAGE NOISE (nV/√Hz)
INPUT VOLTAGE NOISE (nV/√Hz)
120
10
1000
Common Mode Rejection Ratio vs
Frequency
0.85
–50 –25
400
+SR
350
300
250
50
25
75
0
TEMPERATURE (˚C)
100
125
LT1226 TPC17
200
–50 –25
50
25
75
0
TEMPERATURE (˚C)
100
125
LT1226 TPC18
5
LT1226
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APPLICATI
S I FOR ATIO
The LT1226 may be inserted directly into HA2541, HA2544,
AD847, EL2020 and LM6361 applications, provided that
the amplifier configuration is a noise gain of 25 or greater,
and the nulling circuitry is removed. The suggested nulling
circuit for the LT1226 is shown below.
Small Signal, AV = +25
Small Signal, AV = – 25
Offset Nulling
V+
5k
1
3
+
8
7
LT1226
2
–
6
4
0.1µF
V–
LT1226 AI01
Layout and Passive Components
As with any high speed operational amplifier, care must be
taken in board layout in order to obtain maximum performance. Key layout issues include: use of a ground plane,
minimization of stray capacitance at the input pins, short
lead lengths, RF-quality bypass capacitors located close
to the device (typically 0.01µF to 0.1µF), and use of low
ESR bypass capacitors for high drive current applications
(typically 1µF to 10µF tantalum). Sockets should be
avoided when maximum frequency performance is
required, although low profile sockets can provide
reasonable performance up to 50MHz. For more details
see Design Note 50. Feedback resistors greater than 5kΩ
are not recommended because a pole is formed with the
input capacitance which can cause peaking. If feedback
resistors greater than 5kΩ are used, a parallel
capacitor of 5pF to 10pF should be used to cancel the input
pole and optimize dynamic performance.
Transient Response
The LT1226 gain bandwidth is 1GHz when measured at
1MHz. The actual frequency response in a gain of +25 is
considerably higher than 40MHz due to peaking caused by
a second pole beyond the gain of 25 crossover point. This
is reflected in the small signal transient response. Higher
noise gain configurations exhibit less overshoot as seen in
the inverting gain of 25 response.
6
LT1226 AI02
0.1µF
The large signal response in both inverting and noninverting gain shows symmetrical slewing characteristics. Normally the noninverting response has a much faster rising
edge due to the rapid change in input common mode
voltage which affects the tail current of the input differential pair. Slew enhancement circuitry has been added to
the LT1226 so that the falling edge slew rate is enhanced
which balances the noninverting slew rate response.
Large Signal, AV = +25
Large Signal, AV = – 25
LT1226 AI03
Input Considerations
Resistors in series with the inputs are recommended for
the LT1226 in applications where the differential input
voltage exceeds ±6V continuously or on a transient basis.
An example would be in noninverting configurations with
high input slew rates or when driving heavy capacitive
loads. The use of balanced source resistance at each input
is recommended for applications where DC accuracy
must be maximized.
Capacitive Loading
The LT1226 is stable with all capacitive loads. This is
accomplished by sensing the load induced output pole
and adding compensation at the amplifier gain node. As
the capacitive load increases, both the bandwidth and
phase margin decrease so there will be peaking in the
LT1226
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APPLICATI
S I FOR ATIO
frequency domain and in the transient response. The
photo of the small signal response with 1000pF load
shows 55% peaking. The large signal response with a
10,000pF load shows the output slew rate being limited by
the short circuit current.
AV = –25, CL = 1000pF
AV = +25, CL = 10,000pF
LT1226 AI04
The LT1226 can drive coaxial cable directly, but for best
pulse fidelity the cable should be doubly terminated with
a resistor in series with the output.
Compensation
configurations (i.e., in a gain of 1000 it will have a
bandwidth of about 1MHz). The amplifier is stable in a
noise gain of 25 so the ratio of the output signal to the
inverting input must be 1/25 or less. Straightforward gain
configurations of +25 or –24 are stable, but there are a few
configurations that allow the amplifier to be stable for
lower signal gains (the noise gain, however, remains 25 or
more). One example is the inverting amplifier shown in the
typical applications sections below. The input signal has a
gain of –RF/RIN to the output, but it is easily seen that this
configuration is equivalent to a gain of –24 as far as the
amplifier is concerned. Lag compensation can also be
used to give a low frequency gain less than 25 with a high
frequency gain of 25 or greater. The example below has a
DC gain of 6, but an AC gain of +31. The break frequency
of the RC combination across the amplifier inputs should
be at least a factor of 10 less than the gain bandwidth of the
amplifier divided by the high frequency gain (in this case
1/10 of 1GHz/31 or 3MHz).
The LT1226 has a typical gain bandwidth product of 1GHz
which allows it to have wide bandwidth in high gain
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TYPICAL APPLICATI
Cable Driving
S
+
VIN
Lag Compensation
R3
75 Ω
75Ω CABLE
LT1226
VOUT
–
+
VIN
200Ω
R4
75Ω
R1
1.2k
LT1226
VOUT
–
R2
50Ω
330pF
5k
LT1226 TA04
VOS Null Loop
LT1226 TA03
1k
AV = +6, f < 2MHz
300k
1
Compensation for Lower Closed-Loop Gains
+
VIN
RIN
VOUT
–
–
10k
LT1226
RC
8
LT1226
RF
VIN
300k
25k
100pF
10k
25Ω
VOUT
+
–
LT1097
LT1226 TA05
R
AV = – F ; RF ≥ 24 × (RIN || RC)
RIN
100pF
+
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
AV = 1001
LT1226 TA06
7
LT1226
W
W
SI PLIFIED SCHE ATIC
V+
7
NULL
1
8
BIAS 1
+IN
3
BIAS 2
2 –IN
6
V–
OUT
4
LT1226 SS
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead Plastic DIP
0.300 – 0.320
(7.620 – 8.128)
0.065
(1.651)
TYP
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
8
0.009 - 0.015
(0.229 - 0.381)
+0.025
0.325 –0.015
(
+0.635
8.255
–0.381
0.125
(3.175)
MIN
0.045 ± 0.015
(1.143 ± 0.381)
)
0.400
(10.160)
MAX
0.100 ± 0.010
(2.540 ± 0.254)
7
6
5
0.250 ± 0.010
(6.350 ± 0.254)
0.020
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
1
3
2
4
N8 1291
TJ MAX
θJA
150°C
130°C/W
S8 Package
8-Lead Plastic SOIC
0.010 – 0.020
× 45°
(0.254 – 0.508)
8
0°– 8° TYP
8
7
6
5
0.053 – 0.069
(1.346 – 1.753)
0.004 – 0.010
(0.102 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.016 – 0.050
0.406 – 1.270
0.189 – 0.197
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.198)
0.050
(1.270)
BSC
0.014 – 0.019
(0.356 – 0.483)
Linear Technology Corporation
0.150 – 0.157
(3.810 – 3.988)
TJ MAX
θJA
150°C
220°C/W
1
2
3
4
S8 1291
LT/GP 0692 10K REV 0
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1992