LINER LT1533C

LT1533
Ultralow Noise
1A Switching Regulator
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DESCRIPTION
FEATURES
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The LT ®1533 is a new class of switching regulator designed
to reduce conducted and radiated electromagnetic interference (EMI). Ultralow noise and EMI are achieved by providing
user control of the output switch slew rates. Voltage and
current slew rates can be independently programmed to
optimize switcher harmonic content versus efficiency. The
LT1533 can reduce high frequency harmonic power by as
much as 40dB with only minor losses in efficiency.
Greatly Reduced Conducted and Radiated EMI
(<100µVP-P in Typical Application)
Low Switching Harmonic Content
Independent Control of Switch Voltage and
Current Slew Rates
Two 1A Current Limited Power Switches
Regulates Positive and Negative Voltages
20kHz to 250kHz Oscillator Frequency
Easily Synchronized to External Clock
Wide Input Voltage Range: 2.7V to 23V
Low Shutdown Current: 12µA Typical
Easier Layout than with Conventional Switchers
Outputs Can Be Forced to 50% Duty Cycle for
Unregulated Applications
The LT1533 utilizes a dual output switch current mode
architecture optimized for low noise topologies. The IC
includes two 1A power switches along with all necessary
oscillator, control and protection circuitry. Unique error amp
circuitry can regulate both positive and negative voltages.
The internal oscillator may be synchronized to an external
clock for more accurate placement of switching harmonics.
Protection features include cycle by cycle current limit protection, undervoltage lockout and thermal shutdown.
Low minimum supply voltage and low supply current during
shutdown make the LT1533 well suited for portable applications. The part may also be forced into a 50% duty cycle mode
for unregulated applications. The LT1533 is available in the
16-pin narrow SO package.
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APPLICATIONS
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Precision Instrumentation Systems
Isolated Supplies for Industrial Automation
Medical Instruments
Wireless Communications
Single Board Data Acquisition Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
Low Noise 5V to 12V Forward Push-Pull DC/DC Converter
5V
+
33µF
11
3
820pF
4
5
16.9k
6
VIN
SHDN
COL A
DUTY
COL B
SYNC
PGND
CT
LT1533
RVSL
RT
RCSL
15k
0.015µF
10
VC
GND
NFB
9
8
1000pF
1N4148
T1
14
FB
L1
300µH
2
1N4148
B
+
15
Note 1
L2
33µH
C1
47µF
16V
A
+
12V Output Noise (BW = 100MHz)
12V
150mA
C2
33µF
20V
A
100µV/DIV
16
13
15k
12
15k
7
21.5k, 1%
<100µVP-P
B
2mV/DIV
1533 TA01
2.49k
1%
C1: SANYO OS-CON
C2: AVX TPS TANTALUM
L1: COILTRONICS CTX300-2
L2: COILCRAFT DT1608C-333
T1: COILTRONICS CTX02-13834
NOTE 1: 25nH TRACE INDUCTANCE
OR COILCRAFT B07T
2µs/DIV
1533 TA02
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LT1533
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Input Voltage (VIN) .................................................. 30V
Switch Voltage (COL A, COL B) ............................... 30V
SHDN Pin Voltage .................................................... 30V
Feedback Pin Current ............................................ 10mA
Negative Feedback Pin Current ............................ ±10mA
Storage Temperature Range ................. – 65°C to 150°C
Maximum Junction Temperature ......................... 125°C
Operating Junction Temperature Range
LT1533C ............................................... 0°C to 100°C
LT1533I ............................................ – 40°C to 100°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
TOP VIEW
NC 1
16 PGND
COL A 2
15 COL B
DUTY 3
14 VIN
SYNC 4
13 RVSL
CT 5
12 RCSL
RT 6
11 SHDN
FB 7
10 VC
NFB 8
9
LT1533CS
LT1533IS
GND
S PACKAGE
16-LEAD NARROW PLASTIC SO
TJMAX = 125°C, θJA = 100°C/ W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
VIN = 5V, VC = 0.9V, VFB = VREF. COL A, COL B, SHDN, NFB, DUTY pins open, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Supply and Protection
VIN
Recommended Operating Range
●
VIN(MIN)
Minimum Input Voltage
●
IVIN
Supply Current
2.7V ≤ VIN ≤ 23V, RVSL, RCSL, RT = 17k
IVIN(OFF)
Shutdown Supply Current
2.7V ≤ VIN ≤ 23V, VSHDN = 0V
VSHDN
Shutdown Threshold
2.7V ≤ VIN ≤ 23V
●
ISHDN
Shutdown Input Current
2.7
23
V
2.55
2.7
V
●
12
18
mA
●
12
30
µA
0.8
1.2
V
0.4
µA
–2
Error Amplifiers
VREF
Reference Voltage
Measured at Feedback Pin
●
1.235
1.215
1.250
1.250
1.265
1.275
V
V
IFB
Feedback Input Current
VFB = VREF
●
250
900
nA
FBREG
Reference Voltage Line Regulation
2.7V ≤ VIN ≤ 23V
●
0.003
0.03
%/V
VNFR
Negative Feedback Reference Voltage
Measured at Negative Feedback Pin with
Feedback Pin Open
●
– 2.550
– 2.500
– 2.420
INFR
Negative Feedback Input Current
VNFB = VNFR
●
– 37
– 25
NFBREG
Negative Feedback Reference Voltage
Line Regulation
2.7V ≤ VIN ≤ 23V
●
2
0.002
V
µA
0.05
%/V
LT1533
ELECTRICAL CHARACTERISTICS
VIN = 5V, VC = 0.9V, VFB = VREF. COL A, COL B, SHDN, NFB, DUTY pins open, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
gm
Error Amplifier Transconductance
∆IC = ±25µA
MIN
TYP
MAX
UNITS
1100
700
1500
●
1900
2300
µmho
µmho
IESK
Error Amplifier Sink Current
VFB = VREF + 150mV, VC = 0.9V, VSHDN = 1V
●
120
200
350
µA
IESRC
Error Amplifier Source Current
VFB = VREF – 150mV, VC = 0.9V, VSHDN = 1V
●
120
200
350
µA
VCLH
Error Amplifier Clamp Voltage
High Clamp, VFB = 1V
1.33
V
VCLL
Error Amplifier Clamp Voltage
Low Clamp, VFB = 1.5V
0.1
V
AV
Error Amplifier Voltage Gain
250
V/V
250
kHz
180
Oscillator and Sync
f MAX
Maximum Switch Frequency
f SYNC
Synchronization Frequency Range
RSYNC
SYNC Pin Input Resistance
VFBfs
FB Pin Threshold for Frequency Shift
fOSC = 250kHz
375
●
5% Reduction from Nominal
kHz
40
kΩ
0.4
V
45.5
50.0
%
%
200
ns
Output Switches
DCMAX
Maximum Switch Duty Cycle
tIBL
Switch Current Limit Blanking Time
DUTY Pin Open, RVSL = RCSL = 4.9k, fOSC = 25kHz
DUTY Pin Grounded, Forced 50% Duty Cycle
●
BV
Output Switch Breakdown Voltage
2.7V ≤ VIN ≤ 23V
●
RON
Output Switch-On Resistance
ICOL A or ICOL B = 0.75A
●
ILIM(MAX)
Maximum Current Limit
Short-Circuit Current Limit
Duty Cycle = 15%
Duty Cycle = 40%
25
1
0.8
∆IIN/∆ISW Supply Current Increase During
Switch-On Time
VDUTYTH
44
30
0.85
Ω
1.25
1.8
A
A
16
DUTY Pin Threshold
V
0.5
mA/A
0.35
Slew Control
VSLEWR
Output Voltage Slew Rising Edge
Either A or B, RVSL, RCSL = 17k
11
V/µs
VSLEWF
Output Voltage Slew Falling Edge
Either A or B, RVSL, RCSL = 17k
14.5
V/µs
ISLEWR
Output Current Slew Rising Edge
Either A or B, RVSL, RCSL = 17k
1.3
A/µs
ISLEWF
Output Current Slew Falling Edge
Either A or B, RVSL, RCSL = 17k
1.3
A/µs
The ● denotes specifications that apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1533 is designed to operate over the junction temperature
range of – 4 0°C to 125°C, but is neither tested nor guaranteed beyond 0°C
to 100°C for C grade or – 40°C to 100°C for I grade.
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LT1533
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TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage vs
Temperature
Change in ILIM vs DC
0.7
–50
0.6
25°C
–100
2.60
∆ILIM (mA)
2.55
125°C
–150
–200
2.50
–300
25 50 75 100 125 150
0
JUNCTION TEMPERATURE (°C)
0
0
10
20
30
DUTY CYCLE (%)
40
50
1.8
–2.35
1.28
1.6
1.27
1.4
1.2
VFB
1.0
1.24
0.8
0.6
IFB
1.22
0.4
1.21
0.2
1.20
–50 –25
0
0
25 50 75 100 125 150
TEMPERATURE (°C)
30
VNFB
–2.45
–2.50
25
–2.55
–2.60
20
INFB
–2.65
–2.70
–50 –25
0
15
25 50 75 100 125 150
TEMPERATURE (°C)
1800
1700
1600
1500
1400
1300
1200
1100
1000
–50 –25
ERROR AMPLIFIER OUTPUT (µA)
40
20
0.6
1533 G07
4
75
100 125 150
1.6
300
200
100
1.4
–40°C
125°C
25°C
0
–100
–200
VC PIN CLAMP
VOLTAGE
1.2
1.0
0.8
0.6
0.4
–300
VC PIN
THRESHOLD
0.2
–400
0
50
VC Pin Threshold and Clamp
Voltage vs Temperature
400
60
25
1533 G06
500
80
0
TEMPERATURE (°C)
Error Amplifier Output Current
100
gm = ∆IVC /∆VFB
1533 G05
120
1.0
2000
1900
–2.40
Switching Frequency vs
Feedback Pin Voltage
0.1
0.3
0.4
0.5
0.2
FEEDBACK PIN VOLTAGE (V)
0.4
0.8
0.6
SWITCH CURRENT (A)
Error Amplifier Transconductance
vs Temperature
35
1533 G04
0
0.2
1533 G03
TRANSCONDUCTANCE (mho)
1.29
NEGATIVE FEEDBACK VOLTAGE (V)
–2.30
1.23
0
NFB INPUT CURRENT (µA)
2.0
FEEDBACK INPUT CURRENT (µA)
FEEDBACK VOLTAGE (V)
0.2
Negative Feedback Voltage and
Input Current vs Temperature
1.30
1.25
25°C
0.3
1533 G02
Feedback Voltage and Input
Current vs Temperature
1.26
85°C
0.1
1533 G01
SWITCHING FREQUENCY (% TYPICAL)
0.4
–250
2.45
–50 –25
125°C
0.5
VC PIN VOLTAGE (V)
INPUT VOLTAGE (V)
2.65
Switch Voltage Drop
0
SWITCH VOLTAGE (V)
2.70
–500
–400 –300 –200 –100 0 100 200 300 400
FEEDBACK PIN VOLTAGE FROM NOMINAL (mV)
1533 G08
0
–50 –25
0
25
50
75
100 125
TEMPERATURE (°C)
1533 G09
LT1533
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PIN FUNCTIONS
COL A, COL B (Pins 2, 15): These are the output collectors
of the power switches. Their emitters return to PGND
through a common sense resistor. COL A and
COL B are alternately turned on out of phase. Large
currents flow into these pins so it is desirable to keep
external trace lengths short to minimize radiation. The
collectors can be tied together for simple boost applications.
DUTY (Pin 3): Tying the DUTY pin to ground will force the
outputs to switch with a 50% duty cycle. The DUTY pin
must float if not used.
SYNC (Pin 4): The SYNC pin can be used to synchronize
the oscillator to an external clock (see Oscillator Sync in
Applications Information section for more details). The
SYNC pin may either be floated or tied to ground if not
used.
CT (Pin 5): The oscillator capacitor pin is used in conjunction with RT to set the oscillator frequency. For RT = 16.9k,
CT(NF) = 129/fOSC(kHz)
RT (Pin 6): The oscillator resistor pin is used to set the
charge and discharge currents of the oscillator capacitor.
The nominal value is 16.9k. It is possible to adjust this
resistance ±25% to get a more accurate oscillator frequency.
FB (Pin 7): The feedback pin is used for positive voltage
sensing and oscillator frequency shifting during start-up
and short-circuit conditions. It is the inverting input to the
error amplifier. The noninverting input of this amplifier
connects internally to a 1.25V reference. This pin should
be left open if not used.
NFB (Pin 8): The negative voltage feedback pin is used for
sensing a negative output voltage. The pin is connected to
the inverting input of the negative feedback amplifier
through a 100k source resistor. The negative feedback
amplifier provides a gain of – 0.5 to the feedback amplifier.
The nominal regulation point would be – 2.5V on NFB. This
pin should be left open if not used.
GND (Pin 9): Signal Ground. The internal error amplifier,
negative feedback amplifier, oscillator, slew control circuitry and the bandgap reference are referred to this
ground. Keep the connection to the feedback divider and
VC compensation network free of large ground currents.
VC (Pin 10): The compensation pin is used for frequency
compensation and current limiting. It is the output of the
error amplifier and the input of the current comparator.
Loop frequency compensation can be performed with an
RC network connected from the VC pin to ground.
SHDN (Pin 11): The shutdown pin is used for disabling the
switcher. Grounding this pin will disable all internal circuitry. Normally this output can be tied high (to VIN) or may
be left floating.
RCSL (Pin 12): A resistor to ground sets the current slew
rate for the collectors A and B. The minimum resistor value
is 3.9k and the maximum value is 68k. Current slew will be
approximately:
ISLEW(A/µs) = 33/RCSL(kΩ)
RVSL (Pin 13): A resistor to ground sets the voltage slew
rate for the collectors A and B. The minimum resistor value
is 3.9k and the maximum value is 68k. Voltage slew will be
approximately:
VSLEW(V/µs) = 220/RVSL(kΩ)
VIN (Pin 14): Input Supply Pin. Bypass this pin with a
≥ 4.7µF low ESR capacitor. When VIN is below 2.55V the
part will go into undervoltage lockout where it will stop
output switching and pull the VC pin low.
PGND (Pin 16): Power Switch Ground. This ground comes
from the emitters of the power switches. In normal operation this pin should have approximately 25nH inductance
to ground. This can be done by trace inductance (approximately 1") or with wire or a specific inductive component.
This inductance ensures stability in the current slew
control loop during turn-off. Too much inductance (>50nH)
may produce oscillation on the output voltage slew edges.
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LT1533
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BLOCK DIAGRA
SHDN
VIN
PGND COL A
COL B
VC
LDO REGULATOR
+
NEGATIVE
FEEDBACK
AMP
INTERNAL VCC
–
100k
+
OUTPUT
DRIVERS
50k
NFB
–
–
–
FB
RVSL
SLEW CONTROL
gm
ERROR
+ AMP
+
RCSL
COMP
+
S
1.25V
Q
FF
R
RT
OSCILLATOR
CT
Q
T
SYNC
FF
BK
QB
GND
DUTY
1533 BD
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OPERATIO
In noise sensitive applications, switching regulators tend
to be ruled out as a power supply option due to their
propensity for generating unwanted noise. When switching supplies are required due to efficiency or input/output
voltage constraints, great pains must be taken to work
around the noise generated by a typical supply. These
steps may include precise synchronization of the power
supply oscillator to an external clock, synchronizing the
rest of the circuit to the power supply oscillator, or halting
power supply switching during noise sensitive operations.
The LT1533 greatly simplifies the task of eliminating
supply noise by enabling the design of an inherently low
noise switching regulator power supply.
The LT1533 is a fixed frequency, current mode switching
regulator with unique circuitry to control the voltage and
current slew rates of the output switches. Slew control
capability provides much greater control over power sup-
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ply components that can create conducted and radiated
electromagnetic interference. The current mode control
provides excellent AC and DC line regulation and simplifies
loop compensation.
Current Mode Control
A switching cycle begins with an oscillator discharge pulse
which resets the RS flip-flop, turning on one of the output
drivers (refer to Block Diagram). The switch current is
sensed across an internal resistor and the resulting voltage is amplified and compared to the output of the error
amplifier (VC pin). The driver is turned off once the output
of the current sense amplifier exceeds the voltage on the
VC pin. The toggle flip-flop ensures that the two output
drivers are enabled on alternate clock cycles. Internal
slope compensation is provided to ensure stability under
high duty cycle conditions.
LT1533
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OPERATIO
Output regulation is obtained using the error amp to set
the switch current trip point. The error amp is a transconductance amplifier that integrates the difference between
the feedback output voltage and an internal 1.25V reference. The output of the error amp adjusts the switch
current trip point to provide the required load current at
the desired regulated output voltage. This method of
controlling current rather than voltage provides faster
input transient response, cycle by cycle current limiting
for better output switch protection and greater ease in
compensating the feedback loop.
The VC pin serves three different purposes. It is used for
loop compensation, current limit adjustment and soft
starting. During normal operation the VC voltage will be
between 0.2V and 1.33V. An external clamp may be used
for lowering the current limit. A capacitor coupled to an
external clamp can be used for soft starting.
The negative voltage feedback amplifier allows for direct
regulation of negative output voltages. The voltage on the
NFB pin gets amplified by a gain of – 0.5 and driven onto
the FB input, i.e., the NFB pin regulates to – 2.5V while the
amplifier output internally drives the FB pin to 1.25V as in
normal operation. The negative feedback amplifier input
impedance is 100k (typ) referred to ground.
Slew Control
Control of output voltage and current slew rates is done via
two feedback loops. One loop controls the output switch
collector voltage dV/dt and the other loop controls the
emitter current dI/dt. Output slew control is achieved by
comparing the currents generated by these two slewing
events to currents created by external resistors RVSL and
RCSL. The two control loops are combined internally to
provide a smooth transition from current slew control to
voltage slew control.
Internal Regulator
Most of the control circuitry operates from an internal 2.4V
low dropout regulator that is powered from VIN. The
internal low dropout design allows VIN to vary from 2.7V
to 23V with virtually no change in device performance.
When the part is put into shutdown, the internal regulator
is turned off, leaving only a small (12µA typ) current drain
from VIN.
Protection Features
There are three modes of protection in the LT1533. The
first is overcurrent limit. This is achieved via the clamping
action of the VC pin. The second is thermal shutdown that
disables both output drivers and pulls the VC pin low in the
event of excessive chip temperature. The third is undervoltage lockout that also disables both outputs
and pulls the VC pin low whenever VIN drops below 2.5V.
50% Duty Cycle Mode
Since the LT1533 has dual out-of-phase outputs, it is ideal
for driving push-pull transformers. For simple DC transformer applications, the part can be forced into a 50% duty
cycle mode using the DUTY pin. Grounding the DUTY pin
will override the internal control circuitry and force the
outputs to switch with a 50% duty cycle at one-half the
oscillator frequency. Slew control also applies in the 50%
duty cycle mode.
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APPLICATIONS INFORMATION
Reducing EMI from switching power supplies has traditionally invoked fear in designers. Many switchers are
designed solely on efficiency and as such produce waveforms filled with high frequency harmonics that then
propagate through the rest of the power supply.
The LT1533 provides control over two of the more important variables for controlling EMI with switching inductive
loads: switch voltage slew rate and switch current slew
rate. The use of this part will reduce noise and EMI over
conventional switch mode controllers. Because these
variables are under control, a supply built with this part will
exhibit far less tendency to create EMI and less chance of
wandering into problems during production.
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LT1533
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APPLICATIONS INFORMATION
It is beyond the scope of this data sheet to get into EMI
fundamentals. AN70 contains much information concerning noise in switching regulators and should be consulted.
them, 2) the oscillator will control the placement of output
frequency harmonics which can aid in specific problems
where you might be trying to avoid a certain frequency
bandwidth that is used for detection elsewhere.
Oscillator Frequency
The oscillator determines the switching frequency and
therefore the fundamental positioning of all harmonics.
The use of good quality external components is important
to ensure oscillator frequency stability. The oscillator is a
sawtooth design. A current defined by external resistor RT
is used to charge and discharge the capacitor CT. The
discharge rate is approximately ten times the charge rate.
By allowing the user to have control over both components, trimming of oscillator frequency can be more easily
achieved.
The external capacitance CT is chosen by:
CT(nF) = 2180/[fOSC(kHz) • RT(kΩ)]
where fOSC is the desired oscillator frequency in kHz.
For RT equal to 16.9k, this simplifies to:
CT(nF) = 129/fOSC(kHz),
e.g., CT = 1.29nF for fOSC = 100kHz
Nominally RT should be 16.9k. Since it sets up current, its
temperature coefficient should be selected to compliment
the capacitor. Ideally, both should have low temperature
coefficients.
When the DUTY pin is high or floating, the outputs will be
turned off during the discharge time of the oscillator. Due
to slew rate control, turning off the outputs does not
produce immediate transitions. Turn-off will require the
current to ramp down and the switch voltage to ramp up.
If the DUTY pin is grounded, then the outputs will turn on
or off starting with the clock discharge.
If the FB pin is below 0.4V the oscillator discharge time will
increase, causing the oscillation frequency to decrease by
approximately 6:1. This feature helps minimize power
dissipation during start-up and short-circuit conditions.
Oscillator frequency is important for noise reduction in
two ways: 1) the lower the oscillator frequency the lower
the harmonics of waveforms are, making it easier to filter
8
Oscillator Sync
If a more precise frequency is desired (e.g., to accurately
place harmonics) the oscillator can be synchronized to an
external clock. Set the RC timing components for an
oscillator frequency 10% lower than the desired sync
frequency.
Drive the SYNC pin with a square wave (with greater than
1.4V amplitude). The rising edge of the sync square wave
will initiate clock discharge. The sync pulse should have a
minimum pulse width of 0.5µs.
Be careful in sync’ing to frequencies much different from
the part since the internal oscillator charge slope determines slope compensation. It would be possible to get into
subharmonic oscillation if the sync doesn’t allow for the
charge cycle of the capacitor to initiate slope compensation. In general, this will not be a problem until the sync
frequency is greater than 1.5 times the oscillator free-run
frequency.
Slew Rate Setting
Setting the voltage and current slew rates is easy. External
resistors to ground on the RVSL and RCSL pins determine
the slew rates. Determining what slew rate to use is more
difficult. There are several ways to approach the problem.
First, start by putting a 50k resistor pot with a 3.9k series
resistance on each pin. In general, the next step will be to
monitor the noise that you are concerned with. Be careful
with measurement technique (consult AN70). Keep probe
ground leads very short.
Usually it will be desirable to keep the voltage and current
slew resistors approximately the same. There are circumstances where a better optimization can be found by
adjusting each separately, but as these values are separated further, a loss of independence of control will occur.
Starting from the lowest resistor setting adjust the pots
until the noise level meets your guidelines. Note that
LT1533
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APPLICATIONS INFORMATION
slower slewing waveforms will dissipate more power so
that efficiency will drop. You can also monitor this as you
make your slew adjustment by measuring input and output voltage and current.
It is possible to use a single slew setting resistor. In this
case the RVSL and RCSL pins are tied together. A resistor
with a value of 2k to 34k (one half the individual resistors)
can then be tied from these pins to ground.
Emitter Inductance
internal regulator voltage (2.4V typ), output regulation
may be disrupted. A series resistance with the feedback
pin can eliminate this potential problem.
Negative Output Voltage Setting
Negative output voltage can be sensed using the NFB pin.
In this case regulation will occur when the NFB pin is at
– 2.5V. The input bias current for the NFB is –25µA (INFB)
which needs to be accounted for in setting up the divider.
Referring to Figure 2, R1 is chosen such that:
A small inductance in the power ground minimizes a
potential dip in the output current falling edge that can
occur under fast slewing, 25nH is usually sufficient. Greater
than 50nH may produce unwanted oscillations in the
voltage output. The inductance can be created by wire or
board trace with the equivalent of one inch of straight
length. A spiral board trace will require less length.
 VOUT − 2.5 
R1 = R2 

 2.5 + R2 • 25µA 


R1
–VOUT
NFB PIN
INFB
R2
Positive Output Voltage Setting
1533 F02
Sensing of a positive output voltage is usually done using
a resistor divider from the output to the FB pin. The
positive input to the error amp is connected internally to a
1.25V bandgap reference. The FB pin will regulate to this
voltage.
R1
VOUT
FB PIN
R2
1533 F01
Figure 1
Referring to Figure 1, R1 is determined by:
V

R1 = R2 OUT − 1
 1.25 
The FB bias current represents a small error and can
usually be ignored for values of R1|| R2 up to 10k.
One word of caution. Sometimes a feedback zero is added
to the control loop by placing a capacitor across R1 above.
If the feedback capacitively pulls the FB pin above the
Figure 2
A suggested value for R2 is 2.5k. The NFB pin is normally
left open if the FB pin is being used.
Dual Polarity Output Voltage Sensing
Certain applications may benefit from sensing both positive and negative output voltages. When doing this each
output voltage resistor divider is individually set as previously described. When both FB and NFB pins are used, the
LT1533 will act to prevent either output from going
beyond its set output voltage. The highest output (lightest
load) will dominate control of the regulator. This technique
would prevent either output from going unregulated high
at no load. However, this technique will also compromise
output load regulation.
Shutdown
If the shutdown pin is pulled low, the regulator will turn off.
The supply current will be reduced to less than 20µA.
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Thermal Considerations
Computing power dissipation for this IC requires careful
attention to detail. Reduced output slewing causes the part
to dissipate more power than would occur with fast edges.
However, much improvement in noise can be produced
with modest decrease in supply efficiency.
Power dissipation is a function of topology, input voltage,
switch current and slew rates. It is impractical to come up
with an all-encompassing formula. It is therefore recommended that package temperature be measured in each
application. The part has an internal thermal shutdown to
prevent device destruction, but this should not replace
careful thermal design.
where ∆I is the ripple current in the switch, RCSL and
RVSL are the slew resistors and fOSC is the oscillator
frequency.
Power dissipation PD is the sum of these three terms. Die
junction temperature is then computed as:
TJ = TAMB + (PD)(θJA)
where TAMB is ambient temperature and θJA is the package
thermal resistance. For the 16-pin SO θJA is 100°C/W.
For example, with fOSC = 40kHz, VIN = 10V, 0.4A average
current and 0.1A of ripple, the maximum duty cycle is
44%. Assume slew resistors are both 17k and VSAT is
0.26V, then:
PD = 0.176W + 0.094W + 0.158W = 0.429W
1. Dissipation due to input current:

I 
PVIN = VIN11mA + 
60 

In an S16 package the die junction temperature would be
43°C above ambient.
where I is the average switch current.
Frequency Compensation
2. Dissipation due to the drivers saturation:
PVSAT = (VSAT)(I)(DCMAX)
where VSAT is the output saturation voltage which is
approximately 0.1 + (0.4)(I), DCMAX is the maximum
duty cycle.
3. Dissipation due to output slew using approximations
for slew rates:


2


2
2
 V I2 + ∆I

 VIN − VSAT 
I

 IN 

4 

4 



PSLEW = 
RCSL +
RVSL  fOSC


 9
220  109 
 33  10 

 




( )
( )
( )
()
( )
(
)( )
Note if VSAT and ∆I are small with respect to VIN and I,
then:
()( ) ( )(
( )
( )


VIN R VSL 
 I RCSL
PSLEW = 
+
fOSC VIN I
9
9 
 33  10  220  10  


10
) ( )( )()
Loop frequency compensation is accomplished by way of
a series RC network on the output of the error amplifier (VC
pin). Referring to Figure 3, the main pole is formed by
capacitor CVC and the output impedance of the error
amplifier (approximately 400kΩ). The series resistor RVC
creates a “zero” which improves loop stability and transient response. A second capacitor CVC2, typically onetenth the size of the main compensation capacitor, is
sometimes used to reduce the switching frequency ripple
on the VC pin. VC pin ripple is caused by output voltage
ripple attenuated by the output divider and multiplied by
the error amplifier. Without the second capacitor, VC pin
ripple is:
VC PIN RIPPLE =
(1. 25)(VRIPPLE)(gm)(RVC)
VOUT
where VRIPPLE = Output ripple (VP-P)
gm = Error amplifier transconductance
RVC = Series resistor on VC pin
VOUT = DC output voltage
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VC PIN
RVC
2k
turns ratio of the transformer. The turns ratio must be
large enough to ensure that the transformer can put out a
voltage equal to the output voltage plus the diode under
minimum input conditions.
CVC2
4.7nF
CVC
0.01µF
1533 F03
Figure 3
N=
To prevent irregular switching, VC pin ripple should be
kept below 50mVP-P. Worst-case VC pin ripple occurs at
maximum output load current and will also be increased if
poor quality (high ESR) output capacitors are used. The
addition of a 0.0047µF capacitor on the VC pin reduces
switching frequency ripple to only a few millivolts. A low
value for RVC will also reduce VC pin ripple, but loop phase
margin may be inadequate.
VOUT + VF
Design of magnetics is dependent on topology. The following details the design of the magnetics for a push-pull
converter. In this converter the transformer usually stores
little energy. The following equations should be considered as the starting point to building a prototype.
T1
1:N
DS1
VSEC
LO
VOUT
+
VIN
DS2
CO
Q1A
1533 F04
Q1B
Figure 4
The following definitions will be used:
VIN = Input supply voltage
VSW = Switch-on voltage
VOUT = Desired output voltage
IOUT = Output current
f = Oscillator frequency
VF = Forward drop of the rectifier
Duty cycle is the major defining equation for this topology.
Note that the output L and C basically filter the chopped
voltage so duty cycle controls output voltage. N is the
)
DCMAX is the maximum duty cycle of each driver with
respect to the entire cycle which consists of two periods
(Q1A on and Q1B on). So the effective duty cycle is
2 • DCMAX. The controller, in general, determines maximum duty cycle. A 44% maximum duty cycle is a guaranteed value for this part.
Some Common Turns Ratios
VIN
Magnetics
(
2 • DCMAX VIN(MIN) − VSW
VOUT
N
5 ±10%
12
3.6
5 ±10%
15
4.4
5 ±10%
3.3
1.1
Remember to add sufficient margin in the turns ratio to
account for IR drops in the transformer windings, worstcase diode forward drop (VF) and switch-on voltage (VSW).
There are a number of ways to choose the inductance
value for LO. We suggest as a starting point that LO be
selected such that the converter is continuous at
IOUT(MAX)/4. If your minimum IOUT is higher than this, or
you are operating at low currents such that the IC and
components can handle higher peak currents, then use a
higher number.
Continuous operation occurs when the current in the
inductor never goes to zero. Discontinuous operation
occurs when the inductor current drops to zero before the
start of the next cycle and can occur with small inductors
and light loads. There is nothing inherently bad about
discontinuous operation, however, the converter control
and operation is somewhat different. The inductor is
smaller for discontinuous operation but the peak currents
in the switch, the transformer, the diodes, inductor and
capacitor will be higher. But for low power situations these
may not present a big constraint.
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For continuous operation the inductor ripple current must
be less than twice the output current. The worst case for
this is at maximum input (lowest DC) but we will evaluate
at nominal input since the IOUT/4 is somewhat arbitrary.
Note when both inputs are off, inductor current splits
between outputs and the diode common goes to 0V.
Looking at the inductor current during off time, output
ripple current is:
∆IOUT = 2 • IOUT(MIN)
ISW(PEAK) = N • ILMAX + ∆IMAG
This should be less than the 1A current limit.
In the push-pull converter the maximum switch voltage
will be 2 • (VIN – VSW) plus a small amount (10%) for
leakage spikes. Because voltage is slew-controlled, the
spikes will be less than normal. So, maximum switch
voltage is:
VSW(MAX) = 2 • VIN • 1.1
IOUT(MIN) = IOUT(MAX)/4
LO =
and the peak current in the switch is:
(
This should be below the maximum rated switch voltage.
)
VOUT 1 − 2 • DCNOM
∆IOUT • f
So, given the turns ratio, primary inductance and current,
the transformer can be designed. As an example:
The inductance of the transformer primary should be such
that LO, when reflected into the primary, dominates the
input current. In other words, we want the magnetizing
current of the transformer small with respect to the
current going through the transformer to LO. In general,
then, the inductance of the primary should be at least five
times that of LO. This ensures that most of the power will
be passed through the transformer to the load. It also
increases the power capability of the converter and
reduces the peak currents that the switch will see.
LPRI = 5 • LO /N2
VIN = 5V ±10%, VOUT = 12V, IOUT(MAX) = 150mA,
VSW = 0.5V, VF = 0.5V, f = 50kHz,
N=
12 + 0.5
(2 • 0.44)(4.5 − 0.5)
Round up so N = 3.6.
For continuous operation at IOUT(MIN) = IOUT(MAX)/4,
inductor ripple is:
∆IOUT = 2 •
If the magnetizing current is below 100mA, then a smaller
LO can be used.
150mA
= 75mA
4
The duty cycle for nominal input is:
With the value of LO set, the ripple in the inductor is:
∆IOUT =
(
DCNOM =
)
VOUT 1 − 2 • DC
LO • f
=
However, the peak inductor current is evaluated at maximum load and maximum input voltage (minimum DC).
ILMAX = IOUT(MAX ) +
∆IOUT(MAX )
2
The magnetizing ripple current can be shown to be:
V
+V
∆IMAG = OUT F
N • LPRI • f
12
= 3.55
(
VOUT + VF
(2 • N)(VIN(NOM) − VSW)
12 + 0.5
)(
)
2 • 3.6 5 − 0.5
LO(MIN) =
(
= 38.6%
) = 730µH
12 1 − 2 • 38.6%
75mA • 50kHz
Off-the-shelf components can be used for this inductor.
Say we found an 800µH inductor (Coiltronics CTX200-1
for instance).
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Output ripple current at maximum input (DC = 34.7%) is:
∆IOUT =
(
) = 92mA
12 1 − 2 • 34.7%
800µH • 50kHz
The maximum inductor current is:
ILMAX = 150mA +
92mA
= 196mA
2
Primary inductance should be greater than:
LPRI =
5 • 800µH
3.62
= 309µH
The magnetizing ripple current is approximately:
12 + 0.5
∆IMAG =
= 225mA
3.6 • 309µH • 50kHz
Peak switch current is:
ISW(PEAK) = 3.6 • 196mA + 225mA = 930mA
which is less than the 1A maximum switch current.
Note that you can discern your magnetizing ripple by
looking at the reflected inductance ripple and subtracting
the switch current ripple.
∆IMAG = N • ∆IL – ∆ISW
NOMINAL
INPUT
VOLTAGE
NOMINAL
OUTPUT VOLTAGE
AFTER LINEAR
REGULATOR
OUTPUT
POWER
COILTRONICS
PART
NUMBER
CONNECTION
DIAGRAM
5V
12V
1.5W
CTX02-13716-X1
A
5V
12V
3.0W
CTX02-13665-X1
A
5V
±15V
1.5W
CTX02-13713-X1
B
5V
±15V
3.0W
CTX02-13664-X1
B
5V
12V
1.5W
CTX02-13834-X3*
A
5V
12V
10W
CTX02-13949-X1
A
A
2
B
12
PRIMARY A
3
SECTION A
10
2
PRIMARY A
12
SECTION A
3
10
4
9
4
9
PRIMARY B
SECTION B
PRIMARY B
SECTION B
5
7
5
7
TIE OUTPUT
COMMON TO
THIS POINT
= TIED TOGETHER
*=HIGH TURNS RATIO VERSION OF CTX-02-13716-X1.
ACCOMMODATES LOW SUPPLY VOLTAGES OR
HIGH DROPOUT REGULATORS
1533 F05
Figure 5. Transformers for Typical Applications
for capacitance. However, noise depends more on the ESR
of the capacitors.
Input capacitors must also withstand surges that occur
during the switching of some types of loads. Some solid
tantalum capacitors can fail under these surge conditions.
Design Note 95 offers more information but the following
is a brief summary of capacitor types and attributes.
With knowledge of turns ratio and primary inductance
along with volt/sec requirements (to prevent saturation)
the transformer can be designed.
Aluminum Electrolytic: Low cost and higher voltage but in
general don’t use with this part because of high ESR and
poor high frequency performance.
Transformers are available from Coiltronics for some
standard applications. Figure 5 lists them. Variations are
available from Coiltronics at 561-241-7876. Also, see
Linear Technology’s Application Notes AN19, AN44 and
AN70 for further information about magnetics.
Specialty Polymer Aluminum: Panasonic has come out
with their series CD capacitors. While they are only available for voltages below 16V, they have very low ESR and
good surge capability.
Capacitors
Solid Tantalum: Small size and low impedance. Typically
available for voltages below 50V. Possible problem with
surge currents (AVX TPS line addresses this issue).
Correct choice of input and output capacitors can be very
important to low noise switcher performance. Push-pull
topologies and other low noise topologies will in general
have continuous currents which reduce the requirements
OS-CON: Lower impedance than aluminum but only available for 25V or less. Form factor may be a problem.
Sometimes their very low ESR can cause loop stability
problems.
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Ceramic: Generally used for high frequency and high
voltage bypass. If all ceramic capacitors are used, they can
have such a low ESR as to cause loop stability problems.
Often they can resonate with their ESL before ESR becomes effective.
Table 1
CAPACITOR
E CASE
AVX TPS, Sprague 593D
AVX TAJ
0.7 to 0.9
D CASE
AVX TPS, Sprague 593D
0.1 to 0.3
AVX TAJ
0.9 to 2.0
Input Capacitor
The requirements for the input capacitor are less stringent
for this part. Input current ripple is lower because of the
push-pull action and low noise features of the part. However, the input capacitor should have low ESR at high
frequencies since this will be an important factor concerning how much conducted noise is created. Values of input
capacitor will typically be in the 1µF to 22µF range with
ESR under 0.3Ω.
The input capacitor can see a high surge current when a
battery of high capacitance source is connected “live.”
Some solid tantalum capacitors can fail under this condition. Several manufacturers have developed a line of solid
tantalum capacitors specially tested for surge capability
(e.g., AVX TPS series). However, even these units may fail
if the input voltage approaches the maximum voltage
rating of the capacitor. AVX recommends derating capacitor voltage by 2:1 for high surge applications.
Output Filter Capacitor
Output capacitors are usually chosen on the basis of ESR
since this will determine output ripple. Typical required
ESR will be in the 0.05Ω to 0.3Ω range.
The specific value for capacitance will depend on topology. A typical output capacitor is an AVX type TPS, 22µF
and 25V with a guaranteed ESR less than 0.2Ω. To further
reduce ESR, multiple output capacitors can be used in
parallel. The value in microfarads is not particularly important. A small 22µF tantalum capacitor will have high ESR
and higher output voltage ripple. Table 1 shows some
typical surface mount capacitors.
ESR (MAX Ω)
SIZE
Panasonic CD
C CASE
B CASE
0.1 to 0.3
0.05 to 0.18
AVX TPS
0.2 (Typ)
AVX TAJ
1.8 to 3.0
AVX TAJ
2.5 to 10
Switching Diodes
In general, switching diodes should be Schottky diodes
such as 1N5818 or MBR130 (1A/30V). Low output current
applications may use 1N4148 switching diodes.
Unregulated Applications
The LT1533 can be used to create a low noise “DC
transformer” unregulated power supply. DC transformers
are open-loop switching regulators where the output
voltage is controlled by the turns ratio of the transformer.
A DC transformer provides a low cost isolated supply.
For such applications, the DUTY pin of the LT1533 should
be grounded. This will force the outputs into a 50% on,
50% off mode. Note that because of slew control there will
be some variance from 50%. Figure 6 shows a 5V to ±12V
DC transformer.
One concern with this type of application is having both
switch outputs transition at the same time. This can cause
both primary side windings to have positive EMF added to
the winding, causing the current to run away. Since this
part controls slew rate this won’t happen. It is possible to
see slightly increased total current draw when both drivers
are on, but this will be controlled and observable. Since the
outputs share a common sense resistor, the outputs will
turn off when the total current in both exceeds the limit set
by the VC pin.
The FB pin should be DC biased between 0.7V and 1.2V to
prevent frequency shifting from occurring. This also ensures that the VC pin is set to its upper clamp, providing
peak output current.
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The slew rate adjustment should be made by putting a
3.9k resistor in series with a 50k pot on the RVSL and RCSL
pins (or a 2k resistor in series with a 25k pot with both
pins tied together). Monitor output noise or other system
signal while increasing the resistance until desired noise
performance is reached. System efficiency can also be
monitored.
More Help
AN70 contains much information concerning LT1533
applications and measurement of noise and should be
consulted. A 5V to 12V demo board is also available
(DC173). AN19 and AN29 also have general knowledge
concerning switching regulators. Our Application Department is always ready to lend a helping hand.
While this topology is not as quiet as a push-pull converter, it can provide a low cost, isolated power supply that
has decreased noise relative to other solutions.
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TYPICAL APPLICATIONS
1N5819
×4
5V
22µF
10V
14
VIN
16
LT1533
SHDN
11
4
DUTY
COL B
SHDN
RCSL
BAT85
1
3.3
22µF
35V
BAT85
1
3.3
22µF
35V
SYNC
RVSL
15
12
L2
100µH
68k
2
1, 2, 7, 8
1
2.2µF
25V
150k
5
12V
80mA
332k
R4
150k
324k
4
LT1175CS8
13
3
2.2µF
25V
–12V
80mA
1533 F06
4k TO 68k
CT VC NFB FB
GND RT
9
LT1121CS8
3
25nH*
PGND
3
8
T1**
2
COL A
L1
100µH
6
5
10
8
7
43k
5V
3300pF
18k
10k
* BEAD OR PCB TRACE
** COILTRONICS CTX02 13716-X1
L1, L2: COILCRAFT DT1608C-104
Figure 6. 5V to ±12V DC Transformer
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Low Noise 5V to –12V Forward Push-Pull Converter. Output Noise Is Below 100µV.
Noise Performance Is Identical to Positive Output Version. See AN70 for Details
5V
+
T1
14
4.7µF 11
3
3300pF
4
5
18k
6
VIN
SHDN
COL A
DUTY
COL B
SYNC
PGND
CT
LT1533
RVSL
RT
RCSL
10
VC
NFB
FB
GND
0.01µF
9
L2
100µH
1N4148
(
L3
OPTIONAL FOR
100µH LOWEST RIPPLE
–12V
2
1N4148
47µF
+
15
+
47µF
L1
16
13
15k
12
15k
9.6k
1%
8
1533 TA03
2.4k
1%
7
L1: 22nH INDUCTOR. COILCRAFT B-07T TYPICAL,
TRACE INDUCTANE OR BEAD
L2, L3: COILTRONICS CTX100-3
T1: COILTRONICS CTX02-13665-X1
Electronic Equivalent of 9V Battery Operates from Three NiCd Cells.
Output Noise Is Below 100µV. See AN70 for Details
2.7V TO 4V
(3 NiCd BATTERIES)
+
T1
14
4.7µF
11
3
3300pF
4
5
18k
6
VIN
SHDN
COL A
DUTY
COL B
SYNC
CT
PGND
LT1533
RVSL
RT
RCSL
10
0.01µF
16
VC
GND
NFB
9
8
FB
1N4148
L1
100µH
2
1N4148
9V
(
L3
OPTIONAL FOR
100µH LOWEST RIPPLE
+
+
47µF
15
47µF
L2
16
13
15k
12
15k
7
21.5k
1%
1533 TA04
3.48k
1%
L1, L3: COILTRONICS CTX100-3
L2: 22nH TRACE INDUCTANCE, FERRITE BEAD OR
INDUCTOR COILCRAFT B-07T TYPICAL
T1: CTX02-13665-X1
)
)
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Hysteretic Loop Lowers Quiescent Current to 100µA While
Maintaining Low Output Noise. See AN70 for Details
2.7V TO 4V
(3 Ni-Cd BATTERIES)
11
3
3300pF
4
5
18k
6
VIN
SHDN
COL A
DUTY
COL B
SYNC
PGND
CT
LT1533
RVSL
RT
RCSL
10
VC
GND
NFB
9
8
0.01µF
FB
2
1N4148
(
OPTIONAL FOR
L3
100µH LOWEST RIPPLE
)
+
+
47µF
47µF
15
L2
16
5V
21.5k
1%
13 15k
12 15k
C1
LTC1440
7
2.32k
1%
+
4.7µF
L1
100µH 12V
1N4148
T1
14
–
+
150k
10pF
1.18V
VZ INTERNAL
TO LTC1440
L1, L3: COILTRONICS CTX100-3
L2: 22nH TRACE INDUCTANCE, FERRITE BEAD OR
INDUCTOR COILCRAFT B-07T TYPICAL
T1: CTX02-13665-X1
1553 TA05
A 50V Output Low Noise Regulator. Cascoded Bipolar Transistors
Accommodate 60V Transformer Swings, Permitting 24V (20VIN to 30VIN)
Powered Operation. See AN70 for Details
68Ω
24V
(20V TO 30V)
0.003µF
3.3k
360Ω
MUR110
T1
Q1
11
Q3
1N4148
1N752
5.6V
L1
100µH
14
10k
3
+
3300pF
1µF
4
5
18k
VIN
SHDN
COL A
DUTY
COL B
SYNC
PGND
CT
LT1533
6
RVSL
RT
RCSL
10
0.01µF
+
2
MUR110
47µF
+
)
+
47µF
15
L2
(
OPTIONAL FOR
100µH LOWEST RIPPLE
50V
47µF
Q2
16
13 15k
3.3k
97.6k
1%
12 15k
360Ω
68Ω
0.003µF
VC
GND
NFB
9
8
FB
7
1553 TA06
2.49k
1%
L1: COILTRONICS CTX100-3
L2: 22nH TRACE INDUCTANCE, FERRITE BEAD OR
INDUCTOR COILCRAFT B-07T TYPICAL
Q1, Q2: ZETEX ZTX-853
Q3: 2N2222A
T1: CTX02-13665-X1
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A 10W Low Noise 5V to 12V Converter. Q1-Q2 Provide 5A Output Capacity
While Preserving LT1533’s Voltage Current Slew Control. Efficiency Is 68%.
Higher Input Voltages Minimize Follower Loss, Boosting Efficiency Above 71%.
See AN70 for Details
1N4148 330Ω
5V
1N5817
0.05Ω
T1
Q1
+
4.7µF
14
11
3
1500pF
4
5
18k
6
VIN
SHDN
COL A
DUTY
COL B
SYNC
CT
PGND
LT1533
RVSL
RT
RCSL
10
0.01µF
18
VC
L1
300µH
0.003µF
GND
NFB
9
8
FB
2
FB1
15 FB2
+
4.7µF
0.05Ω
Q2
330Ω
16
680Ω
12V
5A
+
1N5817
1N4148
12 10k
21.5k
1%
7
1553 TA07
2.49k
1%
L1:COILTRONICS CTX300-4
L2:22nH TRACE INDUCTANCE, FERRITE BEAD OR
INDUCTOR COILCRAFT B-07T TYPICAL
L3:COILTRONICS CTX33-4
Q1, Q2:MOTOROLA D45C1
T1:COILTRONICS CTX02-13949-X1
FB1, FB2:FERRONICS FERRITE BEAD 21-110J
(
OPTIONAL FOR
LOWEST RIPPLE
+
100µF
L2
13 10k
L3
33µH
100µF
)
LT1533
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
16
15
14
13
12
11
10
9
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
2
3
4
5
6
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
8
0.004 – 0.010
(0.101 – 0.254)
0° – 8° TYP
0.016 – 0.050
0.406 – 1.270
7
0.050
(1.270)
TYP
S16 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT1533
U
TYPICAL APPLICATION
10W Off-Line Power Supply Passes FCC Emission Requirements
Without Filter Components
T1
!!
GER
!!
DAN LTAGE
O
HV
HIG
0.1µF
AC LINE
+
HV
100µF
400V
1N4005
1.6k
1W
0.001µF
250V
0.001µF
250V
1.6k
1W
HV
HV
+
10µF
5k
0.5W
360k
Q1
MPSA42
Q2
12V
12V
D
Q5
Q6
IRF840 IRF840
S 1N5818 1N5818 S
Q3
10k
1N759A
12V
D
1k
1k
0.002µF
12V
Q4
1k
Q7
1V
COL A
12V
COL B
470Ω
VIN
VC
LT1533
4V
330Ω
SHDN
+
RCSL
10M
RVSL
RT
CT
PGND
+
4N28
1µF
HV
1µF
22k
75k
3300pF
15k
L2
22nH
+
1V
15µF
510Ω
12V
+
+
C2
1/2 LM393
–
SCREENED AREA CONTAINS LETHAL HIGH VOLTAGES!
USE CAUTION IN CONSTRUCTION AND TESTING!
0.15µF
BAT-85
470k
470Ω
240k
43k
12V
0.48V
L1 = COILTRONICS UP-4
L2 = COILCRAFT B07T
NPN = 2N3904 UNLESS OTHERWISE NOTED
PNP = 2N3906
T1 = COILTRONICS CTX02-13978-X3
3.9k
1µF
4V
LT1431
0.8Ω
COL RTOP
C1
1/2 LM393
+
3k
10k
0.002µF
Q8
FB
12V
+
4.7µF 8.2k
+
220µF
360k
–
100k
5V
2A
L1
10µH
RMID
REF
0.48V
2.5V
POWER LIMIT
CURRENT LIMIT
= 20CJQ045(I.R.) UNLESS OTHERWISE NOTED
= AC (HOT) RETURN
= 1N4148
= OUTPUT COMMON
FGND
SGND
1533 TA08
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PART NUMBER
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COMMENTS
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Adaptive Power is a trademark of Linear Technology Corporation.
20
Linear Technology Corporation
1533f LT/TP 0598 5K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1997