LINER LT1793ACS8

LT1793
Low Noise,
Picoampere Bias Current,
JFET Input Op Amp
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FEATURES
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DESCRIPTIO
The LT®1793 achieves a new standard of excellence in
noise performance for a JFET op amp. For the first time low
voltage noise (6nV/√Hz) is simultaneously offered with
extremely low current noise (0.8fA/√Hz), providing the
lowest total noise for high impedance transducer applications. Unlike most JFET op amps, the very low input bias
current (3pA typ) is maintained over the entire common
mode range which results in an extremely high input resistance (1013Ω). When combined with a very low input capacitance (1.5pF) an extremely high input impedance
results, making the LT1793 the first choice for amplifying
low level signals from high impedance transducers. The
low input capacitance also assures high gain linearity when
buffering AC signals from high impedance transducers.
Input Bias Current, Warmed Up: 10pA Max
100% Tested Low Voltage Noise: 8nV/√Hz Max
A Grade 100% Temperature Tested
Offset Voltage Over Temp: 1mV Max
Input Resistance: 1013Ω
Very Low Input Capacitance: 1.5pF
Voltage Gain: 1 Million Min
Gain-Bandwidth Product: 4.2MHz Typ
Guaranteed Specifications with ±5V Supplies
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APPLICATIO S
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Photocurrent Amplifiers
Hydrophone Amplifiers
High Sensitivity Piezoelectric Accelerometers
Low Voltage and Current Noise Instrumentation
Amplifier Front Ends
Two and Three Op Amp Instrumentation Amplifiers
Active Filters
The LT1793 is unconditionally stable for gains of 1 or more,
even with 1000pF capacitive loads. Other key features are
250µV VOS and a voltage gain over 4 million. Each individual amplifier is 100% tested for voltage noise, slew rate
(3.4V/µs) and gain-bandwidth product (4.2MHz).
Specifications at ±5V supply operation are also provided.
For an even lower voltage noise please see the LT1792 data
sheet.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
Low Noise Light Sensor with DC Servo
1kHz Output Voltage Noise
Density vs Source Resistance
V+
–
2
+
3
D2
1N914
R1
1M
7
LT1793
6
VOUT
C2 0.022µF
4
CD
D1
1N914
2N3904
LT1097
R5
10k
V–
R3
1k
R2
100k
R4
1k
+
HAMAMATSU
S1336-5BK
(908) 231-0960
V+
–
V–
1793 TA01
V–
R2C2 > C1R1
CD = PARASITIC PHOTODIODE CAPACITANCE
VOUT = 100mV/µWATT FOR 200nm WAVE LENGTH
330mV/µWATT FOR 633nm WAVE LENGTH
TOTAL 1kHz VOLTAGE NOISE DENSITY (nV/√Hz)
C1
2pF
10k
–
1k
VN
+
RSOURCE
100
10
1
100
VN
SOURCE
RESISTANCE
ONLY
1k
TA = 25°C
VS = ±15V
10k 100k 1M 10M 100M 1G
SOURCE RESISTANCE (Ω)
VN = √(VOP AMP)2 + 4kTRS + 2qIBRS2
1793 TA02
1
LT1793
W W
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AXI U
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ABSOLUTE
RATI GS
(Note 1)
Supply Voltage ..................................................... ±20V
Differential Input Voltage ...................................... ±40V
Input Voltage (Equal to Supply Voltage) ............... ±20V
Output Short-Circuit Duration ........................ Indefinite
Operating Temperature Range ............... – 40°C to 85°C
Specified Temperature Range
Commercial (Note 8) ......................... – 40°C to 85°C
Industrial ........................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................ 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
VOS ADJ 1
8 NC
– IN A 2
+
+ IN A 3
V
–
A
7 V
6 OUT
5 VOS ADJ
4
LT1793ACN8
LT1793CN8
LT1793AIN8
LT1793IN8
ORDER PART
NUMBER
TOP VIEW
VOS ADJ 1
8 NC
–IN A 2
7 V+
+IN A 3
A
LT1793ACS8
LT1793CS8
LT1793AIS8
LT1793IS8
6 OUT
V– 4
5 VOS ADJ
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 80°C/W
TJMAX = 160°C, θJA = 190°C/W
S8 PART MARKING
1793AI
1793I
1793A
1793
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
TA = 25°C, VS = ±15V, VCM = 0V, unless otherwise noted.
LT1793AC/LT1793AI
MIN
TYP
MAX
LT1793C/LT1793I
MIN
TYP
MAX
VS = ±5V
0.25
0.45
0.8
1.4
0.25
0.45
0.9
1.6
mV
mV
Input Offset Current
Warmed Up (Note 3)
TJ = 25°C (Note 6)
1.5
0.5
7
2
2.5
0.7
15
4
pA
pA
IB
Input Bias Current
Warmed Up (Note 3)
TJ = 25°C (Note 6)
3
1
10
3
4.0
1.5
20
5
pA
pA
en
Input Noise Voltage
0.1Hz to 10Hz
2.4
2.4
µVP-P
Input Noise Voltage Density
fO = 10Hz
fO = 1000Hz
11.5
6
8
11.5
6
8
nV/√Hz
nV/√Hz
fO = 10Hz, fO = 1kHz (Note 4)
0.8
1
VCM = –10V to 13V
1014
1013
1014
1013
Ω
Ω
VS = ±5V
1.5
2.0
1.5
2.0
pF
pF
SYMBOL
PARAMETER
VOS
Input Offset Voltage
IOS
in
Input Noise Current Density
RIN
Input Resistance
Differential Mode
Common Mode
CIN
Input Capacitance
VCM
Input Voltage Range (Note 5)
CMRR
Common Mode Rejection Ratio
PSRR
Power Supply Rejection Ratio
2
CONDITIONS (Note 2)
UNITS
fA/√Hz
13.0
– 10.5
13.5
– 11.0
13.0
– 10.5
13.5
– 11.0
V
V
VCM = –10V to 13V
83
102
81
96
dB
VS = ±4.5V to ± 20V
85
98
83
95
dB
LT1793
ELECTRICAL CHARACTERISTICS
TA = 25°C, VS = ±15V, VCM = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS (Note 2)
LT1793AC/LT1793AI
MIN
TYP
MAX
LT1793C/LT1793I
MIN
TYP
MAX
AVOL
Large-Signal Voltage Gain
VO = ±12V, RL = 10k
VO = ±10V, RL = 1k
1000
500
4500
3500
900
400
4400
3000
V/mV
V/mV
VOUT
Output Voltage Swing
RL = 10k
RL = 1k
±13.0
±12.0
±13.2
±12.3
±13.0
±12.0
±13.2
±12.3
V
V
SR
Slew Rate
RL ≥ 2k (Note 7)
2.3
3.4
2.3
3.4
GBW
Gain-Bandwidth Product
fO = 100kHz
2.5
4.2
2.5
4.2
IS
Supply Current
Offset Voltage
Adjustment Range
VS = ±5V
4.2
4.2
RPOT (to VEE) = 10k
13
5.20
5.15
4.2
4.2
UNITS
V/µs
MHz
5.20
5.15
13
mA
mA
mV
The ● denotes specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C, otherwise specifications are at TA = 25°C.
VS = ±15V, VCM = 0V, unless otherwise noted. (Note 9)
SYMBOL
PARAMETER
VOS
Input Offset Voltage
∆VOS
∆Temp
Average Input Offset
Voltage Drift
IOS
CONDITIONS (Note 2)
MIN
LT1793AC
TYP
MAX
MIN
LT1793C
TYP
MAX
UNITS
VS = ±5V
●
●
0.50
0.75
1.0
1.6
1.0
1.6
3.5
4.2
mV
mV
(Note 6)
●
5
13
8
50
µV/°C
Input Offset Current
●
15
100
20
130
pA
IB
Input Bias Current
●
130
400
150
500
pA
VCM
Input Voltage Range (Note 5)
●
●
12.9
– 10.0
13.4
– 10.8
CMRR
Common Mode Rejection Ratio
VCM = –10V to 12.9V
●
79
100
77
95
dB
PSRR
Power Supply Rejection Ratio
VS = ±4.5V to ± 20V
●
83
97
81
94
dB
AVOL
Large-Signal Voltage Gain
VO = ±12V, RL = 10k
VO = ±10V, RL = 1k
●
●
900
500
3600
2600
800
400
3400
2400
VOUT
Output Voltage Swing
RL = 10k
RL = 1k
●
●
SR
Slew Rate
RL ≥ 2k (Note 7)
●
2.2
3.3
GBW
Gain-Bandwidth Product
fO = 100kHz
●
2.2
3.3
IS
Supply Current
VS = ±5V
●
●
12.9
– 10.0
±12.9 ±13.2
±11.9 ±12.15
4.2
4.2
13.4
– 10.8
V
V
V/mV
V/mV
±12.9 ±13.2
±11.9 ±12.15
5.30
5.25
2.2
3.3
2.2
3.3
4.2
4.2
V
V
V/µs
MHz
5.30
5.25
mA
mA
3
LT1793
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the temperature range
– 40°C ≤ TA ≤ 85°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Notes 8, 9)
LT1793AC/LT1793AI
MIN
TYP
MAX
LT1793C/LT1793I
MIN
TYP
MAX
VS = ±5V
●
●
0.65
1.00
1.3
1.9
1.6
2.0
4.8
5.5
mV
mV
(Note 6)
●
5
13
9
50
µV/°C
Input Offset Current
●
80
300
100
400
pA
IB
Input Bias Current
●
700
2400
800
3000
pA
VCM
Input Voltage Range (Note 5)
●
●
12.6
– 10.0
13.0
– 10.5
12.6
– 10.0
13.0
– 10.5
V
V
CMRR
Common Mode Rejection Ratio
VCM = –10V to 12.6V
●
78
99
76
94
dB
PSRR
Power Supply Rejection Ratio
VS = ±4.5V to ± 20V
●
81
96
79
93
dB
AVOL
Large-Signal Voltage Gain
VO = ±12V, RL = 10k
VO = ±10V, RL = 1k
●
●
850
400
3300
2200
750
300
3000
2000
V/mV
V/mV
VOUT
Output Voltage Swing
RL = 10k
RL = 1k
●
●
±12.8
±11.8
±13.1
±12.1
±12.8
±11.8
±13.1
±12.1
V
V
SR
Slew Rate
RL ≥ 2k
●
2.1
3.2
2.1
3.2
GBW
Gain-Bandwidth Product
fO = 100kHz
●
2
3.1
2
3.1
IS
Supply Current
VS = ±5V
●
●
SYMBOL
PARAMETER
VOS
Input Offset Voltage
∆VOS
∆Temp
Average Input Offset
Voltage Drift
IOS
CONDITIONS (Note 2)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers.
Note 3: IB and IOS readings are extrapolated to a warmed-up temperature
from 25°C measurements and 32°C characterization data.
Note 4: Current noise is calculated from the formula:
in = (2qIB)1/2
where q = 1.6 • 10 –19 coulomb. The noise of source resistors up to 200M
swamps the contribution of current noise.
Note 5: Input voltage range functionality is assured by testing offset
voltage at the input voltage range limits to a maximum of 2.3mV
(A grade) to 2.8mV (C grade).
4
4.2
4.2
5.40
5.35
4.2
4.2
UNITS
V/µs
MHz
5.40
5.35
mA
mA
Note 6: This parameter is not 100% tested.
Note 7: Slew rate is measured in AV = –1; input signal is ±7.5V, output
measured at ±2.5V.
Note 8: The LT1793AC and LT1793C are guaranteed to meet specified
performance from 0°C to 70°C and are designed, characterized and
expected to meet these extended temperature limits, but are not tested at
– 40°C and 85°C. The LT1793I is guaranteed to meet the extended
temperature limits. The LT1793AC and LT1793AI grade are 100%
temperature tested for the specified temperature range.
Note 9: The LT1793 is measured in an automated tester in less than one
second after application of power. Depending on the package used, power
dissipation, heat sinking, and air flow conditions, the fully warmed-up chip
temperature can be 10°C to 50°C higher than the ambient temperature.
LT1793
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TYPICAL PERFOR A CE CHARACTERISTICS
1kHz Input Noise Voltage
Distribution
0.1Hz to 10Hz Voltage Noise
Voltage Noise vs Frequency
100
50
PERCENT OF UNITS (%)
VOLTAGE NOISE (1µV/DIV)
40
RMS VOLTAGE NOISE DENSITY (nV/√Hz)
TA = 25°C
VS = ±15V
510 OP AMPS TESTED
30
20
10
2
4
6
TIME (SEC)
8
1793 G01
V+
VS = ±15V
1
8
7
6
5
4
+
V = 5V TO 20V
–1.5
–2.0
4.0
3.5
V – = – 5V TO – 20V
3.0
V – +2.0
–60
100 125
60
100
20
TEMPERATURE (°C)
80
60
40
20
1k
140
10k
100k
1M
FREQUENCY (Hz)
10M
1793 G06
Gain and Phase Shift
vs Frequency
Voltage Gain vs Frequency
180
TA = 25°C
160
100
140
TA = 25°C
VS = ±15V
CL = 10pF
40
120
100
80
60
40
20
30
80
100
120
PHASE
20
140
10
160
GAIN
0
PHASE SHIFT (DEG)
VOLTAGE GAIN (dB)
+PSRR
50
TA = 25°C
VS = ±15V
CL = 10pF
VOLTAGE GAIN (dB)
120
20
100
1793 G05
Power Supply Rejection Ratio
vs Frequency
40
TA = 25°C
VS = ± 15V
0
–20
1793 G04
–PSRR
10k
Common Mode Rejection Ratio
vs Frequency
2.5
60
100
1k
FREQUENCY (Hz)
120
–1.0
3
80
10
1793 G03
0
–0.5
9
COMMON MODE LIMIT (V)
REFERRED TO POWER SUPPLY
VOLTAGE NOISE (AT 1kHz) (nV/√Hz)
1
Common Mode Limit
vs Temperature
2
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
POWER SUPPLY REJECTION RATIO (dB)
1/f CORNER
30Hz
1793 G02
Voltage Noise
vs Chip Temperature
10
10
0
4.2 4.6 5.0 5.4 5.8 6.2 6.6 7.0 7.4 7.8 8.2
INPUT VOLTAGE NOISE (nV/√Hz)
10
COMMON MODE REJECTION RATIO (dB)
0
TA = 25°C
VS = ±15V
180
0
0
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
10M
1793 G07
– 20
0.01
–10
1
10k
100
FREQUENCY (Hz)
1M
100M
1793 G08
0.1
1
10
FREQUENCY (MHz)
200
100
1793 G09
5
LT1793
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TYPICAL PERFOR A CE CHARACTERISTICS
Output Voltage Swing
vs Load Current
Large-Signal Transient Response
Small-Signal Transient Response
V + –0.8
OUTPUT VOLTAGE SWING (V)
5V/DIV
20mV/DIV
AV = 1
CL = 10pF
VS = ±15V, ±5V
1793 G10
1µs/DIV
AV = 1
CL = 10pF
RL = 2k
VS = ±15V
1793 G11
5µs/DIV
125°C
25°C
–1.0
–1.2
–55°C
–1.4
–1.6
VS = ±5V TO ±20V
2.0
1.8
1.6
125°C
1.4
1.2
25°C
–55°C
V – +1.0
–10 –8 –6 –4 –2 0 2 4 6 8 10
ISINK
ISOURCE
OUTPUT CURRENT (mA)
1793 G12
30
20
AV = 1
10
VS = ±15V
TA = 25°C
75
TOTAL HARMONIC DISTORTION + NOISE (%)
OVERSHOOT (%)
40
90
VS = ±15V
TA = 25°C
RL ≥ 10k
VO = 100mVP-P
AV = 10
RF = 10k
CF = 20pF
CHANGE IN OFFSET VOLTAGE (µV)
50
THD and Noise Frequency for
Noninverting Gain
Warm-Up Drift
Capacitive Load Handling
SO-8 PACKAGE
60
45
N8 PACKAGE
30
15
AV = 10
0
1
100
1000
10
CAPACITIVE LOAD (pF)
10000
5
2
3
4
1
TIME AFTER POWER ON (MINUTES)
0.1
AV = – 100
0.01
AV = – 10
AV = – 1
0.001
NOISE FLOOR
0.0001
20
100
1k
FREQUENCY (Hz)
10k 20k
1793 G16
6
AV = 100
0.01
AV = 10
AV = 1
0.001
NOISE FLOOR
6
20
100
1k
FREQUENCY (Hz)
THD and Noise vs Output
Amplitude for Noninverting Gain
1
0.1
ZL = 2k  15pF, fO = 1kHz
AV = –1, –10, –100
MEASUREMENT BANDWIDTH
= 10Hz TO 22kHz
AV = –100
0.01
AV = –10
0.001
AV = –1
0.0001
0.3
1
10
OUTPUT SWING (VP-P)
10k 20k
1793 G15
THD and Noise vs Output
Amplitude for Inverting Gain
TOTAL HARMONIC DISTORTION + NOISE (%)
TOTAL HARMONIC DISTORTION + NOISE (%)
THD and Noise vs Frequency for
Inverting Gain
ZL = 2k  15pF
VO = 20VP-P
AV = – 1, – 10, – 100
MEASUREMENT BANDWIDTH
= 10Hz TO 80kHz
0.1
1793 G14
1793 G13
1
ZL = 2k  15pF
VO = 20VP-P
AV = 1, 10, 100
MEASUREMENT BANDWIDTH
= 10Hz TO 80kHz
0.0001
0
TOTAL HARMONIC DISTORTION + NOISE (%)
0
0.1
1
30
1793 G17
1
0.1
ZL = 2k  15pF, fO = 1kHz
AV = 1, 10, 100
MEASUREMENT BANDWIDTH
= 10Hz TO 22kHz
AV = 100
0.01
AV = 10
0.001
AV = 1
0.0001
0.3
1
10
OUTPUT SWING (VP-P)
30
1793 G18
LT1793
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TYPICAL PERFOR A CE CHARACTERISTICS
Short-Circuit Output Current
vs Temperature
30
SINK
SOURCE
25
20
15
10
– 75 – 50 – 25 0
25 50 75
TEMPERATURE (°C)
INPUT BIAS AND OFFSET CURRENTS (A)
35
OUTPUT CURRENT (mA)
30n
5
VS = ±15V
SUPPLY CURRENT PER AMPLIFIER (mA)
40
VS = ±15V
4
VS = ± 5V
3
– 75 – 50 – 25 0
25 50 75
TEMPERATURE (°C)
100 125
100 125
1793 G19
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U
UO
INPUT BIAS CURRENT (pA)
1n
BIAS
CURRENT
300p
100p
30p
OFFSET
CURRENT
10p
3p
1p
0.3p
0
25
75
100
50
TEMPERATURE (°C)
125
1793 G21
S I FOR ATIO
With improved noise performance, the LT1793 in the
PDIP directly replaces such JFET op amps as the OPA111
and the AD645. The combination of low current and
voltage noise of the LT1793 allows it to surpass most dual
and single JFET op amps. The LT1793 can replace many
of the lowest noise bipolar amps that are used in amplifying low level signals from high impedance transducers.
The best bipolar op amps (with higher current noise) will
eventually lose out to the LT1793 when transducer impedance increases.
CURRENT NOISE = √2qIB
The extremely high input impedance (1013Ω) assures that
the input bias current is almost constant over the entire
common mode range. Figure 1 shows how the LT1793
stands up to the competition. Unlike the competition, as the
input voltage is swept across the entire common mode
range the input bias current of the LT1793 hardly changes.
As a result the current noise does not degrade. This makes
the LT1793 the best choice in applications where an
amplifier has to buffer signals from a high impedance
transducer.
Offset nulling will be compatible with these devices with the
wiper of the potentiometer tied to the negative supply
(Figure 2a). No appreciable change in offset voltage drift
60
15V
15V
40
OP215
20
LT1793
2
–
3
+
7
2
–
3
+
7
6
6
0
–20
–40
3n
1793 G20
LT1793 vs the Competition
80
VS = ±15V
VCM = –10 TO 13V
10n
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APPLICATI
100
Input Bias and Offset Currents
vs Chip Temperature
Supply Current vs Temperature
4
AD822
5
∆VOS = ±13mV
1
–60
4
5
10k
50k
∆VOS = ±1.3mV
1
10k
–80
–100
–15
– 15V
–10
0
5
10
–5
COMMON MODE RANGE (V)
50k
15
– 15V
1793 F01
Figure 1. Comparison of LT1793, OP215, and AD822
Input Bias Current vs Common Mode Range
(a)
1793 F02
(b)
Figure 2
7
LT1793
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S I FOR ATIO
APPLICATI
with temperature will occur when the device is nulled with
a potentiometer ranging from 10k to 200k. Finer adjustments can be made with resistors in series with the
potentiometer (Figure 2b).
Amplifying Signals from High Impedance Transducers
The low voltage and current noise offered by the LT1793
makes it useful in a wide range of applications, especially
where high impedance, capacitive transducers are used
such as hydrophones, precision accelerometers and
photodiodes. The total output noise in such a system is
the gain times the RMS sum of the op amp’s input referred
10k
LT1007*
INPUT NOISE VOLTAGE (nV/√
H
z)
CS
–
1k
LT1793*
RS
+
VO
RS
100
CS
LT1007†
LT1793
10
LT1793†
1
100
Optimization Techniques for Charge Amplifiers
LT1007
RESISTOR NOISE ONLY
1k
voltage noise, the thermal noise of the transducer, and the
op amp’s input bias current noise times the transducer
impedance. Figure 3 shows total input voltage noise
versus source resistance. In a low source resistance
(< 5k) application the op amp voltage noise will dominate
the total noise. This means the LT1793 is superior to
most JFET op amps. Only the lowest noise bipolar op
amps have the advantage at low source resistances. As
the source resistance increases from 5k to 50k, the
LT1793 will match the best bipolar op amps for noise
performance, since the thermal noise of the transducer
(4kTR) begins to dominate the total noise. A further
increase in source resistance, above 50k, is where the op
amp’s current noise component (2qIBR2) will eventually
dominate the total noise. At these high source resistances, the LT1793 will out perform the lowest noise
bipolar op amps due to the inherently low current noise of
FET input op amps. Clearly, the LT1793 will extend the
range of high impedance transducers that can be used for
high signal-to-noise ratios. This makes the LT1793 the
best choice for high impedance, capacitive transducers.
10k 100k 1M 10M 100M
SOURCE RESISTANCE (Ω)
1G
1793 F03
SOURCE RESISTANCE = 2RS = R
* PLUS RESISTOR
†
PLUS RESISTOR  1000pF CAPACITOR
Vn = AV √Vn2(OP AMP) + 4kTR + 2qIBR2
Figure 3. Comparison of LT1793 and LT1007 Total Output
1kHz Voltage Noise vs Source Resistance
The high input impedance JFET front end makes the
LT1793 suitable in applications where very high charge
sensitivity is required. Figure 4 illustrates the LT1793 in its
inverting and noninverting modes of operation. A charge
amplifier is shown in the inverting mode example; the gain
depends on the principal of charge conservation at the
input of the LT1793. The charge across the transducer
capacitance CS is transferred to the feedback capacitor CF
RF
R2
CB
CF
RB
–
CS
RS
+
TRANSDUCER
CB
RB
OUTPUT
CB = CF CS
RB = RF RS
dQ
dV
Q = CV; = I = C
dt
dt
–
R1
OUTPUT
+
CS
RS
CB ≅ CS
RB = RS
RS > R1 OR R2
TRANSDUCER
Figure 4. Inverting and Noninverting Gain Configurations
8
1793 F04
LT1793
W
U
U
UO
APPLICATI
S I FOR ATIO
resulting in a change in voltage dV, which is equal to dQ/CF.
The gain therefore is CF/CS. For unity-gain, the CF should
equal the transducer capacitance plus the input capacitance of the LT1793 and RF should equal RS.
In the noninverting mode example, the transducer current
is converted to a change in voltage by the transducer
capacitance, CS. This voltage is then buffered by the
LT1793 with a gain of 1 + R1/R2. A DC path is provided by
RS, which is either the transducer impedance or an external resistor. Since RS is usually several orders of magnitude greater than the parallel combination of R1 and R2, R B
is added to balance the DC offset caused by the noninverting input bias current and RS. The input bias currents,
although small at room temperature, can create significant
errors at higher temperature, especially with transducer
resistances of up to 1000M or more. The optimum value
Input: ±5.2V Sine Wave
for RB is determined by equating the thermal noise (4kTRS)
to the current noise (2qIB) times RS2. Solving for RS
results in RB = RS = 2VT/IB (VT = 26mV at 25°C). A parallel
capacitor CB, is used to cancel the phase shift caused by
the op amp input capacitance and RB.
Reduced Power Supply Operation
To take full advantage of a wide input common mode range,
the LT1793 was designed to eliminate phase reversal.
Referring to the photographs in Figure 5, the LT1793 is
shown operating in the follower mode (AV = 1) at ±5V
supplies with the input swinging ±5.2V. The output of the
LT1793 clips cleanly and recovers with no phase reversal.
This has the benefit of preventing lockup in servo systems
and minimizing distortion components.
LT1793 Output
LT1793 F05a
LT1793 F05b
Figure 5. Voltage Follower with Input Exceeding the Common Mode Range (VS = ±5V)
9
LT1793
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
+0.035
0.325 –0.015
8.255
+0.889
–0.381
)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.100 ± 0.010
(2.540 ± 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
10
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175) 0.020
MIN
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N8 1197
LT1793
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
2
3
4
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 0996
11
LT1793
U
TYPICAL APPLICATIONS N
10Hz Fourth Order Chebyshev Lowpass Filter (0.01dB Ripple)
R2
237k
R1
237k
VIN
C2
100nF
R3
249k
R5
154k
15V
2
3
–
+
C1
33nF
7
6
LT1793
R4
154k
R6
249k
C4
330nF
4
2
–
3
+
C3
10nF
LT1793
6
VOUT
1793 TA04
–15V
TYPICAL OFFSET ≈ 0.8mV
1% TOLERANCES
FOR VIN = 10VP-P, VOUT = –121dB AT f > 330Hz
= – 6dB AT f = 16.3Hz
LOWER RESISTOR VALUES WILL RESULT IN LOWER THERMAL NOISE AND LARGER CAPACITORS
Accelerometer Amplifier with DC Servo
C1
1250pF
R1
100M
R2
18k
R3
2k
C2
2µF
–
5V TO 15V
ACCELEROMETER
B & K MODEL 4381
OR EQUIVALENT
(800) 442-1030
2
–
3
3
R5
20M
C3
2µF
7
LT1793
R4
20M
1/2 LT1464
+
1
2
6
OUTPUT
+
1793 TA03
4
–5V TO –15V
R4C2 = R5C3 > R1 (1 + R2/R3) C1
OUTPUT = 0.8mV/pC* = 8.0mV/g**
DC OUTPUT ≤ 1.9mV
OUTPUT NOISE = 8nV/√
Hz AT 1kHz
*PICOCOULOMBS
**g = EARTH’S GRAVITATIONAL CONSTANT
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1113
Low Noise, Dual JFET Op Amp
Dual Version of LT1792, VNOISE = 4.5nV/√Hz
LT1169
Low Noise, Dual JFET Op Amp
Dual Version of LT1793, VNOISE = 6nV/√Hz, IB = 10pA
LT1467
Micropower Dual JFET Op Amp
1MHz, 2pA Max IB, 200µA Max IS
LT1792
Low Noise, Single JFET Op Amp
Lower VNOISE Version of LT1793, VNOISE = 4.2nV/√Hz
12
Linear Technology Corporation
1793f LT/TP 0599 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1999