LTC6605-14 Dual Matched 14MHz Filter with Low Noise, Low Distortion Differential Amplifier DESCRIPTION FEATURES n n n n n n n n Two Matched 14MHz 2nd Order Lowpass Filters with Differential Amplifiers Gain Match: ±0.25dB Max, Passband Phase Match: ±1.1° Max, Passband Single-Ended or Differential Inputs < –84dBc Distortion in Passband 2.1nV/√Hz Op Amp Noise Density Pin-Selectable Gain (0dB/6dB/9.5dB) Pin-Selectable Power Consumption (0.35mA/ 16.2mA/33.1mA) Rail-to-Rail Output Swing Adjustable Output Common Mode Voltage Control Buffered, Low Impedance Outputs 2.7V to 5.25V Supply Voltage Small 22-Pin 6mm × 3mm × 0.75mm DFN Package APPLICATIONS n n n n n The LTC®6605-14 contains two independent, fully differential amplifiers configured as matched 2nd order 14MHz lowpass filters. The f–3dB of the filters is adjustable in the range of 12.4MHz to 20MHz and 25MHz. The internal op amps are fully differential, feature very low noise and distortion, and are compatible with 16-bit dynamic range systems. The inputs can accept singleended or differential signals. An input pin is provided for each amplifier to set the common mode level of the differential outputs. Internal laser-trimmed resistors and capacitors determine a precise, very well matched (in gain and phase) 14MHz 2nd order filter response. A single optional external resistor per channel can tailor the frequency response for each amplifier. Three-state BIAS pins determine each amplifier’s power consumption, allowing a choice between shutdown, medium power or full power. Broadband Wireless ADC Driver/Filter Antialiasing Filter Single-Ended to Differential Conversion DAC Smoothing Filter Zero-IF Direct Conversion Receivers The LTC6605-14 is available in a compact 6mm × 3mm 22-pin leadless DFN package and operates over a –40°C to 85°C temperature range. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Dual, Matched 12.4MHz Lowpass Filter 160 1 2 3V + – 3V LTC6605-14 11 + 0.1μF + 17 15 0.1μF 14 – 13 12 0.1μF 3V 140 – VOUTA 16 9 10 3V 18 7 8 – 19 5 + 0.1μF 20 6 VINB 21 3 4 – 22 – VOUTB + 354 TYPICAL UNITS TA = 25° fIN = 14MHz 120 NUMBER OF UNITS + VINA Channel to Channel Phase Matching 100 80 60 40 20 0 –1.0 –0.6 0.6 –0.2 0 0.2 PHASE MATCH (DEG) 1.0 660514 TA01 66057 TA01b 660514f 1 LTC6605-14 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Total Supply Voltage (V+ to V–) ................................5.5V Input Current (Note 2)..........................................±10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4).... –40°C to 85°C Specified Temperature Range (Note 5) .... –40°C to 85°C Junction Temperature ........................................... 150°C Storage Temperature Range................... –65°C to 150°C TOP VIEW +IN2 A 1 22 –OUT A +IN1 A 2 21 V+ A BIAS A 3 20 V– –IN1 A 4 19 VOCMA –IN2 A 5 V– 6 +IN2 B 7 16 –OUT B +IN1 B 8 15 V+ B BIAS B 9 14 V– 18 +OUT A 23 17 V– –IN1 B 10 13 VOCMB –IN2 B 11 12 +OUT B DJC PACKAGE 22-LEAD (6mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 46.5°C/W EXPOSED PAD (PIN 23) IS V –, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC6605CDJC-14#PBF LTC6605IDJC-14#PBF PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC6605CDJC-14#TRPBF 660514 22-Lead (6mm × 3mm) Plastic DFN 0°C to 70°C LTC6605IDJC-14#TRPBF 660514 22-Lead (6mm × 3mm) Plastic DFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ DC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V – = 0V, VINCM = VOCM = mid-supply, BIAS tied to V +, RL = Open, RBAL = 10k. The filter is configured for a gain of 1, unless otherwise noted. VS is defined as (V + – V – ). VOUTCM is defined as (V+OUT + V–OUT )/2. VINCM is defined as (VINP + VINM)/2. VOUTDIFF is defined as (V+OUT – V–OUT ). VINDIFF is defined as (VINP – VINM). See Figure 1. SYMBOL PARAMETER CONDITIONS TYP MAX VOS Differential Offset Voltage (at Op Amp Inputs) (Note 6) VS = 2.7V to 5V l MIN ±0.25 ±1 ΔVOS /ΔT Differential Offset Voltage Drift (at Op Amp Inputs) BIAS = V+ BIAS = Floating l l ±1 ±1 IB Input Bias Current (at Op Amp Inputs) (Note 7) BIAS = V+ BIAS = Floating l l IOS Input Offset Current (at Op Amp Inputs) (Note 7) –60 –30 –25 –12.5 ±1 UNITS mV μV/°C μV/°C 0 0 μA μA μA 660514f 2 LTC6605-14 DC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V – = 0V, VINCM = VOCM = mid-supply, BIAS tied to V +, RL = Open, RBAL = 10k. The filter is configured for a gain of 1, unless otherwise noted. VS is defined as (V + – V – ). VOUTCM is defined as (V+OUT + V–OUT )/2. VINCM is defined as (VINP + VINM)/2. VOUTDIFF is defined as (V+OUT – V–OUT ). VINDIFF is defined as (VINP – VINM). See Figure 1. SYMBOL PARAMETER CONDITIONS VINCM Input Common Mode Voltage Range (Note 8) VS = 3V VS = 5V l l –0.2 –0.2 CMRR Common Mode Rejection Ratio (ΔVINCM /ΔVOS) (Note 9) VS = 3V; ΔVINCM = 1.5V VS = 5V; ΔVINCM = 2.5V l l 46 46 74 74 dB dB PSRR Power Supply Rejection Ratio (ΔVS /ΔVOS) (Note 10) VS = 2.7V to 5V l 66 95 dB VOSCM Common Mode Offset Voltage (VOUTCM – VOCM) VS = 3V VS = 5V l l VOCM Output Common Mode Range (Valid Range for VOCM Pin) (Note 8) VS = 3V VS = 5V l l 1.1 1.1 VMID Self-Biased Voltage at the VOCM Pin VS = 3V l 1.475 RVOCM Input Resistance of VOCM Pin l 12.5 VOUT Output Voltage Swing, High (Measured Relative to V+) Output Voltage Swing, Low (Measured Relative to V –) ISC Output Short-Circuit Current (Note 3) VS Supply Voltage IS RBIAS tON tOFF MIN TYP MAX 1.7 4.7 ±10 ±10 ±15 ±15 UNITS V V mV mV 2 4 V V 1.5 1.525 V 18.8 23.5 kΩ VS = 3V; IL = 0mA VS = 3V; IL = 5mA VS = 3V; IL = 20mA l l l 245 285 415 450 525 750 mV mV mV VS = 5V; IL = 0mA VS = 5V; IL = 5mA VS = 5V; IL = 20mA l l l 350 390 550 625 700 1000 mV mV mV VS = 3V; IL = 0mA VS = 3V; IL = –5mA VS = 3V; IL = –20mA l l l 120 135 195 225 250 350 mV mV mV VS = 5V; IL = 0mA VS = 5V; IL = –5mA VS = 5V; IL = –20mA l l l 175 200 270 325 360 475 mV mV mV VS = 3V VS = 5V l l ±40 ±50 l 2.7 = 2.7V to 5V; BIAS = V+ ±70 ±95 mA mA 5.25 V 45 26.5 1.6 mA mA mA 0 0.4 V Supply Current (per Channel) VS VS = 2.7V to 5V; BIAS = Floating VS = 2.7V to 5V; BIAS = V – l l l BIAS Pin Range for Shutdown Referenced to V – l BIAS Pin Range for Medium Power Referenced to V – l 1 1.5 V BIAS Pin Range for Full Power Referenced to V – l 2.3 VS V BIAS Pin Self-Biased Voltage (Floating) Referenced to V – l 1.05 1.15 1.25 V BIAS Pin Input Resistance l 100 150 200 kΩ Turn-On Time Turn-Off Time 33.1 16.2 0.35 VS = 3V, VBIAS = V– to V+ 400 ns VS = 3V, VBIAS = V+ to V– 400 ns 660514f 3 LTC6605-14 AC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VINCM = VOCM = mid-supply, VBIAS = V+, unless otherwise noted. Filter configured as in Figure 2, unless otherwise noted. VS is defined as (V + – V – ). VOUTCM is defined as (V+OUT + V–OUT )/2. VINCM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT ). VINDIFF is defined as (V+IN + V–IN). SYMBOL PARAMETER CONDITIONS l l l l l l MIN TYP MAX UNITS –0.25 –1.25 –2.5 –4.15 –11.65 –28 ±0.05 –0.92 –2.12 –3.75 –11.1 –25.2 0.25 –0.6 –1.75 –3.35 –10.6 –24.3 dB dB dB dB dB dB Gain Filter Gain ΔVIN = ±0.125V, DC VINDIFF = 0.5VP-P, f = 7MHz VINDIFF = 0.5VP-P, f = 10.5MHz VINDIFF = 0.5VP-P, f = 14MHz VINDIFF = 0.5VP-P, f = 28MHz VINDIFF = 0.5VP-P, f = 70MHz Phase Filter Phase ΔVIN = ±0.125V, DC VINDIFF = 0.5VP-P, f = 7MHz VINDIFF = 0.5VP-P, f = 10.5MHz VINDIFF = 0.5VP-P, f = 14MHz ΔGain Gain Match (Channel-to-Channel) ΔVIN = ±0.125V, DC VINDIFF = 0.5VP-P, f = 7MHz VINDIFF = 0.5VP-P, f = 10.5MHz VINDIFF = 0.5VP-P, f = 14MHz l l l l –0.175 –0.2 –0.2 –0.25 ±0.04 ±0.04 ±0.04 ±0.05 0.175 0.2 0.2 0.25 dB dB dB dB ΔPhase Phase Match (Channel-to-Channel) VINDIFF = 0.5VP-P, f = 7MHz VINDIFF = 0.5VP-P, f = 10.5MHz VINDIFF = 0.5VP-P, f = 14MHz l l l –0.9 –1.0 –1.1 ±0.2 ±0.2 ±0.2 0.9 1.0 1.1 Deg Deg Deg 2V/V Gain Filter Gain in 2V/V Configuration Inputs at ±IN1 Pins, ±IN2 Pins Floating ΔVIN = ±0.125V, DC l 5.8 6 6.25 dB 0 –43.3 –63.6 –81.2 Deg Deg Deg Deg Channel Separation VINDIFF = 1VP-P, f = 7MHz –96 dB fO TC Filter Cut-Off Frequency Temperature Coefficient (T = –45°C to 85°C) BIAS = V+ BIAS = Floating –95 –230 ppm/°C ppm/°C Noise Integrated Output Noise (BW = 10kHz to 28MHz) 54 μVRMS Input Referred Noise Density (f = 1MHz) BIAS = V+ Figure 4, Gain = 1 Figure 4, Gain = 2 Figure 4, Gain = 3 13.2 6.6 4.4 nV/√Hz nV/√Hz nV/√Hz en Voltage Noise Density Referred to Op Amp Inputs (f = 1MHz) BIAS = V+ BIAS = Floating 2.1 2.6 nV/√Hz nV/√Hz in Current Noise Density Referred to Op Amp Inputs (f = 1MHz) BIAS = V+ BIAS = Floating 3 2.1 pA/√Hz pA/√Hz HD2 2nd Harmonic Distortion fIN = 7MHz; VIN = 2VP-P Single-Ended BIAS = V+ BIAS = Floating, RLOAD = 400Ω –81 –69 dBc dBc HD3 3rd Harmonic Distortion fIN = 7MHz; VIN = 2VP-P Single-Ended BIAS = V+ BIAS = Floating, RLOAD = 400Ω –93 –76 dBc dBc Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All pins are protected by steering diodes to either supply. If any pin is driven beyond the LTC6605-14’s supply voltage, the excess input current (current in excess of what it takes to drive that pin to the supply rail) should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the Absolute Maximum Rating when the output is shorted indefinitely. Long-term application of output currents in excess of the Absolute Maximum Ratings may impair the life of the device. Note 4: Both the LTC6605C and the LTC6605I are guaranteed functional over the operating temperature range –40°C to 85°C. Note 5: The LTC6605C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6605C is designed, characterized and expected to meet specified performance from –40°C to 85°C, but is not tested or QA sampled at these temperatures. The LTC6605I is guaranteed to meet specified performance from –40°C to 85°C. Note 6: Output referred voltage offset is a function of gain. To determine output referred voltage offset, or output voltage offset drift, multiply VOS by the noise gain (1 + GAIN). See Figure 3. Note 7: Input bias current is defined as the average of the currents flowing into the noninverting and inverting inputs of the internal amplifier and is calculated from measurements made at the pins of the IC. Input offset current is defined as the difference of the currents flowing into the noninverting and inverting inputs of the internal amplifier and is calculated from measurements made at the pins of the IC. 660514f 4 LTC6605-14 ELECTRICAL CHARACTERISTICS Note 8: See the Applications Information section for a detailed discussion of input and output common mode range. Input common mode range is tested by measuring the differential DC gain with VINCM = mid-supply, and again with VINCM at the input common mode range limits listed in the Electrical Characteristics table, with ΔV IN = ±0.25, verifying that the differential gain has not deviated from the mid-supply common mode input case by more than 0.5%, and that the common mode offset (VOSCM) has not deviated from the mid-supply common mode offset by more than ±10mV. Output common mode range is tested by measuring the differential DC gain with VOCM = mid-supply, and again with voltage set on the VOCM pin at the output common range limits listed in the Electrical Characteristics table, verifying that the differential gain has not deviated from the mid-supply common mode input case by more than 0.5%, and that the common mode offset (VOSCM) has not deviated by more than ±10mV from the mid-supply case. Note 9: CMRR is defined as the ratio of the change in the input common mode voltage at the internal amplifier inputs to the change in differential input referred voltage offset (VOS). Note 10: Power supply rejection ratio (PSRR) is defined as the ratio of the change in supply voltage to the change in differential input referred voltage offset (VOS). TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Temperature 37.5 VINCM = VOCM = MID-SUPPLY 32.5 30.0 27.5 25.0 22.5 20.0 VS = 3V, BIAS = V+ VINCM = VOCM = MID-SUPPLY 5 REPRESENTATIVE UNITS 1.005 VS = 2.7V, BIAS = FLOAT VS = 3V, BIAS = FLOAT VS = 5V, BIAS = FLOAT VS = 2.7V, BIAS = V+ VS = 3V, BIAS = V+ VS = 5V, BIAS = V+ GAIN (V/V) SUPPLY CURRENT (mA) 35.0 Filter Gain vs Temperature 1.010 1.000 0.995 17.5 15.0 12.5 –60 –40 –20 0 20 40 60 TEMPERATURE (°C) 80 100 0.990 –60 –40 –20 0 20 40 60 TEMPERATURE (°C) 660514 G01 VS = 3V VINCM = VOCM = 1.5V 0.5 0 –0.5 –1.0 –1.5 BIAS = V+ BIAS PIN FLOATING 0 1.0 GAIN MAGNITUDE (dB) FREQUENCY SHIFT OF f–3dB (%) Filter Frequency Response 10 1.5 100 660514 G02 –3dB Frequency vs Temperature 2.0 80 –10 –20 –30 BIAS = FLOAT BIAS = V+ –2.0 –60 –40 –20 0 20 40 60 TEMPERATURE (°C) VS = 3V VINCM = VOCM = MID SUPPLY 80 100 660514 G03 –40 0.1 1.0 10 100 FREQUENCY (MHz) 1000 660514 G04 660514f 5 LTC6605-14 TYPICAL PERFORMANCE CHARACTERISTICS Harmonic Distortion vs Frequency, BIAS High Harmonic Distortion vs Frequency, BIAS Floating –40 DIFFERENTIAL INPUT, HD2 DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD2 SINGLE-ENDED INPUT, HD3 –60 –70 –80 –90 –70 –60 –80 –90 –70 –80 –90 –100 –100 –100 –110 –110 –110 –120 1 10 100 FREQUENCY (MHz) 660514 G05 VIN = 2VP-P, VS = 3V RL = 400Ω DIFFERENTIAL, GAIN = 1V/V 0.1 Harmonic Distortion vs Input Common Mode Voltage (VS = 3V) –40 –60 –70 –80 –90 –70 –80 –90 –100 –100 –110 –110 –120 –0.5 1.5 0 1 0.5 2 2.5 INPUT COMMON MODE VOLTAGE (V) 3 VIN = 2VP-P, VOCM = 1.5V 660514 G08 BIAS = 3V, f = 3MHz RL = 400Ω DIFFERENTIAL, GAIN = 1V/V –120 –0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 INPUT COMMON MODE VOLTAGE (V) –30 BIAS = FLOAT 10 1 1 0.001 OUTPUT NOISE SPECTRAL DENSITY INTEGRATED OUTPUT NOISE 0.01 0.1 1 FREQUENCY (MHz) 10 0.1 100 660514 G10 Overdrive Transient Response +OUT –OUT –IN2 +IN2 1.0 –50 –80 100 10 –40 –70 660514 G07 100 1.5 –60 6 5 VS = 3V BIAS TIED TO V+ 2.0 VOLTAGE (V) CHANNEL SEPARATION (dB) BIAS = V+ 4 3 VIN (VP-P) Differential Output Noise vs Frequency VIN = 2VP-P, VOCM = 2.5V 660514 G09 BIAS = 5V, f = 3MHz RL = 400Ω DIFFERENTIAL, GAIN = 1V/V Channel Separation vs Frequency –20 2 VS = 3V, BIAS TIED TO V+, VINCM = VOCM = 1.5V, RLOAD = 400Ω, fIN = 3MHz, GAIN = 1V/V 1000 DIFFERENTIAL INPUT, HD2 DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD2 SINGLE-ENDED INPUT, HD3 –50 DISTORTION (dBc) DISTORTION (dBc) –40 1 INTEGRATED NOISE (μVRMS) –60 0 1 10 100 FREQUENCY (MHz) 660514 G06 VIN = 2VP-P, VS = 3V RL = 400Ω DIFFERENTIAL, GAIN = 1V/V Harmonic Distortion vs Input Common Mode Voltage (VS = 5V) DIFFERENTIAL INPUT, HD2 DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD2 SINGLE-ENDED INPUT, HD3 –50 –120 0.1 NOISE SPECTRAL DENSITY (nV/√Hz) –120 DIFFERENTIAL INPUT, HD2 DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD2 SINGLE-ENDED INPUT, HD3 –50 DISTORTION (dBc) –50 DISTORTION (dBc) DISTORTION (dBc) –60 –40 –40 DIFFERENTIAL INPUT, HD2 DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD2 SINGLE-ENDED INPUT, HD3 –50 Harmonic Distortion vs Input Amplitude 0.5 0 –0.5 –90 –1.0 –100 –1.5 –110 –120 0.1 –2.0 1 10 100 FREQUENCY (MHz) VIN = 1VP-P, VS = 3V RL = 400Ω DIFFERENTIAL 1000 660514 G11 50ns/DIV VS = 3V, VOCM = 1.5V BIAS = 3V, RLOAD = 400Ω 660514 G12 660514f 6 LTC6605-14 TEST CIRCUITS LTC6605-14 IL 81.5pF 22 200Ω 200Ω 100Ω 125Ω 25Ω V –OUT 1 + 48.2pF 2 V+ 21 VINP 0.1μF – RBAL 0.1μF + – BIAS BIAS 3 – + – VINM 100Ω + V– 20 125Ω 48.2pF 0.1μF V+ RBAL 36k 4 VOCM 19 36k 200Ω 200Ω VOUTCM 0.01μF V– 5 IL 81.5pF V +OUT 18 25Ω 660514 TC01 Figure 1. DC Test Circuit (Channel A Shown) LTC6605-14 81.5pF 22 1μF V +IN 200Ω 200Ω 100Ω 125Ω V –OUT 100Ω 1μF 1 48.2pF 2 V+ 21 COILCRAFT TTWB-4-B 0.1μF 0.1μF + – + BIAS VIN BIAS 3 – – + 100Ω 125Ω 48.2pF 36k VOCM 19 36k V –IN 200Ω 200Ω 50Ω 0.1μF V+ 4 1μF V– 20 0.01μF V– 5 81.5pF 18 V +OUT 100Ω 1μF 660514 TC02 Figure 2. AC Test Circuit (Channel A Shown) 660514f 7 LTC6605-14 PIN FUNCTIONS +IN2 A, –IN2 A, +IN2 B, –IN2 B (Pins 1, 5, 7, 11): Inputs to Trimmed 200Ω Resistors. Can accept an input signal, be floated, tied to an output pin, or connected to external components. VOCMA, VOCMB (Pins 19, 13): The voltage applied to these pins sets the output common mode voltage of each filter channel. If left floating, VOCM self-biases to a voltage midway between V+ and V –. +IN1 A, –IN1 A, +IN1 B, –IN1 B (Pins 2, 4, 8, 10): Inputs to Trimmed 100Ω Resistors. Can accept an input signal, be floated, tied to an output pin, or connected to external components. V+ A, V+ B (Pins 21, 15): Positive Supply for Filter Channel A and B, Respectively. These are not connected to each other internally. BIAS A, BIAS B (Pins 3, 9): Three-State Input to Select Amplifier Power Consumption. Drive low for shutdown, drive high for full power, leave floating for medium power. BIAS presents an input resistance of approximately 150k to a voltage 1.15V above V –. –OUT A, +OUT A, –OUT B, +OUT B (Pins 22, 18, 16, 12): Differential Output Pins. Exposed Pad (Pin 23): Always tie the underlying Exposed Pad to V –. If split supplies are used, do not tie the pad to ground. V – (Pins 6, 14, 17, 20): Negative Supply. All V – pins should be connected to the same voltage, either a ground plane or a negative supply rail. 660514f 8 LTC6605-14 BLOCK DIAGRAM 81.5pF 22 –OUT A +IN2 A 200Ω 200Ω 100Ω 125Ω 1 +IN1 A 2 BIAS A 3 48.2pF + 21 V A – + 20 V – BIAS + – 100Ω –IN1 A 125Ω 48.2pF V+ A 36k 19 VOCMA 4 36k 200Ω –IN2 A 200Ω V– 5 81.5pF 18 +OUT A V– – 17 V 6 81.5pF 16 –OUT B +IN2 B 7 +IN1 B 8 200Ω 200Ω 100Ω 125Ω 48.2pF 15 V + B – + BIAS B 9 BIAS – 14 V + – 100Ω 125Ω 200Ω 200Ω 48.2pF V+ B 36k 13 VOCMB –IN1 B 10 36k V– –IN2 B 11 81.5pF 12 +OUT B 660514 BD 660514f 9 LTC6605-14 APPLICATIONS INFORMATION Functional Description The LTC6605-14 is designed to make the implementation of high frequency fully differential filtering functions very easy. Two very low noise amplifiers are surrounded by precision matched resistors and precision matched capacitors enabling various filter functions to be implemented by hard wiring pins. The amplifiers are wide band, low noise and low distortion fully differential amplifiers with accurate output phase balancing. They are optimized for driving low voltage, single-supply, differential input analog-todigital converters (ADCs). The LTC6605-14 operates with a supply voltage as low as 2.7V and accepts inputs up to 325mV below the V– power rail, which makes it ideal for converting ground referenced, single-ended signals into differential signals that are referenced to the user-supplied common mode voltage. This is ideal for driving low voltage, single-supply, differential input ADCs. The balanced differential nature of the amplifier and matched surrounding components provide even-order harmonic distortion cancellation, and low susceptibility to common mode noise (like power supply noise). The LTC6605-14 can be operated with a single-ended input and differential output, or with a differential input and differential output. The outputs of the LTC6605-14 can swing rail-to-rail. They can source or sink a transient 70mA of current. Load capacitances should be decoupled with at least 25Ω of series resistance from each output. Filter Frequency Response and Gain Adjustment Figure 3 shows the filter architecture. The Laplace transfer function can be expressed in the form of the following generalized equation for a 2nd order lowpass filter: VOUT(DIFF) VIN(DIFF) = GAIN s2 s + 1+ 2πfO • Q (2πf ) 2 , O with GAIN, fO and Q as given in Figure 3. Note that GAIN and Q of the filter are based on component ratios, which both match and track extremely well over temperature. The corner frequency fO of the filter is a function of an RC product. This RC product is trimmed to ±1% and is not expected to drift by more than ±1% from nominal over the entire temperature range –40°C to 85°C. As a result, fully differential filters with tight magnitude, phase tolerance and repeatability are achieved. Various values for resistors R1 and R4 can be formed by pin-strapping the internal 100Ω and 200Ω resistors, and optionally by including one or more external resistors. Note that non-zero source resistance should be combined with, and included in, R1. R2 200Ω C2 81.5pF R3 125Ω R1 + R4A VIN(DIFF) C1 48.2pF + – – REXT VOUT(DIFF) + – + R4B – R1 R3 125Ω C1 48.2pF C2 81.5pF R2 200Ω R4 = R4A + R4B + REXT 660514 F03 Figure 3. Filter Architecture and Equations 660514f 10 LTC6605-14 APPLICATIONS INFORMATION Setting the passband gain (GAIN = R2/R1) only requires choosing a value for R1, since R2 is a fixed internal 200Ω. Therefore, the following three gains can be easily configured without external components: Figure 4 shows three filter configurations with an f–3dB = 12.3MHz, without any external components. These filters have a Q = 0.57, which is an almost ideal Bessel characteristic with linear phase. Table 1. Configuring the Passband Gain Without External Components Figure 5 shows filter configurations that use some external resistors, and are tailored for a very flat passband. GAIN (V/V) GAIN (dB) R1 (Ω) 1 0 200 Drive the 200Ω Resistors. Tie the 100Ω Resisters Together. 2 6 100 Drive the 100Ω Resistors. 3 9.5 66.7 Drive the 200Ω and 100Ω Resistors in Parallel. INPUT PINS TO USE Many other configurations are possible by using the equations in Figure 3. For example, external resistors can be added to modify the value of R1 to configure GAIN ≠ 1. For an even more flexible filter IC with similar performance, consider the LTC6601. BIAS Pin The resonant frequency, fO , is independent of R1, and therefore independent of the gain. For any LTC6605-14 filter configuration that conforms to Figure 3, the fO is fixed at 16.1MHz. The f–3dB frequency depends on the combination of fO and Q. For any specific gain, Q is adjusted by the selection of R4. Setting the f–3dB Frequency Using an external resistor (REXT), the f–3dB frequency is adjustable in the range of 12.4MHz to 20.0MHz (see Figure 3). The minimum f–3dB is set for REXT equal to 0Ω and the maximum f–3dB is arbitrarily set for a maximum passband gain peak less than 1dB. Table 2. REXT Selection GAIN = 1, R1 = 200Ω, R4A = R4B = 100Ω f–3dB (MHz) REXT Ω 12.4 0 14 30.9 14.5 41.2 15 52.3 15.5 64.9 16 78.7 16.5 80.6 17 110 17.5 127 18 150 18.5 174 19 205 19.5 241 20 287 Each channel of the LTC6605-14 has a BIAS pin whose function is to tailor both performance and power. The BIAS pin can be modeled as a voltage source whose potential is 1.15V above the V– supply and that has a Thevenin equivalent resistance of 150k. This three-state pin has fixed logic levels relative to V– (see the Electrical Characteristics table), and can be driven by any external source that can drive the BIAS pin’s equivalent input impedance. If the BIAS pin is tied to the positive supply, the part is in a fully active state configured for highest performance (lowest noise and lowest distortion). If the BIAS pin is floated (left unconnected), the part is in a fully active state, but with amplifier currents reduced and performance scaled back to preserve power consumption. Care should be taken to limit external leakage currents to this pin to under 1μA to avoid putting the part in an unexpected state. If the BIAS pin is tied to the most negative supply (V–), the part is in a low power shutdown mode with amplifier outputs disabled. In shutdown, all internal biasing current sources are shut off, and the output pins each appear as open collectors with a non-linear capacitor in parallel and steering diodes to either supply. Because of the non-linear capacitance, the outputs can still sink and source small amounts of transient current if exposed to significant voltage transients. Using this function to wire-OR outputs together is not recommended. 660514f 11 LTC6605-14 APPLICATIONS INFORMATION 1 22 1 + 2 4 4 5 7 18 5 16 7 + 10 11 12 5 16 7 12 660514 F04c Gain Response Gain Response 10 0 –10 –20 GAIN MAGNITUDE (dB) 10 GAIN MAGNITUDE (dB) 10 0 –10 –20 –30 –30 10 100 FREQUENCY (MHz) 1000 –40 0.1 1 10 100 FREQUENCY (MHz) 1000 Phase and Group Delay Response –20 –40 0.1 1 10 100 FREQUENCY (MHz) –20 18 660514 G04f GAIN = 1V/ V 16 GROUP DELAY 12 –100 10 –120 8 –140 6 –160 4 –180 2 0 1000 GROUP DELAY (ns) 14 PHASE 10 100 FREQUENCY (MHz) 1000 Small Signal Step Response 20 –60 PHASE (DEG) –10 660514 G04e 0 –40 0 –30 660514 G04d 1 12 f–3dB = 12.3MHz GAIN = 3V/ V (9.5dB) ZIN = 133Ω 20 –200 0.1 – 660514 F04b 20 –80 16 + 11 f–3dB = 12.3MHz GAIN = 2V/ V (6dB) ZIN = 200Ω Gain Response 1 18 10 20 –40 0.1 – 8 11 f–3dB = 12.3MHz GAIN = 1V/ V (0dB) ZIN = 400Ω GAIN MAGNITUDE (dB) 18 – 660514 F04a + 4 + 10 22 2 – 8 – 1 + 2 – 8 22 100mV/DIV 20ns/DIV 660514 G04i 660514 G04j Figure 4. f–3dB = 12.3MHz Filter Configurations without External Components 660514f 12 LTC6605-14 APPLICATIONS INFORMATION 1 2 22 1 + 22 + 2 200Ω 4 4 – – 5 18 5 18 7 16 7 16 8 + + 8 200Ω 10 10 – 11 12 – 11 12 660514 F05a 660514 F05c ±0.4dB 14MHz PASSBAND GAIN = 1V/ V (0dB) ZIN = 400Ω ±0.4dB 14MHz PASSBAND GAIN = 2V/ V (6dB) ZIN = 200Ω Gain Response 10 0 0 GAIN MAGNITUDE (dB) GAIN MAGNITUDE (dB) Gain Response 10 –10 –20 –10 –20 –30 –30 –40 0.1 1 10 100 FREQUENCY (MHz) –40 0.1 1000 1 10 100 FREQUENCY (MHz) 660514 G05d 660514 G05e Passband Phase and Group Delay 30 1000 Small Signal Step Response 55 GAIN = 1V/ V 50 45 0 PHASE (DEG) 40 –30 35 30 25 –60 20 –90 100mV/DIV 15 GROUP DELAY –120 0.1 GROUP DELAY (ns) PHASE 1 10 FREQUENCY (MHz) 10 5 100 20ns/DIV 660514 G05i 660514 G05j Figure 5. Flat Passband Filter Configurations with Some External Resistors 660514f 13 LTC6605-14 APPLICATIONS INFORMATION Input Impedance Calculating the low frequency input impedance depends on how the inputs are driven. Figure 6 shows a simplified low frequency equivalent circuit. For balanced input sources (VINP = –VINM), the low frequency input impedance is given by the equation: RINP = RINM = R1 Therefore, the differential input impedance is simply: RIN(DIFF) = 2 • R1 R2 RINP + R1 – R3 VINP – – + VOUTDIFF R3 VINM – R1 + R2 RINM VOUT– + VOUT+ VOCM 0.1μF the ESD protection diodes on the input pins, neither input should swing further than 325mV below the V– power rail. Therefore, the input common mode voltage should be constrained to: R1 VINDIFF VINCM 1+ 2 R2 R1 • V + 1.4V VOCM R2 V 325mV + ( ) The specifications in the Electrical Characteristics table are a special case of the general equation above. For a single 3V power supply, (V+ = 3V, V – = 0V) with VOCM = 1.5V, ΔVINDIFF = ±0.25V and R1 = R2, the valid input common mode range is: –200mV ≤ VINCM ≤ 1.7V Likewise, for a single 5V power supply, (V+ = 5V, V – = 0V) with VOCM = 2.5V, ΔVINDIFF = ±0.25V and R1 = R2, the valid input common mode range is: 660514 F06 Figure 6. Input Impedance For single-ended inputs (VINM = 0), the input impedance increases over the balanced differential case due to the fact that the summing node (at the junction of R1, R2 and R3) moves in phase with VINP to bootstrap the input impedance. Referring to Figure 6 with VINM = 0, the input impedance looking into either input is: R1 RINP = RINM 1 R2 1 • 2 R1+ R2 Input Common Mode Voltage Range The input common mode voltage is defined as the average of the two inputs into resistor R1: VINCM = VINP + VINM 2 The input common mode range is a function of the filter configuration (GAIN), VINDIFF and the VOCM potential. Referring to Figure 6, the summing junction where R1, R2 and R3 merge together should not swing within 1.4V of the V+ power supply. Additionally, to avoid forward biasing –200mV ≤ VINCM ≤ 4.7V Output Common Mode and VOCM Pin The output common mode voltage is defined as the average of the two outputs: VOUTCM = VOCM = VOUT + + VOUT − 2 As the equation shows, the output common mode voltage is independent of the input common mode voltage, and is instead determined by the voltage on the VOCM pin, by means of an internal feedback loop. If the VOCM pin is left open, an internal resistor divider develops a potential halfway between the V+ and V– voltages. The VOCM pin can be overdriven to another voltage if desired. For example, when driving an ADC, if the ADC makes a reference available for setting the common mode voltage, it can be directly tied to the VOCM pin, as long as the ADC is capable of driving the input impedance presented by the VOCM pin as listed in the Electrical Characteristics table (RVOCM). The Electrical Characteristics table also specifies the valid range that can be applied to the VOCM pin. 660514f 14 LTC6605-14 APPLICATIONS INFORMATION Noise When comparing the LTC6605-14’s noise to that of other amplifiers, be sure to compare similar specifications. Standalone op amps often specify noise referred to the inputs of the op amp. The LTC6605-14’s internal op amp has input referred voltage noise of only 2.1nV/√Hz. In addition to the noise generated by the amplifier, the surrounding feedback resistors also contribute noise. A noise model is shown in Figure 7a. The output spot noise generated by both the amplifier and the feedback components is given in Figure 7b. Substituting the equation for Johnson noise of a resistor (e2nR = 4kTR) into the equation in Figure 7b and simplifying gives the result shown in Figure 7c. enR22 enR12 R1 enR32 enR32 enR12 R1 In+2 R3 R2 eni2 + eno2 R3 – In–2 enR22 R2 660514 F07a Figure 7a. Differential Noise Model eno = 2 2 2 2 R2 R2 R2 R2 2 e ni • 1+ + 2 • In • R2 + R3 • 1+ + 2 • enR1 • + 2 • enR3 • 1+ + 2 • enR2 R1 R1 R1 R1 Figure 7b 2 2 R2 R2 R2 R2 2 eno = eni • 1+ + 2 • In • R2 + R3 • 1+ + 8 • k • T • R2 • 1+ + R3 • 1+ R1 R1 R1 R1 Figure 7c 660514f 15 LTC6605-14 APPLICATIONS INFORMATION Board Layout and Bypass Capacitors For single-supply applications it is recommended that a high quality X5R or X7R, 0.1μF bypass capacitor be placed directly between V+ and the adjacent V– pin. The V– pins, including the Exposed Pad, should be tied directly to a low impedance ground plane with minimal routing. For split power supplies, it is recommended that additional high quality X5R or X7R, 0.1μF capacitors be used to bypass pin V+ to ground and V– to ground, again with minimal routing. For driving heavy differential loads (< 200Ω), additional bypass capacitance may be needed between V+ and V– for optimal performance. Keep in mind that small geometry (e.g., 0603) surface mount ceramic capacitors have a much higher self-resonant frequency than do leaded capacitors, and perform best in high speed applications. The VOCM pins should be bypassed to ground with a high quality ceramic capacitor (at least 0.01μF). In split-supply applications, the VOCM pin can be either bypassed to ground or directly hard wired to ground. Stray parasitic capacitances to any unused input pins should be kept to a minimum to prevent deviations from the ideal frequency response. The best approach is to remove the solder pads for the unused component pins and strip away any ground plane underneath. Floating unused pins does not reduce the reliability of the part. At the output, always keep in mind the differential nature of the LTC6605-14, because it is important that the load impedances seen by both outputs (stray or intended) be as balanced and symmetric as possible. This will help preserve the balanced operation that minimizes the generation of even-order harmonics and maximizes the rejection of common mode signals and noise. Driving ADCs The LTC6605-14’s rail-to-rail differential output and adjustable output common mode voltage make it ideal for interfacing to differential input ADCs. These ADCs are typically supplied from a single-supply voltage which can be as low as 3V (2.7V minimum), and have an optimal common mode input range near mid-supply. The LTC6605-14 makes interfacing to these ADCs easy, by providing antialiasing, single-ended to differential conversion and common mode level shifting. The sampling process of ADCs creates a transient that is caused by the switching in of the ADC sampling capacitor. This momentarily “shorts” the output of the amplifier as charge is transferred between amplifier and sampling capacitor. The amplifier must recover and settle from this 660514f 16 LTC6605-14 APPLICATIONS INFORMATION load transient before the acquisition period has ended, for a valid representation of the input signal. The LTC6605-14 will settle quickly from these periodic load impulses. The RC network between the outputs of the driver decouples the sampling transient of the ADC (see Figure 8). The capacitance serves to provide the bulk of the charge during the sampling process, while the two resistors at the outputs of the LTC6605-14 are used to dampen and attenuate any charge injected by the ADC. The RC filter gives the additional benefit of band limiting broadband output noise. The selection of the RC time constant is trial and error for a given ADC, but the following guidelines are recommended. Choose an RC time constant that is smaller than the reciprocal of the filter cutoff frequency configured 1/2 LTC6605-14 by the LTC6605-14. Time constants on the order of 2ns do a good job of filtering broadband noise. Longer time constants improve SNR at the expense of settling time. The resistors in the decoupling network should be at least 25Ω. Too large of a resistor will leave insufficient settling time. Too small of a resistor will not properly dampen the load transient of the sampling process, prolonging the time required for settling. In 16-bit applications, this will typically require a minimum of eleven RC time constants. The 10Ω resistors at the inputs to the ADC minimize the sampling transients that charge the RC filter capacitors. For lowest distortion, choose capacitors with low dielectric absorption, such as a C0G multilayer ceramic capacitor. R + 1 22 – 2 21 CONTROL C1 VIN D15 BIAS + 0.1μF 10Ω 1μF C2 20 3 4 3V – 5 19 10nF 10Ω • • AIN+ D0 ADC AIN– 3.3V VCM VOCM GND 1μF 2.2μF R 18 C1 CHANNEL A τ = R • (C1 + 2 • C2) 660514 F08 Figure 8. Driving an ADC 660514f 17 LTC6605-14 TYPICAL APPLICATIONS Dual, Matched, 4th Order 14MHz Lowpass Filter LTC6605-14 1 LTC6605-14 1 22 + 2 2 VINA 22 + 1.4k 4 VOUTA 4 – – 5 18 5 18 7 16 7 16 + 8 8 + 1.4k VINB 10 VOUTB 10 – 11 12 – 11 12 660514 TA02 THREE GAINS ARE POSSIBLE, AS SHOWN IN FIGURE 4 Gain Magnitude vs Frequency 10 0 GAIN (dB) –10 –20 –30 –40 –50 –60 0.1 1 10 FREQUENCY (MHz) 100 660514 TA03 660514f 18 LTC6605-14 PACKAGE DESCRIPTION DJC Package 22-Lead Plastic DFN (6mm × 3mm) (Reference LTC DWG # 05-08-1714) 0.889 NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3. DRAWING IS NOT TO SCALE 0.70 ±0.05 R = 0.10 0.889 3.60 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 5.35 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 6.00 ±0.10 (2 SIDES) 0.889 R = 0.10 TYP 3.00 ±0.10 (2 SIDES) R = 0.115 TYP 0.40 ± 0.05 12 22 0.889 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) 11 0.200 REF 1 0.25 ± 0.05 0.50 BSC 0.75 ±0.05 0.00 – 0.05 5.35 ± 0.10 (2 SIDES) PIN #1 NOTCH R0.30 TYP OR 0.25mm × 45° CHAMFER (DJC) DFN 0605 BOTTOM VIEW—EXPOSED PAD NOTE: 5. EXPOSED PAD SHALL BE SOLDER PLATED 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WXXX) 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION IN JEDEC PACKAGE OUTLINE M0-229 ON TOP AND BOTTOM OF PACKAGE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 660514f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC6605-14 TYPICAL APPLICATION Gain Magnitude vs Frequency Dual, Matched, 2nd Order 25MHz Lowpass Filter 3 0 LTC6605-14 1 –3 –6 VINA VOUTA 4 – 5 GAIN (dB) 2 22 + 18 –9 –12 –15 –18 7 8 –21 16 –24 + 0.1 VINB VOUTB 10 1 10 FREQUENCY (MHz) 660514 TA05 – 11 100 12 660514 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1568 4th Order Filter Building Block Lowpass and Bandpass Responses Up to 10MHz LTC6404 Rail-to-Rail Output Differential Op Amp 1.5nV/√Hz Noise, –95dBc Distortion at 10MHz LTC6406 3GHz Rail-to-Rail Input Differential Op Amp 1.6nV/√Hz Noise, –72dBc Distortion at 50MHz, 18mA LT6600-2.5/LT6600-5/ Differential 4th Order Lowpass Filters LT6600-10/LT6600-15/ LT6600-20 Cut-Off Frequencies of 2.5MHz/5MHz/10MHz/15MHz/20MHz LTC6601 Differential Pin-Configurable 2nd Order Filter Building Block 7MHz to 25MHz Pin-Configurable LT6604-2.5/LT6604-5 Dual Differential 4th Order Lowpass Filters Cut-Off Frequencies of 2.5MHz or 5MHz 660514f 20 Linear Technology Corporation LT 1208 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008