LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 • Pletronics LV96/LV98 Series is a quartz crystal controlled precision square wave generator with an LVDS output. • Solder pad compatible legacy LVDS oscillator solutions. • FR4 base using the LV93 or LV99 5x7 mm ceramic packaged SMD device. • Tape and Reel packaging is available. • 10.9 to 670 MHZ • Enable/Disable Function: LV98 on pad 2 LV96 on pad 1 • Low Jitter This series, LV96 and LV98, is not recommended for new designs. Use LV93 or LV99 series for new designs . Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 0.40 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4 Absolute Maximum Ratings: Parameter Unit VCC Supply Voltage -0.5V to +6.5V Vi Input Voltage -0.5V to VCC + 0.5V Vo Output Voltage -0.5V to VCC + 0.5V Thermal Characteristics The maximum die or junction temperature is 155oC The thermal resistance junction to board is 40 to 80oC/Watt depending on the solder pads, ground plane and construction of the PCB. Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty. Production processsing does not necessarily include testing of all parameters. Copyright © 2008, Pletronics Inc. LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 Part Number: LV9x 45 D E V -125.0M -XX Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Frequency in MHZ Supply Voltage VCC V = 3.3V _ + 10% Temperature Range blank = -10 to +70oC E = -40 to +85oC Series Model Frequency Stability 45 = _ + 50 ppm 44 = + _ 25 ppm 20 = + _ 20 ppm Series Model (x is 6 or 8) Part Marking: PLE LV9x FF.FFF M C YMDXX Marking Legend: PLE = Pletronics X = 6 or 8 FF.FFF M = Frequency in MHZ YMD = Date of Manufacture (year-month-day) All other marking is internal factory codes Codes for Date Code YMD Code Year 7 2007 Code A JAN Month Code Day Code Day Code Day 8 2008 9 2009 B FEB C MAR 0 2010 D APR E MAY 1 2011 F JUN 2 2012 G JUL H AUG J SEP K OCT L NOV M DEC 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A 10 B 11 C 12 D 13 E 14 F 15 G 16 H 17 J 18 K 19 L 20 M 21 N 22 P 23 R 24 T 25 U 26 V 27 W 28 X 29 Y 30 Z 31 www.pletronics.com 425-776-1880 2 LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 Electrical Specification for 3.30V _ +10% over the specified temperature range and the frequency range of 10.9 MHz to 670 MHz Item Min Max Unit Condition Frequency Accuracy “45" -50 +50 ppm “44" -25 +25 For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures “20" -20 +20 Output Waveform LVDS Output High Level -- 1.60 Volts Output Low Level 0.90 -- Volts Differential Output (VOD) 250 450 mVolts 1.125 1.375 Volts Differential Output Error (dVOS) -- 50 mVolts Output Symmetry 47 53 % Referenced to 50% of amplitude or crossing point Output TRISE and TFALL 150 230 pS Vth is 20% and 80% of waveform - 0.6 pS RMS - 2.8 Output Short Circuit Current - -20 mA Vcc Supply Current - 80 mA 50 - Kohm To Vcc (equivalent resistance) V disable - 0.8 Volts Referenced to Ground V enable 2.0 - Volts Referenced to Ground VOUT = VCC -20 +20 uA VOUT = 0V -20 +20 uA Enable - 10 nS Time for output to reach a logic state Disable time - 10 nS Time for output to reach a high Z state Start up time - 5 mS Measured from the time Vcc = 3.0V Output Offset Voltage (VOS) Jitter Enable/Disable Internal Pull-up Output leakage Operating Temperature Range Storage Temperature Range See load circuit R1 = 50 ohms Measured from 12KHz to 20MHz from Fnominal Measured from 10Hz to 20MHz from Fnominal -10 +70 o -40 +85 o -55 +125 o C C Vout = 0.0V Pad 1 low, device disabled Standard Temperature Range Extended Temperature Range “E” Option C Specifications with E/D open circuit or connected to VCC www.pletronics.com 425-776-1880 3 LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 Typical Phase-Noise Response 0 -20 dBc/Hz -40 -60 100MHz dBc/Hz -80 400MHz dBc/Hz -100 -120 -140 -160 10 1,000 100,000 10,000,000 Frequency (Hz) Load Circuit Test Waveform Symmetry Vhigh Out 80% 50% 20% Vlow Out* Trise Tfall Showing Out Measurement only www.pletronics.com 425-776-1880 4 LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 Reliability: Environmental Compliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002, Condition B Vibration MIL-STD-883 Method 2007, Condition A Solderability MIL-STD-883 Method 2003 Thermal Shock MIL-STD-883 Method 1011, Condition A ESD Rating Model Minimum Voltage Conditions Human Body Model 1500 MIL-STD-883 Method 3115 Charged Device Model 1000 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII (The part number will show as LV96xx or LV98xx) Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial Layout and application information For Optimum Jitter Performance, Pletronics recommends: • a ground plane under the device • no large transient signals (both current and voltage) should be routed under the device • do not layout near a large magnetic field such as a high frequency switching power supply • do not place near piezoelectric buzzers or mechanical fans. As much ground plane and thermal paths that can be realized under and to the side of the part is desired. www.pletronics.com 425-776-1880 5 LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 Mechanical: 1 6 2 5 All via holes tented on bottom Copper Clad 670 µinch (17 µm) Nickel plated 118 µinch (3 µm) Gold plated 0.8 µinch (0.02 µm) Typical thicknesses Pin 3 Ground plane is typical Not to scale Function mm B 0.356 + _ 0.005 9.04 + _ 0.13 C 0.126 + _ 0.005 3.21 + _ 0.13 D 0.324 + _ 0.005 8.23 + _ 0.13 F1 0.050 1.27 1 0.040 1.02 H1 0.059 1.50 I1 0.020 0.51 J1 0.040 1.02 K1 0.100 2.54 L1 0.062 1.57 3 4 FR4 PCB Base: Solder masked Label: laser marked lettering Inches G LV98 Pad LV96 Pad Note 2 1 Output When this pad is not connected the oscillator shall operate. This is not a Enable/Disable recommended condition!!!!!! When this pad is <0.80 volts, the output will be inhibited (High impedance state) Recommend connecting this pad to VCC if the oscillator is to be always on. 1 2 No function Recommend connecting this pad to ground. The is internal connection. 3 Ground (GND) 4 Output 5 Output* 6 Supply Voltage Recommend connecting appropriate power supply bypass capacitors as close as (VCC) possible. www.pletronics.com The outputs must be terminated, 100 ohms between the outputs is the ideal termination. Capacitor coupled terminations can be used. 425-776-1880 6 LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 Temperature (°C) Reflow Cycle (typical for lead free processing) 245°C Maximum 10 Seconds Maximum 250 215°C±10°C 200 175°C±10°C 150 100 Approximately 50 Seconds 120 to 160 Seconds The part may be reflowed 2 times without degradation. Allowed rate of temperature change Maximum 4°C per second Tape and Reel: available for quantities of 250 to 1000 per reel Constant Dimensions Table 1 Tape Size D0 8mm D1 Min E1 P0 1.0 S1 Min T Max T1 Max 0.6 0.6 0.1 2.0 +0.05 _ 12mm 1.5 1.5 1.75 4.0 16mm +0.1 -0.0 1.5 _ +0.1 _ +0.1 24mm P2 2.0 _ +0.1 1.5 Variable Dimensions Table 2 Tape Size B1 Max E2 Min F P1 T2 Max W Max Ao, Bo & Ko 24 mm 12.1 14.25 7.5 _ +0.1 16.0 + _0.1 8.0 16.3 Note 1 Note 1: Embossed cavity to conform to EIA-481-B Dimensions in mm Not to scale REEL DIMENSIONS A B inches 7.0 10.0 13.0 mm 177.8 254.0 330.2 inches 2.50 4.00 3.75 mm 63.5 101.6 95.3 Tape Width 24.4 +2.0 -0.0 24.0 C mm D mm 13.0 +0.5 / -0.2 --- --- Reel dimensions may vary from the above www.pletronics.com 425-776-1880 7 LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 IMPORTANT NOTICE Pletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and other changes to this product at anytime. PLE reserves the right to discontinue any product or service without notice. Customers are responsible for obtaining the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to PLE’s terms and conditions of sale supplied at the time of order acknowledgment. PLE warrants performance of this product to the specifications applicable at the time of sale in accordance with PLE’s limited warranty. Testing and other quality control techniques are used to the extent PLE deems necessary to support this warranty. Except where mandated by specific contractual documents, testing of all parameters of each product is not necessarily performed. PLE assumes no liability for application assistance or customer product design. Customers are responsible for their products and applications using PLE components. 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Resale of PLE products or services with statements different from or beyond the parameters stated by PLE for that product or service voids all express and implied warranties for the associated PLE product or service and is an unfair or deceptive business practice. PLE is not responsible for any such statements. Contacting Pletronics Inc. Pletronics Inc. Tel: 425-776-1880 th Fax: 425-776-2760 19013 36 Ave. West Lynnwood, WA 98036-5761 USA E-mail: [email protected] URL: www.pletronics.com Copyright © 2008, Pletronics Inc. www.pletronics.com 425-776-1880 8