SCAS290N − JANUARY 1993 − REVISED FEBRUARY 2004 D Operates From 1.65 V to 3.6 V D Specified From −40°C to 85°C and D, DB, NS, OR PW PACKAGE (TOP VIEW) −40°C to 125°C 1OE 1A 1Y 2OE 2A 2Y GND D Inputs Accept Voltages to 5.5 V D Max tpd of 4.8 ns at 3.3 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y 1A 1Y 2OE 2A 2Y description/ordering information This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation. VCC RGY PACKAGE (TOP VIEW) 1 14 2 13 4OE 3 12 4A 4 11 4Y 5 10 3OE 9 3A 6 7 8 GND The SN74LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. 3Y D 14 2 1OE D >2 V at VCC = 3.3 V, TA = 25°C Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) 1 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. ORDERING INFORMATION −40°C to 85°C QFN − RGY TOP-SIDE MARKING Reel of 1000 SN74LVC125ARGYR Tube of 50 SN74LVC125AD Reel of 2500 SN74LVC125ADR Reel of 250 SN74LVC125ADT SOP − NS Reel of 2000 SN74LVC125ANSR LVC125A SSOP − DB Reel of 2000 SN74LVC125ADBR LC125A Tube of 90 SN74LVC125APW Reel of 2000 SN74LVC125APWR Reel of 250 SN74LVC125APWT SOIC − D −40°C to 125°C ORDERABLE PART NUMBER PACKAGE† TA TSSOP − PW LC125A LVC125A LC125A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($% %$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCAS290N − JANUARY 1993 − REVISED FEBRUARY 2004 FUNCTION TABLE (each buffer) INPUTS OE A OUTPUT Y L H H L L L H X Z logic diagram (positive logic) 1OE 1A 2OE 2A 1 2 3OE 3 1Y 4 5 3A 4OE 6 2Y 4A 10 9 8 3Y 13 12 11 4Y absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Power dissipation, Ptot (TA = −40°C to 125°C) (see Notes 5 and 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5. 5. For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K. 6. For the DB, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCAS290N − JANUARY 1993 − REVISED FEBRUARY 2004 recommended operating conditions (see Note 7) Operating VCC Supply voltage VIH High-level input voltage VIL VI VO IOH IOL ∆t/∆v Low-level input voltage Data retention only VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 1.65 V to 1.95 V TA = 25°C MIN MAX MIN MAX MIN MAX 1.65 1.65 3.6 1.65 3.6 3.6 −40 TO 85°C −40 TO 125°C 1.5 1.5 1.5 0.65×VCC 1.7 0.65×VCC 1.7 0.65×VCC 1.7 2 VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V 2 UNIT V V 2 0.35×VCC 0.7 0.35×VCC 0.7 0.35×VCC 0.7 0.8 0.8 0.8 V Input voltage 0 5.5 0 5.5 0 5.5 V Output voltage 0 VCC −4 0 VCC −4 0 VCC −4 V High-level output current Low-level output current VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V −8 −8 −8 −12 −12 −12 mA −24 −24 −24 VCC = 1.65 V VCC = 2.3 V 4 4 4 8 8 8 VCC = 2.7 V VCC = 3 V 12 12 12 24 24 24 mA 8 8 8 ns/V Input transition rise or fall rate mA NOTE 7: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCAS290N − JANUARY 1993 − REVISED FEBRUARY 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = −100 µA IOH = −4 mA VOH MIN 1.65 V to 3.6 V IOH = −8 mA IOH = −12 mA IOH = −24 mA IOL = 100 µA TA = 25°C TYP −40 TO 85°C MAX MIN −40 TO 125°C MAX MIN MAX 1.65 V VCC−0.2 1.29 VCC−0.2 1.2 VCC−0.3 1.05 2.3 V 1.9 1.7 1.55 2.7 V 2.2 2.2 2.05 3V 2.4 2.4 2.25 3V 2.3 2.2 2 UNIT V 1.65 V to 3.6 V 0.1 0.2 0.3 IOL = 4 mA IOL = 8 mA 1.65 V 0.24 0.45 0.6 2.3 V 0.3 0.7 0.75 IOL = 12 mA IOL = 24 mA 2.7 V 0.4 0.4 0.6 3V 0.55 0.55 0.8 II IOZ VI = 5.5 V or GND VO = VCC or GND 3.6 V ±1 ±5 ±20 µA 3.6 V ±1 ±10 ±20 µA ICC VI = VCC or GND, IO = 0 One input at VCC − 0.6 V, Other inputs at VCC or GND 3.6 V 1 10 40 µA 500 500 5000 µA VOL ∆ICC Ci 2.7 V to 3.6 V VI = VCC or GND 3.3 V 5 V pF switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd ten tdis tsk(o) 4 FROM (INPUT) A OE OE TO (OUTPUT) Y Y Y VCC MIN TA = 25°C TYP MAX −40 TO 85°C −40 TO 125°C MIN MAX MIN MAX 1.8 V ± 0.15 V 1 4.5 11.8 1 12.3 1 13.8 2.5 V ± 0.2 V 1 2.7 5.8 1 6.3 1 8.4 2.7 V 1 3 5.3 1 5.5 1 7 3.3 V ± 0.3 V 1 2.5 4.6 1 4.8 1 6 1.8 V ± 0.15 V 1 4.3 13.8 1 14.3 1 15.8 2.5 V ± 0.2 V 1 2.7 6.9 1 7.4 1 9.5 2.7 V 1 3.3 6.4 1 6.6 1 8.5 3.3 V ± 0.3 V 1 2.4 5.2 1 5.4 1 7 1.8 V ± 0.15 V 1 4.3 10.6 1 11.1 1 12.6 2.5 V ± 0.2 V 1 2.2 5.1 1 5.6 1 7.7 2.7 V 1 2.5 4.8 1 5 1 6.5 3.3 V ± 0.3 V 1 2.4 4.4 1 4.6 1 3.3 V ± 0.3 V POST OFFICE BOX 655303 1 • DALLAS, TEXAS 75265 UNIT ns ns ns 6 1.5 ns SCAS290N − JANUARY 1993 − REVISED FEBRUARY 2004 operating characteristics, TA = 25°C TEST CONDITIONS PARAMETER Cpd Power dissipation capacitance per gate POST OFFICE BOX 655303 f = 10 MHz • DALLAS, TEXAS 75265 VCC TYP 1.8 V 7.4 2.5 V 11.3 3.3 V 15 UNIT pF 5 SCAS290N − JANUARY 1993 − REVISED FEBRUARY 2004 PARAMETER MEASUREMENT INFORMATION RL From Output Under Test CL (see Note A) VLOAD Open S1 GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH tPHL VOH VM Output VM VOL tPHL Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM VM 0V tPLZ tPZL VLOAD/2 VM VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ tPZH VOH Output VI Output Control VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSOI002B – JANUARY 1995 – REVISED SEPTEMBER 2001 D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 8 PINS SHOWN 0.020 (0,51) 0.014 (0,35) 0.050 (1,27) 8 0.010 (0,25) 5 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 1 4 0.010 (0,25) 0°– 8° A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.010 (0,25) 0.004 (0,10) 0.069 (1,75) MAX PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047/E 09/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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