ETC MAS9275C4TG00

DA9275.007
19 February 2004
MAS9275
IC FOR 10.00 – 36.00 MHz VCXO
•
•
•
•
•
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Square Wave (CMOS) Output
Very Low Phase Noise
Low Power
Wide Supply Voltage Range
Very High Level of Integration
Low Cost
DESCRIPTION
MAS9275 is a VCXO IC to be used in making
VCXO modules for telecommunication and other
applications. To build a complete VCXO only one
additional component, a crystal, is needed.
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
Very small size
Minimal current consumption
Wide operating temperature range
Phase noise <-130 dBc/Hz at 1 kHz offset
Square wave (CMOS) output
VCXO for telecommunications systems
VCXO for set-top boxes
VCXO for MPEG
BLOCK DIAGRAM
PD
VC
OUT
MAS9275
VDD
VSS
X1
X2
X'Tal
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19 February 2004
PIN DESCRIPTION
Pin Description
Crystal/Varactor Oscillator Input
Voltage Control Input
Power Supply Ground
Buffer Output
Power Supply Voltage
Tri State
Crystal Oscillator Output
Symbol
x-coordinate
y-coordinate
X1
VC
VSS
OUT
VDD
PD
X2
209
425
600
1029
841
379
197
161
165
175
1030
1016
1028
1030
Note
Note: Because the substrate of the die is internally connected to GND, the die has to be connected to GND or
left floating. Please make sure that GND is the first pad to be bonded. Pick-and-place and all component
assembly are recommended to be performed in ESD protected area.
Note: Pad coordinates are measured from the left bottom corner of the chip to the center of the pads. The
coordinates may vary depending on sawing width and location, however, distances between pads are accurate.
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Input Pin Voltage
Power Dissipation
Storage Temperature
ESD Rating
Symbol
Conditions
VDD VSS
PMAX
TST
Min
Max
Unit
-0.3
6.0
V
VSS -0.3
VDD + 0.3
100
120
2
V
mW
o
C
kV
-55
HBM
Note
RECOMMENDED OPERATION CONDITIONS
Parameter
Supply Voltage
Supply Current
Operating Temperature
Voltage Control Line
Impedance
Crystal Pulling Sensitivity
Crystal Load Capacitance
Symbol
VDD
IDD
TOP
VcIMP
S
CL
Conditions
Min
Typ
Max
Unit
Note
2.5
2.8
2.3
5.5
V
mA
o
C
MΩ
1)
VDD = 2.8 V
-40
MAS9275A,
MAS9275B
+85
1
30
VC = 1.65 V
MAS9275A1
MAS9275B2
MAS9275B3
MAS9275C2
MAS9275C3
MAS9275C4
ppm/pF
pF
8
10
10.5
10
10.5
10.5
2)
2)
2)
Note 1: It is recommend to connect a 1 nF capacitor to the VDD pin (either in a module or in an end
application).
Note 2: Crystal Load Capacitance is typically 8.2 pF, when VC = 2.5 V.
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19 February 2004
ELECTRICAL CHARACTERISTICS
(recommended operation conditions)
Parameter
Symbol
Min
Frequency Range
fo
Voltage Control Range
VC
Voltage Control Sensitivity
Typ
Max
Unit
Note
10.00
36.00
MHz
1)
0
VDD
V
VCSENS
100
ppm/V
Output Voltage (10 pF, VDD 2.7 V)
Vout
2.3
Vpp
Output Voltage (10 pF, VDD 5.0 V)
Vout
4.5
Vpp
Rise and Fall Time (10 - 50 pF)
10
Output Symmetry
Startup Time
TSTART
Tri State Output Buffer
ON State
OFF State
Tri State Output Buffer
ON State
OFF State
ns
40-60
%
2
ms
PD
0
1.6
0.55
VDD
1.6
0
VDD
0.55
PD
2)
V
3)
V
4)
Note 1: An RS < 20 Ω crystal provides 36 MHz maximum frequency. With an RS = 70 Ω crystal the maximum
frequency is typically 20 MHz.
Note 2: VC sensitivity value depends on the crystal used. With a 30 ppm/pF crystal typical values are:
A1 > 100 ppm/V, B2 > 75 ppm/V, B3 > 60 ppm/V, C2 > 75 ppm/V, C3 > 60 ppm/V, C4 > 55 ppm/V.
Note 3: MAS9275A, MAS9275B
Note 4: MAS9275C
Note 5: If the Tri State Output Buffer is floating (i.e., PD pin not connected), the oscillator is ON in all models
(MAS9275A, -B and -C)
1290 µm
IC OUTLINES
X2
PD
X1
VC
VDD
OUT
VSS
MAS9275
Die map reference
1220 µm
Note 1: MAS9275 pads are round with 80 µm diameter at opening.
Note 2: Die map reference is the actual left bottom corner of the sawn chip.
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19 February 2004
EXTERNAL COMPONENT SELECTION
MAS9275 requires a minimum number of external components for proper operation.
Quartz Crystal
The MAS9275 VCXO function consists of the
external crystal and the integrated VCXO oscillator
circuit. To assure the best system performance
(frequency pull range) and reliability, a crystal
device with the recommended parameters (shown
below) must be used, and the layout guidelines in
the following section must be followed. The
frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. MAS9275 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for
use with the MAS9275B2 is designed to have zero
frequency error when the total of on-chip + stray
capacitance is 10 pF (See Note 1 on page 2 for
other capacitance options).
Recommended Crystal Parameters:
Initial Accuracy at 25°C ±20 ppm
Temperature Stability ±30 ppm
Crystal Load Capacitance 10 pf (See Note1 below)
Crystal Shunt Capacitance, C0 2 pF Typical
C0/C1 Ratio Typical ≤ 300
Equivalent Series Resistance 20 Ω max. Crystals with higher ESR can be used if frequency is < 36 MHz. See
Note 2 under Electrical Characteristics on Page 3.
The external crystal must be connected as close to the chip as possible and should be on the same side of the
PCB as the MAS9275. There should be no vias between the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the crystal.
Note 1. If the crystal with a load other than the nominal Crystal Load Capacitance as defined in Recommended
Operation Conditions on page 2 is used with MAS9275, the crystal has to have frequency offset in order to
have the nominal frequency at VC = 1.65 V or at VC = 2.5 V. Please see table below for offset frequencies vs.
crystal load. (Values are for a typical crystal with S = 30 ppm/pF.)
19.68
8
Crystal frequency
Crystal Load
A1
B2, C2
B3, C3, C4
B3, C3, C4
VC voltage
1.65 V
1.65 V
1.65 V
2.5 V
+0
+60
+85
+30
19.68
27.00
40.00
10
12.5
16
Offset in crystal frequency
-60
-150
-240
0
-75
-180
+25
-50
-155
-30
-105
-210
MHz
pF
ppm
ppm
ppm
ppm
Note: 19.68 MHz crystal with 10 pF load capacitance used with MAS9275B2 or C2 may not require frequency
offset because of small deviation
For example:
For application using MAS9275B2 or C2 with nominal frequency of 27.00 MHz a crystal with 12.5 pF load has to
have a frequency of 27.00 MHz + ((27.00 MHz/106) x (- 90)) = 26.99757 MHz.
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19 February 2004
MODULATION RESPONSE
Figure 2. Modulation response (gain).
MAS9275B3/C3 Modulation Response
2.00
2
0.00
0
-2.00
-2
Gain (dB)
Gain (dB)
MAS9275B2/C2 Modulation Response
-4.00
-4
-6.00
-6
-8.00
-8
-10.00
-10
0.1
1
10
100
0.1
Frequency (kHz)
1
10
100
Frequency (kHz)
TYPICAL APPLICATION
MAS9275B2/B3/C2/C3
Vdd
1n
C1
X2 1
20
2
19
X1 3
Vcontrol
R1
Modulation In
C2
GND 6
17
MAS9275
YYWW
XXXXX.X
VC
5
47n
18 PD
4
50k
16 VDD
15
7
14
8
13
9
12
10
Top marking:
YYWW = Year, Week
XXXXX.X = Lot number
11
OUT
C6
10n
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DA9275.007
19 February 2004
SAMPLES IN SB20 DIL PACKAGE
X2 1
20
2
19
X1 3
18 PD
4
VSS 6
MAS9275
YYWW
XXXXX.X
VC 5
17
16 VDD
Top marking:
YYWW = Year, Week
XXXXX.X = Lot number
15
7
14
8
13
9
12
11 OUT
10
DEVICE OUTLINE CONFIGURATION
MSOP 8
pin 1
X1
9275
BX
VSS
YWW
VC
X2
PD
Top View
VDD
OUT
B = product version
X = MAS internal code
Y = year
WW= week
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DA9275.007
19 February 2004
PACKAGE (MSOP-8) OUTLINE
Gage plane
F
E1 E
Land
Pattern
Recommendation
P
R
A
Q
L
A
R1
N
e
D
G
A2
A1
c
M
c1
b1
(b)
A
Section A - A
b
Symbol
Min
A
A1
A2
b
b1
c
c1
D
E
E1
e
F
G
L
(Terminal length for
soldering)
M
N
P
Q
R
R1
0
0.75
0.22
0.22
0.08
0.08
0.40
Nom
0.85
0.30
3.00 BSC
4.90 BSC
3.00 BSC
0.65 BSC
4.8
0.65
0.60
Max
Unit
1.10
0.15
0.95
0.38
0.33
0.23
0.18
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
0.80
0.41
1.02
0°
mm
mm
8°
0.25 BSC
0.07
0.07
mm
mm
mm
Dimensions do not include mold or interlead flash, protrusions or gate burrs.
All measurement according to JEDEC standard MO-187.
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DA9275.007
19 February 2004
SOLDERING INFORMATION
Resistance to Soldering Heat
Maximum Temperature
Maximum Number of Reflow Cycles
Reflow profile
According to RSH test IEC 68-2-58/20 2*220°C
240°C
2
Thermal profile parameters stated in JESD22-A113 should not
be exceeded. http://www.jedec.org
max 0.08 mm
Solder plate 7.62 - 25.4 µm, material Sn 85% Pb 15%
Seating Plane Co-planarity
Lead Finish
EMBOSSED TAPE SPECIFICATIONS
P1
T
DO
PO
P2
E
W
F
BO
A
AO
KO
D1
Section A-A
User Direction of Feed
Pin 1 Designator
Dimension
Min/Max
Unit
Ao
Bo
Do
D1
E
F
Ko
Po
P1
P2
T
W
5.00 ±0.10
3.20 ±0.10
1.50 +0.1/-0.0
1.50 min
1.75
5.50 ±0.05
1.45 ±0.10
4.0
8.0
±0.10
2.0
±0.05
0.3
±0.05
12.00 +0.30/-0.10
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
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DA9275.007
19 February 2004
REEL SPECIFICATIONS
W2
A
D
C
Tape Slot for Tape Start
N
B
W1
5000 Components on Each Reel
Reel Material: Conductive, Plastic Antistatic or Static Dissipative
Carrier Tape Material: Conductive
Cover Tape Material: Static Dissipative
Carrier Tape
Cover Tape
End
Start
Trailer
Dimension
A
B
C
D
N
W1 (measured at hub)
W2 (measured at hub)
Trailer
Leader
Weight
Leader
Components
Min
1.5
12.80
20.2
50
12.4
Max
Unit
330
mm
mm
mm
mm
mm
mm
mm
mm
mm
13.50
14.4
18.4
160
390,
of which minimum 160
mm of empty carrier tape
sealed with cover tape
1500
g
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DA9275.007
19 February 2004
ORDERING INFORMATION
Product Code
Product
Typical Vc-Sensitivity
(with 30 ppm/pF crystal)
Package
MAS9275A1TG00
IC FOR 2.8 V VCXO
Negative PD logic
IC FOR 2.8 V VCXO
Negative PD logic
IC FOR 3.3 V VCXO
Negative PD logic
IC FOR 3.3 V VCXO
Negative PD logic
IC FOR 5.0 V VCXO
Negative PD logic
IC FOR 5.0 V VCXO
Negative PD logic
IC FOR 3.3 V VCXO
Positive PD logic
IC FOR 3.3 V VCXO
Positive PD logic
IC FOR 5.0 V VCXO
Positive PD logic
IC FOR 5.0 V VCXO
Positive PD logic
IC FOR 5.0 V VCXO
Positive PD logic
IC FOR 5.0 V VCXO
Positive PD logic
> 100 ppm/V
EWS tested wafers 215 µm
> 100 ppm/V
MSOP-8, T&R/5000 pcs/r.
> 75 ppm/V
EWS tested wafers 215 µm
> 75 ppm/V
MSOP-8, T&R/5000 pcs/r.
> 60 ppm/V
EWS tested wafers 215 µm
> 60 ppm/V
MSOP-8, T&R/5000 pcs/r.
> 75 ppm/V
EWS tested wafers 215 µm
> 75 ppm/V
MSOP-8, T&R/5000 pcs/r.
> 60 ppm/V
EWS tested wafers 215 µm
> 60 ppm/V
MSOP-8, T&R/5000 pcs/r.
> 55 ppm/V
EWS tested wafers 215 µm
> 55 ppm/V
MSOP-8, T&R/5000 pcs/r.
MAS9275A1SM06
MAS9275B2TG00
MAS9275B2SM06
MAS9275B3TG00
MAS9275B3SM06
MAS9275C2TG00
MAS9275C2SM06
MAS9275C3TG00
MAS9275C3SM06
MAS9275C4TG00
MAS9275C4SM06
Contact Micro Analog Systems Oy for other wafer thickness options.
LOCAL DISTRIBUTOR
MICRO ANALOG SYSTEMS OY CONTACTS
Micro Analog Systems Oy
Kamreerintie 2, P.O. Box 51
FIN-02771 Espoo, FINLAND
Tel. +358 9 80 521
Fax +358 9 805 3213
http://www.mas-oy.com
NOTICE
Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or
performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown
in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that
the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog
Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
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