MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors General Description Features The MAX16000–MAX16007 are low-voltage, quad-/hex-/ octal-voltage µP supervisors in small TQFN and TSSOP packages. These devices provide supervisory functions for complex multivoltage systems. The MAX16000/ MAX16001/MAX16002 monitor four voltages, the MAX16003/MAX16004/MAX16005 monitor six voltages, and the MAX16006/MAX16007 monitor eight voltages. o Fixed Thresholds for 5V, 3.3V, 3V, 2.5V, 1.8V, 1.5V, 1.2V, and 0.9V Systems o Adjustable Thresholds Monitor Voltages Down to 0.4V o Open-Drain Outputs with Internal Pullups Reduce the Number of External Components o Fixed 140ms (min) or Capacitor-Adjustable Reset Timeout o Manual Reset, Margin Enable, and Tolerance Select Inputs o Watchdog Timer 1.6s (typ) Timeout Period 54s Startup Delay After Reset (Except MAX16005) o Independent Watchdog Output (MAX16005) o RESET Output Indicates All Voltages Present o Independent Voltage Monitors o Guaranteed Correct Logic State Down to VCC = 1V o Small (4mm x 4mm) TQFN Package o TSSOP (5mm x 4.4mm) Package (MAX16005) The MAX16000/MAX16001/MAX16003/MAX16004/ MAX16006 offer independent outputs for each monitored voltage. The MAX16001/MAX16002/MAX16004– MAX16007 offer a reset output that asserts whenever any of the monitored voltages fall below their respective thresholds or the manual reset input is asserted. The reset output remains asserted for the reset timeout after all voltages are above their respective thresholds and the manual reset input is deasserted. The minimum reset timeout is internally set to 140ms or can be adjusted with an external capacitor. All open-drain outputs have internal 30µA pullups that eliminate the need for external pullup resistors. However, each output can be driven with an external voltage up to 5.5V. Other features offered include a manual reset input, a tolerance pin for selecting 5% or 10% input thresholds, and a margin enable function for deasserting the outputs during margin testing. The MAX16001/MAX16002/MAX16004–MAX16007 offer a watchdog timer that asserts RESET or an independent watchdog output (MAX16005) when the watchdog timeout period (1.6s typ) is exceeded. The watchdog timer can be disabled by leaving the input open. These devices are offered in 12-, 16-, 20-, and 24-pin TQFN and 16-pin TSSOP packages. These are fully specified from -40°C to +125°C. Ordering Information PART MAX16000_TC+ TEMP RANGE PIN-PACKAGE -40°C to +125°C 12 TQFN-EP* Note: The “_” is a placeholder for the input voltage threshold. See Table 1. +Denotes a lead(Pb)-free/RoHS-compliant package. For tape-and-reel, add a “T” after the “+.” Tape-and-reel are offered in 2.5k increments. *EP = Exposed pad. Ordering Information continued at end of data sheet. Typical Operating Circuit Applications Storage Equipment VCC SRT MARGIN Servers VIN1 IN1 Networking/Telecommunication Equipment VIN2 IN2 Multivoltage ASICs VIN3 IN3 VIN4 IN4 VIN5 IN5 WDI I/O VIN6 IN6 WDO NMI MAX16005 µP RESET RST MR Selector Guide appears at end of data sheet. GND TOL For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. 19-3870; Rev 6; 8/12 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors ABSOLUTE MAXIMUM RATINGS VCC, OUT_, IN_, RESET, WDO to GND....................-0.3V to +6V TOL, MARGIN, MR, SRT, WDI, to GND ..........-0.3V to VCC + 0.3 Input/Output Current (RESET, MARGIN, SRT, MR, TOL, OUT_, WDO, WDI) ..............................±20mA Continuous Power Dissipation (TA = +70°C) 12-Pin TQFN (derate 16.9mW/°C above +70°C) ........1349mW 16-Pin TQFN (derate 16.9mW/°C above +70°C) ........1349mW 20-Pin TQFN (derate 16.9mW/°C above +70°C) ........1355mW 24-Pin TQFN (derate 16.9mW/°C above +70°C) ........1666mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C) ..........754mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature .....................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 2.0V to 5.5V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V, TA = +25°C.) (Note 1) PARAMETER Operating Voltage Range Supply Current SYMBOL CONDITIONS VCC (Note 2) ICC VCC = 3.3V, OUT_, RESET not asserted (Note 3) MIN 1.0 45 VCC = 5V, OUT_, RESET not asserted UVLO (Undervoltage Lockout) VUVLO TYP MAX UNITS 5.5 V 65 50 70 VCC rising 1.62 1.8 1.98 5V threshold, TOL = GND 4.50 4.625 4.75 5V threshold, TOL = VCC 4.25 4.375 4.50 3.3V threshold, TOL = GND 2.970 3.053 3.135 3.3V threshold, TOL = VCC 2.805 2.888 2.970 3.0V threshold, TOL = GND 2.70 2.775 2.85 3.0V threshold, TOL = VCC 2.55 2.625 2.70 2.5V threshold, TOL = GND 2.250 2.313 2.375 2.5V threshold, TOL = VCC 2.125 2.188 2.250 1.8V threshold, TOL = GND 1.62 1.665 1.71 µA V IN_ (See Table 1) Threshold Voltages (IN_ Falling) 2 VTH 1.8V threshold, TOL = VCC 1.53 1.575 1.62 1.5V threshold, TOL = GND 1.350 1.388 1.425 1.5V threshold, TOL = VCC 1.275 1.313 1.350 1.2V threshold, TOL = GND 1.08 1.11 1.14 1.2V threshold, TOL = VCC 1.02 1.05 1.08 0.9V threshold, TOL = GND 0.810 0.833 0.855 0.9V threshold, TOL = VCC 0.765 0.788 0.810 V Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.0V to 5.5V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V, TA = +25°C.) (Note 1) PARAMETER Adjustable Threshold (IN_ Falling) IN_ Hysteresis SYMBOL VTH VTH_HYS MIN TYP MAX TOL = GND CONDITIONS 0.388 0.394 0.400 TOL = VCC 0.366 0.372 0.378 IN_ rising 0.5 Fixed thresholds IN_ Input Current 3 Adjustable thresholds -100 SRT = VCC 140 CSRT = 1500pF (Note 4) 2.43 UNITS V % VTH 16 µA +100 nA RESET Reset Timeout tRP SRT Ramp Current ISRT CSRT = 100pF SRT Threshold RESET Output-Voltage Low RESET Output-Voltage High 3.09 3.92 ms 50 µs 460 600 740 nA 1.173 1.235 1.293 V SRT Hysteresis IN_ to Reset Delay 280 0.206 CSRT = open VSRT = 0V 200 100 tRD VOL VOH MR Input-Voltage Low VIL MR Input-Voltage High VIH IN_ falling µs VCC = 3.3V, ISINK = 10mA, RESET asserted 0.30 VCC = 2.5V, ISINK = 6mA, RESET asserted 0.30 VCC = 1.2V, ISINK = 50µA, RESET asserted 0.30 VCC ≥ 2.0V, ISOURCE = 6µA, RESET deasserted 0.8 x VCC V 0.7 x VCC V 1 µs MR Glitch Rejection 100 MR to Reset Delay 200 Pulled up to VCC V V 0.3 x VCC MR Minimum Pulse Width MR Pullup Resistance mV 20 12 20 ns ns 28 kΩ OUTPUTS (OUT_ ) OUT_ Output-Voltage Low VOL OUT_ Output-Voltage High VOH IN_ to OUT_ Propagation Delay Maxim Integrated tD VCC = 3.3V, ISINK = 2mA 0.30 VCC = 2.5V, ISINK = 1.2mA 0.30 VCC ≥ 2.0V, ISOURCE = 6µA (VTH + 100mV) to (VTH - 100mV) 0.8 x VCC V V 20 µs 3 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.0V to 5.5V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V, TA = +25°C). (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP 1.200 1.235 MAX UNITS REFERENCE OUTPUT (MAX16005 Only) Reference Short-Circuit Current Reference Output Accuracy Shorted to GND VREF No load 0.8 Line Regulation Sourcing, 0 ≤ IREF ≤ 40µA Reference Load Regulation mA 1.270 V 0.005 %/V 10 Ω WATCHDOG TIMER (MAX16001/MAX16002/MAX16004–MAX16007) WDI Input-Voltage Low VIL WDI Input-Voltage High VIH WDI Pulse Width Watchdog Timeout Period 0.3 x VCC 0.7 x VCC (Note 5) tWDI V 50 ns 1.12 1.6 2.40 s 54 72 s +1 µA Watchdog Startup Period MAX16001/2/4/6/7 35 Watchdog Input Current VWDI = 0 to VCC (Note 5) -1 WDO Output-Voltage Low (MAX16005 Only) VOL VCC = 3.3V, ISINK = 2mA 0.30 VCC = 2.5V, ISINK = 1.2mA 0.30 WDO Output-Voltage High (MAX16005 Only) VOH VCC ≥ 2.0V, ISOURCE = 6µA, WDO deasserted V 0.8 x VCC V V DIGITAL LOGIC TOL Input-Voltage Low VIL TOL Input-Voltage High VIH TOL Input Current 0.7 x VCC VIL MARGIN Input-Voltage High VIH MARGIN Pullup Resistance 100 nA 0.3 x VCC V 0.7 x VCC Pulled up to VCC tMD Rising or falling (Note 6) 12 V V TOL = VCC MARGIN Input-Voltage Low MARGIN Delay Time 0.3 x VCC V 20 50 28 kΩ µs Note 1: Devices are tested at TA = +25°C and guaranteed by design for TA = TMIN to TMAX. Note 2: The outputs are guaranteed to be in the correct logic state down to VCC = 1V. Note 3: Measured with WDI, MARGIN, and MR unconnected. Note 4: The minimum and maximum specifications for this parameter are guaranteed by using the worst case of the SRT ramp current and SRT threshold specifications. Note 5: Guaranteed by design and not production tested. Note 6: Amount of time required for logic to lock/unlock outputs from margin testing. 4 Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Typical Operating Characteristics (VCC = 3.3V, TA = +25°C, unless otherwise noted.) 55 40 50 45 VCC = 3.3V 40 VCC = 2.5V 35 35 1.5 2.0 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 0.998 0.995 0.990 1.5 50 0.997 25 600 400 OUT_ LOW 0 2 3 4 5 6 SINK CURRENT (mA) 7 8 400 300 200 100 197 0 5 10 15 20 SOURCE CURRENT (µA) 25 30 RESET TIMEOUT DELAY MAX16000 toc09 MAX16000 toc08 OUTPUT GOES LOW ABOVE THIS LINE 500 198 RESET TIMEOUT PERIOD (ms) MAX16000 toc07 600 1 RESET TIMEOUT PERIOD vs. TEMPERATURE MAXIMUM TRANSIENT DURATION vs. INPUT OVERDRIVE MAXIMUM TRANSIENT DURATION (µs) OUT_ HIGH 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 5.5 200 0.996 0.995 5.0 800 VCC - VOUT_ (mV) 75 0.998 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 1000 MAX16000 toc05 MAX16000 toc04 100 0.999 2.0 OUTPUT VOLTAGE vs. SOURCE CURRENT OUTPUT VOLTAGE vs. SINK CURRENT VOUT_ (mV) NORMALIZED THRESHOLD 1.000 1.000 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 5.5 NORMALIZED THRESHOLD vs. TEMPERATURE 1.001 1.003 0.993 30 30 1.005 MAX16000 toc06 45 1.008 NORMALIZED THRESHOLD 50 VCC = 5V MAX16000 toc03 WDI, MARGIN, AND MR UNCONNECTED SUPPLY CURRENT (µA) 55 1.010 MAX16000 toc02 WDI, MARGIN, AND MR UNCONNECTED SUPPLY CURRENT (µA) 60 MAX16000 toc01 60 NORMALIZED THRESHOLD vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT vs. SUPPLY VOLTAGE IN1 5V/div 196 195 194 OUT1 2V/div 193 192 RESET 2V/div 191 SRT = VCC 190 0 1 10 100 INPUT OVERDRIVE (mV) Maxim Integrated 1000 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 40ms/div 5 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Typical Operating Characteristics (continued) (VCC = 3.3V, TA = +25°C, unless otherwise noted.) WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE RESET TIMEOUT PERIOD vs. CSRT MAX16000 toc12 MAX16000 toc11 WATCHDOG TIMEOUT PERIOD (s) 1.59 10 1 0.1 1.58 MA 2V/ 1.57 1.56 OUT 2V/ 1.55 1.54 1.53 1.52 1.50 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 100µs/div CSRT (nF) MARGIN DISABLE FUNCTION REFERENCE VOLTAGE vs. SOURCE CURRENT REFERENCE VOLTAGE vs. SUPPLY VOLTAGE 1 10 100 1000 MAX16000 toc13 1.260 MAX16005 1.255 MARGIN 2V/div VREF (V) 1.240 1.235 RESET 2V/div OUT_ AND RESET ARE BELOW RESPECTIVE THRESHOLDS MAX16005 1.255 REFERENCE VOLTAGE (V) 1.250 1.245 OUT_ 2V/div 1.260 1.230 100 200 300 400 500 SOURCE CURRENT (µA) 1.235 1.230 2.0 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5 TRANSIENT DURATION vs. VCC TRANSIENT MAGNITUDE 1.26 1.25 1.24 1.23 1.22 1.21 MAX16000 toc17 10 MAXIMUM TRANSIENT DURATION (µs) MAX16000 toc16 1.27 1.240 1.5 600 REFERENCE VOLTAGE vs. TEMPERATURE MAX16005 1.245 1.220 1.220 0 1.28 1.250 1.225 1.225 100µs/div MAX16000 toc15 0.1 MAX16000 toc14 0.01 9 8 7 RESET, OUT_ASSERT ABOVE THIS LINE 6 5 4 3 2 1 0 1.20 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 6 RES 2V/ OUT_ AND RESET ARE BELOW RESPECTIVE THRESHOLDS 1.51 0.01 REFERENCE VOLTAGE (V) tRP (ms) 100 MARGIN ENABLE FUNCTION 1.60 MAX16000 toc10 1000 100 1000 TRANSIENT MAGNITUDE (VCC - V) (mV) Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Pin Description (MAX16000/MAX16001/MAX16002) MAX16000 MAX16001 MAX16002 PIN 1 2 3 4 1 2 4 5 1 2 4 5 IN3 IN4 GND VCC Monitored Input Voltage 3. See Table 1 for the input voltage threshold. Monitored Input Voltage 4. See Table 1 for the input voltage threshold. Ground Unmonitored Power-Supply Input 5 6 — OUT3 Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low until the voltage at IN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to V CC . 6 7 — OUT4 Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low until the voltage at IN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 7 10 8 MARGIN 8 11 — OUT2 Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low until the voltage at IN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 9 12 — OUT1 Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low until the voltage at IN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 10 11 14 15 10 11 IN1 IN2 Monitored Input Voltage 1. See Table 1 for the input voltage threshold. Monitored Input Voltage 2. See Table 1 for the input voltage threshold. 12 16 12 TOL Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance. Connect TOL to VCC to select 10% threshold tolerance. NAME FUNCTION Active-Low Manual Deassert Input. Pull MARGIN low to deassert all outputs (go into high state), regardless of the voltage at any monitored input. — 3 3 WDI Watchdog Timer Input. If WDI remains low or high for longer than the watchdog timeout period, RESET is asserted. The timer clears whenever a reset is asserted or a rising or falling edge on WDI is detected. The watchdog timer enters a startup period that allows 54s for the first transition to occur before a reset. Leave WDI unconnected to disable the watchdog timer. The WDI open-state detector uses a small 400nA current. Therefore, do not connect WDI to anything that will source or sink more than 200nA. Note that the leakage current specification for most three-state drivers exceeds 200nA. — 8 6 MR Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout period after MR is deasserted. MR is pulled up to VCC through a 20kΩ resistor. SRT Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The reset timeout period can be calculated as follows: Reset Timeout (s) = 2.06 x 106 (Ω) x CSRT (F). For the internal timeout period of 140ms (min), connect SRT to VCC. — 9 7 — 13 9 RESET Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls below its respective threshold or MR is asserted. RESET remains asserted for the reset timeout period after all monitored voltages exceed their respective thresholds and MR is deasserted. This open-drain output has a 30µA internal pullup. — — — EP Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND. Maxim Integrated 7 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Pin Description (MAX16003/MAX16004/MAX16005) 8 MAX16003 MAX16004 MAX16005 TSSOP MAX16005 TQFN PIN 1 1 3 1 IN4 Monitored Input Voltage 4. See Table 1 for the input voltage threshold. 2 2 4 2 IN5 Monitored Input Voltage 5. See Table 1 for the input voltage threshold. 3 3 5 3 IN6 Monitored Input Voltage 6. See Table 1 for the input voltage threshold. 4 5 7 5 GND Ground 5 6 8 6 VCC Unmonitored Power-Supply Input 6 7 — — OUT4 Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low until the voltage at IN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 7 8 — — OUT5 Output 5. When the voltage at IN5 falls below its threshold, OUT5 goes low and stays low until the voltage at IN5 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 8 9 — — OUT6 Output 6. When the voltage at IN6 falls below its threshold, OUT6 goes low and stays low until the voltage at IN6 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 9 12 13 11 MARGIN 10 13 — — OUT3 Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low until the voltage at IN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 11 14 — — OUT2 Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low until the voltage at IN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 12 15 — — OUT1 Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low until the voltage at IN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 13 17 15 13 IN1 Monitored Input Voltage 1. See Table 1 for the input voltage threshold. 14 18 16 14 IN2 Monitored Input Voltage 2. See Table 1 for the input voltage threshold. 15 19 1 15 IN3 Monitored Input Voltage 3. See Table 1 for the input voltage threshold. NAME FUNCTION Manual Deassert Input. Pull MARGIN low to deassert all outputs (go into high state), regardless of the voltage at any monitored input. Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Pin Description (MAX16003/MAX16004/MAX16005) (continued) MAX16003 MAX16004 MAX16005 TSSOP MAX16005 TQFN PIN 16 20 2 16 NAME FUNCTION TOL Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance. Connect TOL to VCC to select 10% threshold tolerance. — 4 6 4 WDI Watchdog Timer Input. MAX16004: If WDI remains low or high for longer than the watchdog timeout period, RESET is asserted and the timer is cleared. The timer also clears whenever a reset is asserted or a rising or falling edge on WDI is detected. The watchdog timer enters a startup period that allows 54s for the first transition to occur before a reset. Leave WDI unconnected to disable the watchdog timer. MAX16005: If WDI remains low or high for longer than the watchdog timeout period, WDO is asserted. The timer clears whenever a rising or falling edge on WDI is detected. Leave WDI unconnected to disable the watchdog timer. The MAX16005 does not have a startup period. MAX16004/MAX16005: The WDI open-state detector uses a small 100nA current. Therefore, do not connect WDI to anything that will source or sink more than 50nA. Note that the leakage current specification for most three-state drivers exceeds 50nA. — 10 11 9 MR Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout period after MR is deasserted. MR is pulled up to VCC through a 20kΩ resistor. SRT Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The reset timeout period can be calculated as follows: Reset Timeout (s) = 2.06 x 106 (Ω) x CSRT (F). For the internal timeout period of 140ms (min), connect SRT to VCC. Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls below its respective threshold or MR is asserted. RESET remains asserted for the reset timeout period after all monitored voltages exceed their respective thresholds and MR is deasserted. This open-drain output has a 30µA internal pullup. — 11 12 10 — 16 14 12 RESET — — 9 7 REF Reference Output. The reference output voltage of 1.23V can source up to 40µA. Active-Low Watchdog Output. WDO asserts and stays low whenever any of the IN_ inputs fall below their respective thresholds. WDO deasserts without a timeout delay when all the IN_ inputs rise above their thresholds. When all the IN_ inputs rise above their thresholds, WDO asserts low whenever the watchdog timer times out. WDO deasserts after a valid WDI transition or if MR is pulled low. The watchdog timer begins counting after the reset timeout period once MR goes high. Pull MARGIN low to deassert WDO. — — 10 8 WDO — — — — EP Maxim Integrated Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND. 9 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Pin Description (MAX16006/MAX16007) MAX16006 MAX16007 PIN 1 1 IN5 Monitored Input Voltage 5. See Table 1 for the input voltage threshold. 2 2 IN6 Monitored Input Voltage 6. See Table 1 for the input voltage threshold. 3 3 IN7 Monitored Input Voltage 7. See Table 1 for the input voltage threshold. 4 4 IN8 Monitored Input Voltage 8. See Table 1 for the input voltage threshold. FUNCTION 5 5 WDI Watchdog Timer Input. If WDI remains low or high for longer than the watchdog timeout period, RESET is asserted and the timer is cleared. The timer also clears whenever a reset is asserted or a rising or falling edge on WDI is detected. The watchdog timer enters a startup period that allows 54s for the first transition to occur before a reset. Leave WDI unconnected to disable the watchdog timer. The WDI open-state detector uses a small 400nA current. Therefore, do not connect WDI to anything that will source or sink more than 200nA. Note that the leakage current specification for most threestate drivers exceeds 200nA. 6 6 GND Ground 7 7 VCC Unmonitored Power-Supply Input 8 — OUT5 Output 5. When the voltage at IN5 falls below its threshold, OUT5 goes low and stays low until the voltage at IN5 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 9 — OUT6 Output 6. When the voltage at IN6 falls below its threshold, OUT6 goes low and stays low until the voltage at IN6 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 10 — OUT7 Output 7. When the voltage at IN7 falls below its threshold, OUT7 goes low and stays low until the voltage at IN7 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 11 — OUT8 Output 8. When the voltage at IN8 falls below its threshold, OUT8 goes low and stays low until the voltage at IN8 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 12 10 MR Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout period after MR is deasserted. MR is pulled up to VCC through a 20kΩ resistor. SRT Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The reset timeout period can be calculated as follows: Reset Timeout (s) = 2.06 x 106 (Ω) x CSRT (F). For the internal timeout period of 140ms (min), connect SRT to VCC. 13 10 NAME 11 Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Pin Description (MAX16006/MAX16007) (continued) MAX16006 MAX16007 PIN 14 12 MARGIN 15 — OUT4 Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low until the voltage at IN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 16 — OUT3 Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low until the voltage at IN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 17 — OUT2 Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low until the voltage at IN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 18 — OUT1 Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low until the voltage at IN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls below its respective threshold or MR is asserted. RESET remains asserted for the reset timeout period after all monitored voltages exceed their respective thresholds and MR is deasserted. This open-drain output has a 30µA internal pullup. NAME FUNCTION Margin Disable Input. Pull MARGIN low to deassert all outputs (go into high state), regardless of the voltage at any monitored input. 19 15 RESET 20 16 IN1 Monitored Input Voltage 1. See Table 1 for the input voltage threshold. 21 17 IN2 Monitored Input Voltage 2. See Table 1 for the input voltage threshold. 22 18 IN3 Monitored Input Voltage 3. See Table 1 for the input voltage threshold. 23 19 IN4 Monitored Input Voltage 4. See Table 1 for the input voltage threshold. 24 20 TOL Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance. Connect TOL to VCC to select 10% threshold tolerance. — 8, 9, 13, 14 N.C. Not Internally Connected — — EP Maxim Integrated Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND. 11 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Table 1. Input-Voltage-Threshold Selector PART IN1 IN2 IN3 IN4 MAX16000A MAX16000B MAX16000C IN5 IN6 IN7 IN8 3.3 2.5 ADJ 1.8 — — — — 3.3 ADJ ADJ 1.8 — — — — ADJ 2.5 ADJ 1.8 — — — — MAX16000D 3.3 2.5 ADJ ADJ — — — — MAX16000E ADJ ADJ ADJ ADJ — — — — MAX16001A 3.3 2.5 ADJ 1.8 — — — — MAX16001B 3.3 ADJ ADJ 1.8 — — — — MAX16001C ADJ 2.5 ADJ 1.8 — — — — MAX16001D 3.3 2.5 ADJ ADJ — — — — MAX16001E ADJ ADJ ADJ ADJ — — — — MAX16002A 3.3 2.5 ADJ 1.8 — — — — MAX16002B 3.3 ADJ ADJ 1.8 — — — — MAX16002C ADJ 2.5 ADJ 1.8 — — — — MAX16002D 3.3 2.5 ADJ ADJ — — — — MAX16002E ADJ ADJ ADJ ADJ — — — — MAX16003A 3.3 2.5 ADJ 1.8 ADJ ADJ — — MAX16003B 3.3 ADJ ADJ 1.8 ADJ ADJ — — MAX16003C 3.3 2.5 ADJ ADJ ADJ ADJ — — MAX16003D ADJ 2.5 ADJ 1.8 ADJ ADJ — — MAX16003E ADJ ADJ ADJ ADJ ADJ ADJ — — MAX16004A 3.3 2.5 ADJ 1.8 ADJ ADJ — — MAX16004B 3.3 ADJ ADJ 1.8 ADJ ADJ — — MAX16004C 3.3 2.5 ADJ ADJ ADJ ADJ — — MAX16004D ADJ 2.5 ADJ 1.8 ADJ ADJ — — MAX16004E ADJ ADJ ADJ ADJ ADJ ADJ — — MAX16005A 3.3 2.5 ADJ 1.8 ADJ ADJ — — MAX16005B 3.3 ADJ ADJ 1.8 ADJ ADJ — — MAX16005C 3.3 2.5 ADJ ADJ ADJ ADJ — — MAX16005D ADJ 2.5 ADJ 1.8 ADJ ADJ — — MAX16005E ADJ ADJ ADJ ADJ ADJ ADJ — — MAX16006A 3.3 2.5 ADJ 1.8 ADJ ADJ ADJ ADJ MAX16006B 3.3 ADJ ADJ 1.8 ADJ ADJ ADJ ADJ MAX16006C 3.3 2.5 ADJ ADJ ADJ ADJ ADJ ADJ MAX16006D ADJ 2.5 ADJ 1.8 ADJ ADJ ADJ ADJ MAX16006E ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ MAX16006F 5.0 3.3 3.0 2.5 1.8 1.5 1.2 0.9 MAX16007A 3.3 2.5 ADJ 1.8 ADJ ADJ ADJ ADJ MAX16007B 3.3 ADJ ADJ 1.8 ADJ ADJ ADJ ADJ MAX16007C 3.3 2.5 ADJ ADJ ADJ ADJ ADJ ADJ MAX16007D ADJ 2.5 ADJ 1.8 ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ MAX16007E ADJ ADJ ADJ ADJ Note: Other fixed thresholds may be available. Contact factory for availability. 12 Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Functional Diagrams VCC VCC RESET CIRCUIT IN1 OUT1 IN2 OUT2 OUTPUT DRIVER IN3 OUT3 EN OUT4 IN4 VCC VCC MAX16000 TOL REFERENCE UNDERVOLTAGE LOCKOUT VCC MARGIN Figure 1. MAX16000D Functional Diagram Maxim Integrated 13 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Functional Diagrams (continued) WDI MR SRT VCC VCC WATCHDOG TIMER CIRCUIT TIMING RESET CIRCUIT RESET IN1 (OUT1) IN2 (OUT2) OUTPUT DRIVER IN3 (OUT3) EN (OUT4) IN4 VCC TOL REFERENCE VCC UNDERVOLTAGE LOCKOUT ( ) MAX16001 ONLY MAX16001/ MAX16002 VCC MARGIN Figure 2. MAX16001D/MAX16002D Functional Diagram 14 Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Functional Diagrams (continued) (WDI) (MR) (SRT) VCC VCC WATCHDOG TIMER CIRCUIT TIMING RESET CIRCUIT (RESET) IN1 OUT1 IN2 OUT2 IN3 OUT3 OUTPUT DRIVER IN4 OUT4 IN5 OUT5 IN6 EN VCC TOL REFERENCE OUT6 VCC UNDERVOLTAGE LOCKOUT MAX16003/ MAX16004 VCC MARGIN ( ) MAX16004 ONLY Figure 3. MAX16003C/MAX16004C Functional Diagram Maxim Integrated 15 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Functional Diagrams (continued) WDO WDI MR SRT VCC VCC WATCHDOG TIMER CIRCUIT TIMING RESET CIRCUIT RESET IN1 IN2 IN3 OUTPUT DRIVER IN4 IN5 IN6 EN VCC TOL VCC REFERENCE UNDERVOLTAGE LOCKOUT REF VCC MAX16005 MARGIN Figure 4. MAX16005C Functional Diagram 16 Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Functional Diagrams (continued) WDI MR SRT VCC VCC WATCHDOG TIMER CIRCUIT TIMING RESET CIRCUIT RESET IN1 (OUT1) IN2 (OUT2) IN3 (OUT3) OUTPUT DRIVER IN4 (OUT4) IN5 (OUT5) IN6 (OUT6) IN7 (OUT7) IN8 EN VCC TOL REFERENCE OUT8 VCC UNDERVOLTAGE LOCKOUT MAX16006/ MAX16007 VCC ( ) MAX16006 ONLY MARGIN Figure 5. MAX16006C/MAX16007C Functional Diagram Maxim Integrated 17 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Detailed Description The MAX16000–MAX16007 are low-voltage, quad-/hex-/ octal-voltage µP supervisors in small TQFN and TSSOP packages. These devices provide supervisory functions for complex multivoltage systems. The MAX16000/ MAX16001/MAX16002 monitor four voltages, the MAX16003/MAX16004/MAX16005 monitor six voltages, and the MAX16006/MAX16007 monitor eight voltages. The MAX16000/MAX16001/MAX16003/MAX16004/ MAX16006 offer independent outputs for each monitored voltage. The MAX16001/MAX16002/MAX16004– MAX16007 offer a reset output that asserts whenever any of the monitored voltages fall below their respective thresholds or the manual reset input is asserted. The reset output remains asserted for the reset timeout after all voltages are above their respective thresholds and the manual reset input is deasserted. The minimum reset timeout is internally set to 140ms or can be adjusted with an external capacitor. All open-drain outputs have internal 30µA pullups that eliminate the need for external pullup resistors. However, each output can be driven with an external voltage up to 5.5V. Other features offered include a manual reset input, a tolerance pin for selecting 5% or 10% input thresholds, and a margin enable function for deasserting the outputs during margin testing. Window Detection A window detector circuit uses two auxiliary inputs in the configuration shown in Figure 8. External resistors set the two threshold voltages of the window detector circuit. External logic gates create the OUT signal. The window detection width is the difference between the threshold voltages (Figure 9). 5V VCC V1 IN1 V2 IN2 V3 IN3 V4 IN4 MAX16000 MAX16001 OUT1 OUT2 OUT3 OUT4 GND Figure 6. Quad Undervoltage Detector with LED Indicators The MAX16001/MAX16002/MAX16004–MAX16007 offer a watchdog timer that asserts RESET or an independent watchdog output (MAX16005) when the watchdog timeout period (1.6s typ) is exceeded. The watchdog timer can be disabled by leaving input open. Applications Information 5V D1 VIN(5V) VCC OUT1 D2 IN1 Undervoltage-Detection Circuit The open-drain outputs of the MAX16000–MAX16007 can be configured to detect an undervoltage condition. Figure 6 shows a configuration where an LED turns on when the comparator output is low, indicating an undervoltage condition. These devices can also be used in applications such as system supervisory monitoring, multivoltage level detection, and VCC bar-graph monitoring (Figure 7). Tolerance (TOL) The MAX16000–MAX16007 feature a pin-selectable threshold tolerance. Connect TOL to GND to select 5% threshold tolerance. Connect TOL to VCC to select 10% threshold tolerance. 18 OUT2 IN2 D3 IN3 MAX16000 MAX16001 OUT3 D4 IN4 GND OUT4 Figure 7. VCC Bar-Graph Monitoring Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors ( VINTH ) (VTH + VTH_HYS) R1 VTH1 = 1 + R2 5V R1 VCC R1 R2 INPUT IN1 OUT1 IN2 MAX16000 OUT2 MAX16001 IN3 OUT3 IN4 OUT4 R2 OUT VTH R3 R4 (VV R1 = R2 INTH TH ) -1 GND Figure 10. Setting the Adjustable Input ( ) R3 VTH4 = 1 + R4 VTH Adjustable Input Figure 8. Window Detection OUT1 V TH1 These devices offer several monitor options with adjustable input thresholds (see Table 1). The threshold voltage at each adjustable IN_ input is typically 0.394V (TOL = GND) or 0.372 (TOL = VCC). To monitor a voltage VINTH, connect a resistive-divider network to the circuit as shown in Figure 10. VINTH = VTH ((R1 / R2) + 1) R1 = R2 ((VINTH / VTH) - 1) Large resistors can be used to minimize current through the external resistors. For greater accuracy, use lowervalue resistors. Unused Inputs OUT4 V TH4 Connect any unused IN_ inputs to a voltage above its threshold. OUT_ Outputs (MAX16000/MAX16001/MAX16003/ MAX16004/MAX16006) OUT ∆V TH Figure 9. Output Response of Window Detector Circuit Maxim Integrated The OUT_ outputs go low when their respective IN_ inputs drop below their specified thresholds. The output is open drain with a 30µA internal pullup to VCC. For many applications, no external pullup resistor is required to interface with other logic devices. An external pullup resistor to any voltage from 0 to 5.5V overrides the internal pullup if interfacing to different logic supply voltages. Internal circuitry prevents reverse current flow from the external pullup voltage to VCC (Figure 11). 19 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors VCC = 3.3V 5V IN_ VTH_ VTH_ 100kΩ VCC VCC RESET OUT_ 90% 10% RESET tRD tRP OUT_ 90% MAX16001/ MAX16002/ MAX16004–MAX16007 GND 10% GND Figure 11. Interfacing to a Different Logic Supply Voltage RESET Output (MAX16001/MAX16002/ MAX16004–MAX16007) RESET asserts low when any of the monitored voltages fall below their respective thresholds or MR is asserted. RESET remains asserted for the reset timeout period after all monitored voltages exceed their respective thresholds and MR is deasserted (see Figure 12). This open-drain output has a 30µA internal pullup. An external pullup resistor to any voltage from 0 to 5.5V overrides the internal pullup if interfacing to different logic supply voltages. Internal circuitry prevents reverse current flow from the external pullup voltage to VCC (Figure 11). 20 tD tD Figure 12. Output Timing Diagram WDO (MAX16005 Only) WDO asserts and stays low whenever any of the IN_ inputs fall below their respective thresholds. WDO deasserts without a timeout delay when all the IN_ inputs rise above their thresholds. When all the IN_ inputs rise above their thresholds, WDO asserts low whenever the watchdog timer times out. WDO deasserts after a valid WDI transition or if MR is pulled low. The watchdog timer begins counting after the reset timeout period once MR goes high. Pull MARGIN low to deassert WDO regardless of any other condition. The watchdog timer continues to run when MARGIN is low and if a timeout occurs. WDO will assert MR after MARGIN is deasserted. This open-drain output has a 30µA internal pullup. An external pullup resistor to any voltage from 0 to 5.5V overrides the internal pullup if interfacing to different logic supply voltages. Internal circuitry prevents reverse current flow from the external pullup voltage to VCC (Figure 11). Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors VTH + VTH_HYST VTH + VTH_HYST VTH VIN RESET tRP tRP WDO WDI t<tWD tWD t<tWD t<tWD Figure 13. WDO Timing Related to VTH and tRP VTH + VTH_HYST VTH + VTH_HYST VTH VIN MARGIN RESET tWD INTERNAL RESET SIGNAL tRP tRP Figure 14. Margin Output Disable (MARGIN) Affect on RESET within tRP Maxim Integrated 21 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors VTH + VTH_HYST VTH + VTH_HYST VTH VIN MARGIN RESET INTERNAL RESET SIGNAL tRP tRP Figure 15. Margin Output Disable (MARGIN) Affect on RESET Outside tRP Reset Timeout Capacitor The reset timeout period can be adjusted to accommodate a variety of µP applications from 50µs to 1.12s. Adjust the reset timeout period (tRP) by connecting a capacitor (CSRT) between SRT and GND. Calculate the reset timeout capacitor as follows: t (s) x ISRT CSRT (F) = RP VTH _ SRT Connect SRT to VCC for a factory-programmed reset timeout of 140ms (min). Manual Reset Input (MR) (MAX16001/MAX16002/ MAX16004–MAX16007) Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic-low on MR asserts RESET low. RESET remains asserted while MR is low, and during the reset timeout period (140ms min) after MR returns high. The MR input has an internal 20kΩ pullup resistor to VCC, so it can be left unconnected if not used. MR can be driven with TTL or CMOS-logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from 22 MR to GND to create a manual reset function. External debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connecting a 0.1µF capacitor from MR to GND provides additional noise immunity. Margin Output Disable (MARGIN) MARGIN allows system-level testing while power supplies are adjusted from their nominal voltages. Drive MARGIN low to force RESET, WDO, and OUT_ high, regardless of the voltage at any monitored input. The state of each output does not change while MARGIN = GND. The watchdog timer continues to run when MARGIN is low, and if a timeout occurs, WDO/RESET will assert tMD after MARGIN is deasserted. The MARGIN input is internally pulled up to VCC. Leave MARGIN unconnected or connect to VCC if unused. Power-Supply Bypassing The MAX16000–MAX16007 operate from a 2.0V to 5.5V supply. An undervoltage lockout ensures that the outputs are in the correct states when the UVLO is exceeded. In noisy applications, bypass VCC to ground with a 0.1µF capacitor as close to the device as possible. The additional capacitor improves transient immunity. For VCC transients with high slew rates, place an RC lowpass filter in front of VCC, where R can be up to 100Ω. Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors IN1 10 IN2 11 OUT4 IN1 10 5 OUT3 IN2 11 4 VCC TOL 12 SRT 7 MAX16002 1 2 3 1 MR 5 VCC 4 GND GND IN3 2 3 9 MARGIN 10 OUT3 SRT 11 OUT2 MARGIN 12 TOP VIEW OUT1 OUT2 TQFN (4mm x 4mm) OUT1 TQFN (4mm x 4mm) TOP VIEW 6 + IN4 + 8 IN3 TOL 12 MAX16000 6 9 WDI 7 MARGIN 8 IN4 MARGIN 9 TOP VIEW RESET OUT2 TOP VIEW OUT1 Pin Configurations 12 11 10 9 RESET 13 8 MR IN1 13 8 OUT6 IN1 14 7 OUT4 IN2 14 7 OUT5 6 OUT4 5 VCC + 3 4 1 2 3 4 GND TOL 16 IN4 VCC 2 TQFN (4mm x 4mm) Maxim Integrated 5 GND IN3 1 IN3 15 WDI + OUT3 IN4 TOL 16 6 IN6 IN2 15 MAX16003 IN5 MAX16001 TQFN (4mm x 4mm) 23 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors 18 RESET 16 10 MR IN1 17 9 OUT6 IN2 18 8 OUT5 7 OUT4 6 VCC MAX16004 SRT 11 MARGIN 12 OUT4 SRT 13 OUT3 MARGIN 14 OUT2 OUT3 15 TOP VIEW 17 16 15 14 13 OUT1 OUT2 TOP VIEW OUT1 Pin Configurations (continued) RESET 19 12 MR IN1 20 11 OUT8 IN2 21 10 OUT7 9 OUT6 8 OUT5 7 VCC MAX16006 IN3 22 IN3 19 IN4 23 TOL 20 + + 1 2 WDI GND IN5 IN6 6 + 7 IN2 14 MAX16005 1 2 3 4 IN4 IN5 IN6 WDI + WDO REF 6 VCC 5 GND TOP VIEW TQFN (4mm x 4mm) IN3 1 16 IN2 TOL 2 15 IN1 IN4 3 14 RESET IN5 4 SRT 8 MARGIN MR 9 N.C. SRT 10 N.C. MARGIN 11 IN1 13 TOL 16 5 TOP VIEW RESET RESET 12 IN3 15 4 TQFN (4mm x 4mm) TQFN (4mm x 4mm) TOP VIEW 3 GND 5 WDI 4 IN8 3 IN7 2 IN6 IN4 1 IN5 TOL 24 15 14 13 12 11 WDI 6 11 MR GND 7 10 WDO VCC 8 9 REF TSSOP 10 MR IN2 17 9 N.C. 8 N.C. 7 VCC 6 GND MAX16007 IN4 19 2 3 4 5 IN8 WDI IN5 1 IN7 + IN6 TOL 20 13 MARGIN 12 SRT IN1 16 IN3 18 MAX16005 IN6 5 TQFN (4mm x 4mm) 24 Maxim Integrated MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Ordering Information (continued) PART TEMP RANGE Chip Information PROCESS: BiCMOS PIN-PACKAGE MAX16001_TE+ -40°C to +125°C 16 TQFN-EP* MAX16001_TE/V+ -40°C to +125°C 16 TQFN-EP* MAX16002_TC+ -40°C to +125°C 12 TQFN-EP* MAX16003_TE+ -40°C to +125°C 16 TQFN-EP* MAX16004_TP+ -40°C to +125°C 20 TQFN-EP* MAX16005_TE+ -40°C to +125°C 16 TQFN-EP* MAX16005_UE+ -40°C to +125°C 16 TSSOP MAX16006_TG+ -40°C to +125°C 24 TQFN-EP* MAX16007_TP+ -40°C to +125°C 20 TQFN-EP* Note: The “_” is a placeholder for the input voltage threshold. See Table 1. +Denotes a lead(Pb)-free/RoHS-compliant package. For tape-and-reel, add a “T” after the “+.” Tape-and-reel are offered in 2.5k increments. *EP = Exposed pad. /V denotes an automotive qualified part. Selector Guide WDI/WDO MR ADJUSTABLE RESET TIMEOUT — — — — ✔ WDI ✔ ✔ — ✔ WDI ✔ ✔ 6 — — — — 6 6 ✔ WDI ✔ ✔ MAX16005 6 — ✔ WDI/WDO ✔ ✔ MAX16006 8 8 ✔ WDI ✔ ✔ MAX16007 8 — ✔ WDI ✔ ✔ MONITORED VOLTAGES INDEPENDENT OUTPUTS RESET MAX16000 4 4 MAX16001 4 4 MAX16002 4 MAX16003 6 MAX16004 PART Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 12 TQFN-EP T1244+4 21-0139 90-0068 16 TSSOP U16+2 21-0066 90-0117 16 TQFN-EP T1644+4 21-0139 90-0070 20 TQFN-EP T2044+3 21-0139 90-0037 24 TQFN-EP T2444+4 21-0139 90-0022 Maxim Integrated 25 MAX16000–MAX16007 Low-Voltage, Quad-/Hex-/Octal-Voltage µP Supervisors Revision History REVISION NUMBER REVISION DATE 0 12/05 Initial release 1 1/06 Released MAX16003 and MAX16004. 2 7/06 Released MAX16005. Updated Pin Description and Detailed Description. 3 12/08 Added the MAX16005 TSSOP package. Modified the Detailed Description, and added Figures 13, 14, and 15. 1, 2, 7, 8, 9, 10, 20–26 4 8/10 Revised the Absolute Maximum Ratings and the Power-Supply Bypassing sections. 2, 22 5 10/10 Added new graph to the Typical Operating Characteristics. 6 6 9/12 Added automotive qualified part to Ordering Information. 25 DESCRIPTION PAGES CHANGED — 20, 21 1, 4, 7, 9, 10, 20, 21 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 26 _______________________________Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 © 2012 Maxim Integrated The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.