MICROCHIP 25AA640-I/P

25AA640/25LC640
64K SPI™ Bus Serial EEPROM
Device Selection Table
Description
Part
Number
VCC
Range
Max Clock
Frequency
Temp
Ranges
25AA640
1.8-5.5V
1 MHz
I
25LC640
2.5-5.5V
2 MHz
I
25LC640
4.5-5.5V
3/2.5 MHz
I, E
Features
The Microchip Technology Inc. 25AA640/25LC640
(25XX640*) is a 64 Kbit Serial Electrically Erasable
PROM [EEPROM]. The memory is accessed via a
simple Serial Peripheral Interface (SPI) compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the device is controlled through a Chip
Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused,
transitions on its inputs will be ignored, with the
exception of Chip Select, allowing the host to service
higher priority interrupts.
• Low-power CMOS technology
- Write current: 3 mA typical
- Read current: 500 µA typical
- Standby current: 500 nA typical
• 8192 x 8 bit organization
• 32 byte page
• Write cycle time: 5 ms max.
• Self-timed erase and write cycles
• Block write protection
- Protect none, 1/4, 1/2 or all of array
• Built-in write protection
- Power on/off data protection circuitry
- Write enable latch
- Write-protect pin
• Sequential read
• High reliability
- Data retention: > 200 years
- ESD protection: > 4000V
• 8-pin PDIP, SOIC and TSSOP packages
• Temperature ranges supported:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Block Diagram
Status
Register
HV Generator
EEPROM
Memory
Control
Logic
I/O Control
Logic
XDEC
Array
Page
Latches
SI
Y Decoder
SO
CS
SCK
Sense Amp.
R/W Control
HOLD
WP
VCC
VSS
Package Types
PDIP/SOIC
SO
2
WP
3
VSS
4
8
VCC
7
HOLD
6
SCK
5
SI
HOLD
VCC
CS
SO
1
2
3
4
25XX640
1
25XX640
CS
TSSOP
8
7
6
5
SCK
SI
VSS
WP
*25XX640 is used in this document as a generic part number for the 25AA640/25LC640 devices.
SPI is a registered trademark of Motorola Corporation.
 2004 Microchip Technology Inc.
DS21223G-page 1
25AA640/25LC640
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
VCC .............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to VCC + 1.0V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias ...............................................................................................................-65°C to 125°C
ESD protection on all pins ..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
DC CHARACTERISTICS
Param.
No.
Sym
D1
VIH1
D2
VIH2
D3
VIL1
D4
VIL2
D5
VOL
Characteristics
Industrial (I):
TA = -40°C to +85°C VCC = 1.8V to 5.5V
Automotive (E): TA = -40°C to +125°C VCC = 4.5V to 5.5V
Max
Units
2.0
VCC + 1
V
VCC ≥ 2.7V (Note 1)
0.7 VCC
VCC + 1
V
VCC < 2.7V (Note 1)
-0.3
0.8
V
VCC ≥ 2.7V (Note 1)
-0.3
0.2 VCC
V
VCC < 2.7V (Note 1)
Low-level output
voltage
—
0.4
V
IOL = 2.1 mA
—
0.2
V
IOL = 1.0 mA, VCC = < 2.5V
VCC - 0.5
—
V
IOH = -400 µA
High-level input
voltage
Low-level input
voltage
Min
Conditions
D6
VOH
High-level output
voltage
D7
ILI
Input leakage current
—
±1
µA
CS = VCC, VIN = VSS TO VCC
D8
ILO
Output leakage
current
—
±1
µA
CS = VCC, VOUT = VSS TO VCC
D9
CINT
Internal Capacitance
(all inputs and
outputs)
—
7
pF
TA = 25°C, CLK = 1.0 MHz,
VCC = 5.0V (Note 1)
D10
ICC Read Operating Current
—
—
1
500
mA
µA
VCC = 5.5V; FCLK = 3.0 MHz;
SO = Open
VCC = 2.5V; FCLK = 2.0 MHz;
SO = Open
D11
ICC Write
—
—
5
3
mA
mA
VCC = 5.5V
VCC = 2.5V
D12
ICCS
—
—
5
1
µA
µA
CS = VCC = 5.5V, Inputs tied to VCC or
VSS
CS = VCC = 2.5V, Inputs tied to VCC or
VSS
Note 1:
Standby Current
This parameter is periodically sampled and not 100% tested.
DS21223G-page 2
 2004 Microchip Technology Inc.
25AA640/25LC640
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
AC CHARACTERISTICS
Param.
No.
Sym
Characteristic
VCC = 1.8V to 5.5V
VCC = 4.5V to 5.5V
Min
Max
Units
Conditions
—
—
—
3
2
1
MHz
MHz
MHz
VCC = 4.5V to 5.5V (Note 2)
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
1
FCLK
Clock Frequency
2
TCSS
CS Setup Time
100
250
500
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
3
TCSH
CS Hold Time
150
250
475
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
4
TCSD
CS Disable Time
500
—
ns
5
TSU
Data Setup Time
30
50
50
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
6
THD
Data Hold Time
50
100
100
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
7
TR
CLK Rise Time
—
2
µs
(Note 1)
8
TF
CLK Fall Time
—
2
µs
(Note 1)
9
THI
Clock High Time
150
230
475
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
10
TLO
Clock Low Time
150
230
475
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
11
TCLD
Clock Delay Time
50
—
ns
12
TCLE
Clock Enable Time
50
—
ns
13
TV
Output Valid from
Clock Low
—
—
—
150
230
475
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
14
THO
Output Hold Time
0
—
ns
(Note 1)
15
TDIS
Output Disable Time
—
—
—
200
250
500
ns
ns
ns
VCC = 4.5V to 5.5V (Note 1)
VCC = 2.5V to 5.5V (Note 1)
VCC = 1.8V to 5.5V (Note 1)
16
THS
HOLD Setup Time
100
100
200
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
17
THH
HOLD Hold Time
100
100
200
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
18
THZ
HOLD Low to Output
High-Z
100
150
200
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V (Note 1)
VCC = 2.5V to 5.5V (Note 1)
VCC = 1.8V to 5.5V (Note 1)
19
THV
HOLD High to Output
Valid
100
150
200
—
—
—
ns
ns
ns
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
VCC = 1.8V to 5.5V
20
TWC
Internal Write Cycle
Time
—
5
ms
21
—
Endurance
1M
—
E/W
Cycles
(Note 3)
Note 1: This parameter is periodically sampled and not 100% tested.
2: FCLK max. = 2.5 MHz for TA > 85°C.
3: This parameter is not tested but established by characterization. For endurance estimates in a specific application,
please consult the Total Endurance™ Model which can be obtained from our web site.
 2004 Microchip Technology Inc.
DS21223G-page 3
25AA640/25LC640
FIGURE 1-1:
HOLD TIMING
CS
16
17
16
17
SCK
18
SO
n+2
n+1
n
19
High-impedance
n
5
Don’t Care
n+2
SI
n+1
n-1
n
n
n-1
HOLD
FIGURE 1-2:
SERIAL INPUT TIMING
4
CS
12
2
7
Mode 1,1
11
8
3
SCK Mode 0,0
5
SI
6
MSB In
LSB In
High-impedance
SO
FIGURE 1-3:
SERIAL OUTPUT TIMING
CS
9
3
10
Mode 1,1
SCK
Mode 0,0
13
14
SO
SI
DS21223G-page 4
MSB Out
15
LSB Out
Don’t Care
 2004 Microchip Technology Inc.
25AA640/25LC640
TABLE 1-3:
AC TEST CONDITIONS
FIGURE 1-4:
AC Waveform:
AC TEST CIRCUIT
VCC
VLO = 0.2V
VHI = VCC – 0.2V
(Note 1)
VHI = 4.0V
(Note 2)
Timing Measurement Reference Level
Input
0.5 VCC
Output
0.5 VCC
2.25 kΩ
SO
1.8 kΩ
100 pF
Note 1: For VCC ≤ 4.0V
2: For VCC > 4.0V
 2004 Microchip Technology Inc.
DS21223G-page 5
25AA640/25LC640
2.0
PIN DESCRIPTIONS
2.4
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
The SI pin is used to transfer data into the device. It
receives instructions, addresses, and data. Data is
latched on the rising edge of the serial clock.
2.5
Serial Clock (SCK)
Name
PDIP
SOIC
TSSOP
CS
1
1
3
Chip Select Input
SO
2
2
4
Serial Data Output
WP
3
3
5
Write-Protect Pin
VSS
4
4
6
Ground
SI
5
5
7
Serial Data Input
2.6
SCK
6
6
8
Serial Clock Input
HOLD
7
7
1
Hold Input
VCC
8
8
2
Supply Voltage
The HOLD pin is used to suspend transmission to the
25XX640 while in the middle of a serial sequence without having to retransmit the entire sequence over
again. It must be held high any time this function is not
being used. Once the device is selected and a serial
sequence is underway, the HOLD pin may be pulled
low to pause further serial communication without
resetting the serial sequence. The HOLD pin must be
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high-tolow transition. The 25XX640 must remain selected
during this sequence. The SI, SCK, and SO pins are in
a high-impedance state during the time the device is
paused and transitions on these pins will be ignored. To
resume serial communication, HOLD must be brought
high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
2.1
Description
Serial Input (SI)
Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardless of
the CS input signal. If CS is brought high, or remains
high during a program cycle, the device will go into
Standby mode when the programming cycle is
complete. When the device is deselected, SO goes to
the high-impedance state, allowing multiple parts to
share the same SPI bus. A low-to-high transition on CS
after a valid write sequence initiates an internal write
cycle. After power-up, a high-to-low transition on CS is
required prior to any sequence being initiated.
2.2
The SCK is used to synchronize the communication
between a master and the 25XX640. Instructions,
addresses, or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
Hold (HOLD)
Serial Output (SO)
The SO pin is used to transfer data out of the 25XX640.
During a read cycle, data is shifted out on this pin after
the falling edge of the serial clock.
2.3
Write-Protect (WP)
This pin is used in conjunction with the WPEN bit in the
Status register to prohibit writes to the nonvolatile bits
in the Status register. When WP is low and WPEN is
high, writing to the nonvolatile bits in the Status register
is disabled. All other operations function normally.
When WP is high, all functions, including writes to the
nonvolatile bits in the Status register operate normally.
If the WPEN bit is set, WP low during a Status register
write sequence will disable writing to the Status register. If an internal write cycle has already begun, WP
going low will have no effect on the write.
The WP pin function is blocked when the WPEN bit in
the Status register is low. This allows the user to install
the 25XX640 in a system with WP pin grounded and
still be able to write to the Status register. The WP pin
functions will be enabled when the WPEN bit is set
high.
DS21223G-page 6
 2004 Microchip Technology Inc.
25AA640/25LC640
3.0
FUNCTIONAL DESCRIPTION
3.3
3.1
Principles Of Operation
Prior to any attempt to write data to the 25XX640 array
or Status register, the write enable latch must be set by
issuing the WREN instruction (Figure 3-4). This is done
by setting CS low and then clocking out the proper
instruction into the 25XX640. After all eight bits of the
instruction are transmitted, the CS must be brought
high to set the write enable latch. If the write operation
is initiated immediately after the WREN instruction without CS being brought high, the data will not be written
to the array because the write enable latch will not have
been properly set.
The 25XX640 is a 8192 byte Serial EEPROM designed
to interface directly with the Serial Peripheral Interface
(SPI) port of many of today’s popular microcontroller
families, including Microchip’s PIC16C6X/7X microcontrollers. It may also interface with microcontrollers
that do not have a built-in SPI port by using discrete
I/O lines programmed properly with the software.
The 25XX640 contains an 8-bit instruction register. The
device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low and the HOLD pin must be high for the entire
operation.
Table 3-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSB first, LSB
last.
Data is sampled on the first rising edge of SCK after CS
goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD input and place the 25XX640 in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
3.2
Read Sequence
The device is selected by pulling CS low. The 8-bit read
instruction is transmitted to the 25XX640 followed by
the 16-bit address with the three MSBs of the address
being don’t care bits. After the correct read instruction
and address are sent, the data stored in the memory at
the selected address is shifted out on the SO pin. The
data stored in the memory at the next address can be
read sequentially by continuing to provide clock pulses.
The internal address pointer is automatically incremented to the next higher address after each byte of
data is shifted out. When the highest address is
reached (1FFFh), the address counter rolls over to
address 0000h allowing the read cycle to be continued
indefinitely. The read operation is terminated by raising
the CS pin (Figure 3-1).
TABLE 3-1:
Write Sequence
Once the write enable latch is set, the user may
proceed by setting the CS low, issuing a WRITE
instruction, followed by the address, and then the data
to be written. Up to 32 bytes of data can be sent to the
25XX640 before a write cycle is necessary. The only
restriction is that all of the bytes must reside in the
same page. A page address begins with XXX0 0000
and ends with XXX1 1111. If the internal address
counter reaches XXX1 1111 and the clock continues,
the counter will roll back to the first address of the page
and overwrite any data in the page that may have been
written.
For the data to be actually written to the array, the CS
must be brought high after the Least Significant bit (D0)
of the nth data byte has been clocked in. If CS is
brought high at any other time, the write operation will
not be completed. Refer to Figure 3-2 and Figure 3-3
for more detailed illustrations on the byte write
sequence and the page write sequence respectively.
While the write is in progress, the Status register may
be read to check the status of the WPEN, WIP, WEL,
BP1, and BP0 bits (Figure 3-6). A read attempt of a
memory array location will not be possible during a
write cycle. When the write cycle is completed, the
write enable latch is reset.
INSTRUCTION SET
Instruction Name
Instruction Format
Description
READ
0000 0011
Read data from memory array beginning at selected address
WRITE
0000 0010
Write data to memory array beginning at selected address
WREN
0000 0110
Set the write enable latch (enable write operations)
WRDI
0000 0100
Reset the write enable latch (disable write operations)
RDSR
0000 0101
Read Status register
WRSR
0000 0001
Write Status register
 2004 Microchip Technology Inc.
DS21223G-page 7
25AA640/25LC640
FIGURE 3-1:
READ SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9 10 11
21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction
0
SI
0
0
0
16 Bit Address
0
0
1
1 15 14 13 12
2
1
0
Data Out
High-impedance
7
SO
FIGURE 3-2:
6
5
4
3
2
1
BYTE WRITE SEQUENCE
CS
Twc
Instruction
SI
0
0
0
0
0
0
16 Bit Address
0
1
0 15 14 13 12
Data Byte
2
1
0
7
6
5
4
3
2
1
0
High-impedance
SO
FIGURE 3-3:
PAGE WRITE SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9 10 11
21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction
SI
0
0
0
0
0
16 Bit Address
0
1
Data Byte 1
2
0 15 14 13 12
1
0
7
6
5
4
3
2
1
0
CS
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
SCK
Data Byte 2
SI
7
DS21223G-page 8
6
5
4
3
2
Data Byte 3
1
0
7
6
5
4
3
2
Data Byte n (32 max)
1
0
7
6
5
4
3
2
1
0
 2004 Microchip Technology Inc.
25AA640/25LC640
3.4
Write Enable (WREN) and
Write Disable (WRDI)
The following is a list of conditions under which the
write enable latch will be reset:
•
•
•
•
The 25XX640 contains a write enable latch. See
Table 3-3 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.
FIGURE 3-4:
Power-up
WRDI instruction successfully executed
WRSR instruction successfully executed
WRITE instruction successfully executed
WRITE ENABLE SEQUENCE
CS
0
1
2
3
4
5
6
7
SCK
SI
0
0
0
0
0
1
1
0
High-impedance
SO
FIGURE 3-5:
WRITE DISABLE SEQUENCE
CS
0
1
2
3
4
5
6
7
SCK
SI
0
0
0
0
0
1
10
0
High-impedance
SO
 2004 Microchip Technology Inc.
DS21223G-page 9
25AA640/25LC640
3.5
Read Status Register Instruction
(RDSR)
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘1’, the latch
allows writes to the array and Status register, when set
to a ‘0’, the latch prohibits writes to the array and Status
register. The state of this bit can always be updated via
the WREN or WRDI commands regardless of the state
of write protection on the Status register. This bit is
read-only.
The Read Status Register instruction (RDSR) provides
access to the Status register. The Status register may
be read at any time, even during a write cycle. The
Status register is formatted as follows:
7
WPEN
6
X
5
X
4
X
3
BP1
2
BP0
1
WEL
0
WIP
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile.
The Write-In-Process (WIP) bit indicates whether the
25XX640 is busy with a write operation. When set to a
‘1’, a write is in progress, when set to a ‘0’, no write is
in progress. This bit is read-only.
FIGURE 3-6:
See Figure 3-6 for RDSR timing sequence.
READ STATUS REGISTER TIMING SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
0
SCK
Instruction
SI
0
0
0
0
0
1
0
1
Data from Status Register
High-impedance
SO
DS21223G-page 10
7
6
5
4
3
2
 2004 Microchip Technology Inc.
25AA640/25LC640
3.6
TABLE 3-2:
Write Status Register Instruction
(WRSR)
The Write Status Register instruction (WRSR) allows the
user to select one of four levels of protection for the
array by writing to the appropriate bits in the Status register. The array is divided up into four segments. The
user has the ability to write-protect none, one, two, or
all four of the segments of the array. The partitioning is
controlled as shown in Table 3-2.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
(WPEN) bit in the Status register control the programmable hardware write-protect feature. Hardware write
protection is enabled when the WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write-protected, only writes
to nonvolatile bits in the Status register are disabled.
See Table 3-3 for a matrix of functionality on the WPEN
bit.
ARRAY PROTECTION
BP1
BP0
Array Addresses
Write-Protected
0
0
none
0
1
upper 1/4
(1800h-1FFFh)
1
0
upper 1/2
(1000h-1FFFh)
1
1
all
(0000h-1FFFh)
See Figure 3-7 for WRSR timing sequence.
FIGURE 3-7:
WRITE STATUS REGISTER TIMING SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
0
SCK
Instruction
SI
0
0
0
0
0
Data to Status Register
0
0
1
7
6
5
4
3
2
High-impedance
SO
 2004 Microchip Technology Inc.
DS21223G-page 11
25AA640/25LC640
3.7
Data Protection
3.8
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A write enable instruction must be issued to set
the write enable latch
• After a byte write, page write, or Status register
write, the write enable latch is reset
• CS must be set high after the proper number of
clock cycles to start an internal write cycle
• Access to the array during an internal write cycle
is ignored and programming is continued
TABLE 3-3:
Power-On-State
The 25XX640 powers on in the following state:
• The device is in low-power Standby mode
(CS = 1)
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low transition on CS is required to enter
the active state
.
WRITE-PROTECT FUNCTIONALITY MATRIX
WPEN
WP
WEL
Protected Blocks
Unprotected Blocks
Status Register
X
X
0
Protected
Protected
Protected
0
X
1
Protected
Writable
Writable
1
Low
1
Protected
Writable
Protected
X
High
1
Protected
Writable
Writable
DS21223G-page 12
 2004 Microchip Technology Inc.
25AA640/25LC640
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
8-Lead PDIP (300 mil)
Example:
XXXXXXXX
XXXXXNNN
YYWW
25LC640
/P017
0410
8-Lead SOIC (150 mil)
XXXXXXXX
XXXXYYWW
NNN
8-Lead TSSOP
Example:
25LC640
I/SN0410
017
Example:
XXXX
YYWW
NNN
Legend:
Note:
*
XX...X
YY
WW
NNN
5LCX
0410
017
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please
check with your Microchip Sales Office.
 2004 Microchip Technology Inc.
DS21223G-page 13
25AA640/25LC640
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21223G-page 14
 2004 Microchip Technology Inc.
25AA640/25LC640
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
 2004 Microchip Technology Inc.
DS21223G-page 15
25AA640/25LC640
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
φ
β
A1
A2
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
φ
c
B
α
β
MIN
INCHES
NOM
MAX
8
.026
.033
.002
.246
.169
.114
.020
0
.004
.007
0
0
.035
.004
.251
.173
.118
.024
4
.006
.010
5
5
.043
.037
.006
.256
.177
.122
.028
8
.008
.012
10
10
MILLIMETERS*
NOM
MAX
8
0.65
1.10
0.85
0.90
0.95
0.05
0.10
0.15
6.25
6.38
6.50
4.30
4.40
4.50
2.90
3.00
3.10
0.50
0.60
0.70
0
4
8
0.09
0.15
0.20
0.19
0.25
0.30
0
5
10
0
5
10
MIN
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
DS21223G-page 16
 2004 Microchip Technology Inc.
25AA640/25LC640
APPENDIX A:
REVISION HISTORY
Revision F
Corrections to Section 1.0, Electrical Characteristics.
Revision G
Product ID System, Example C: Corrected part
number, added “Alternate Pinout” and corrected part
number in Header.
Updated Trademark and Sales List pages.
 2004 Microchip Technology Inc.
DS21223G-page 17
25AA640/25LC640
NOTES:
DS21223G-page 18
 2004 Microchip Technology Inc.
25AA640/25LC640
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape® or Microsoft®
Internet Explorer. Files are also available for FTP
download from our FTP site.
Connecting to the Microchip Internet
Web Site
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits. The Hot Line
Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
 2004 Microchip Technology Inc.
DS21223G-page 19
25AA640/25LC640
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
Device: 25AA640/25LC640
N
Literature Number: DS21223G
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21223G-page 20
 2004 Microchip Technology Inc.
25AA640/25LC640
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Package
Examples:
a)
b)
Device
25AA640:
25AA640T:
64K bit 1.8V SPI Serial EEPROM
64K bit 1.8V SPI Serial EEPROM
(Tape and Reel)
25AA640X: 64K bit 1.8V SPI Serial EEPROM
in alternate pinout (ST only)
25AA640XT: 64K bit 1.8V SPI Serial EEPROM
in alternate pinout Tape and Reel (ST only)
25LC640:
64K bit 2.5V SPI Serial EEPROM
25LC640T: 64K bit 2.5V SPI Serial EEPROM
(Tape and Reel)
25LC640X: 64K bit 2.5V SPI Serial EEPROM
in alternate pinout (ST only)
25LC640XT: 64K bit 2.5V SPI Serial EEPROM
in alternate pinout Tape and Reel (ST only)
Temperature Range
I
E
Package
P
SN
ST
=
=
c)
d)
e)
f)
25AA640-I/SN: Industrial Temp.,
SOIC package
25AA640T-I/SN: Tape and Reel,
Industrial Temp., SOIC package
25AA640X-I/ST: Alternate Pinout
Industrial Temp., TSSOP package
25LC640-I/SN: Industrial Temp.,
SOIC package
25LC640T-I/SN: Tape and Reel,
Industrial Temp., SOIC package
25LC640X-I/ST: Alternate Pinout,
Industrial Temp., TSSOP package
-40°C to +85°C
-40°C to +125°C
=
=
=
Plastic DIP (300 mil Body), 8-lead
Plastic SOIC (150 mil Body), 8-lead
Plastic TSSOP (4.4 mm Body), 8-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2004 Microchip Technology Inc.
DS21223G-page 21
25AA640/25LC640
NOTES:
DS21223G-page 22
 2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart and rfPIC are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL, SmartShunt and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net,
dsPICworks, ECAN, ECONOMONITOR, FanSense,
FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP,
ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, rfLAB, Select Mode,
SmartSensor, SmartTel and Total Endurance are trademarks
of Microchip Technology Incorporated in the U.S.A. and other
countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in October
2003. The Company’s quality system processes and procedures are for
its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial
EEPROMs, microperipherals, nonvolatile memory and analog
products. In addition, Microchip’s quality system for the design and
manufacture of development systems is ISO 9001:2000 certified.
 2004 Microchip Technology Inc.
DS21223G-page 23
WORLDWIDE SALES AND SERVICE
AMERICAS
China - Beijing
Korea
Corporate Office
Unit 706B
Wan Tai Bei Hai Bldg.
No. 6 Chaoyangmen Bei Str.
Beijing, 100027, China
Tel: 86-10-85282100
Fax: 86-10-85282104
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
China - Chengdu
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
3780 Mansell Road, Suite 130
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Tel: 770-640-0034
Fax: 770-640-0307
Rm. 2401-2402, 24th Floor,
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Tel: 86-28-86766200
Fax: 86-28-86766599
Boston
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Tel: 978-692-3848
Fax: 978-692-3821
Unit 28F, World Trade Plaza
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Tel: 86-591-7503506
Fax: 86-591-7503521
Atlanta
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ASIA/PACIFIC
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Singapore
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Kaohsiung Branch
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Taiwan
Taiwan Branch
11F-3, No. 207
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Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
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Austria
Room 701, Bldg. B
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Fax: 86-755-8295-1393
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Tel: 86-757-28395507 Fax: 86-757-28395571
China - Qingdao
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
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Tel: 86-532-5027355 Fax: 86-532-5027205
India
Divyasree Chambers
1 Floor, Wing A (A3/A4)
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Tel: 91-80-22290061 Fax: 91-80-22290062
Japan
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
France
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
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Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany
Steinheilstrasse 10
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Italy
Via Quasimodo, 12
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Milan, Italy
Tel: 39-0331-742611
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Netherlands
P. A. De Biesbosch 14
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Tel: 31-416-690399
Fax: 31-416-690340
United Kingdom
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Berkshire, England RG41 5TU
Tel: 44-118-921-5869
Fax: 44-118-921-5820
02/17/04
DS21223G-page 24
 2004 Microchip Technology Inc.