ONSEMI MC10EP01DTR2

MC10EP01, MC100EP01
3.3V / 5VECL 4−Input
OR/NOR
Description
The MC10EP01 is a 4−input OR/NOR gate. The device is
functionally equivalent to the EL01 device, LVEL01, and E101 (a
quad version). With AC performance much faster than the LVEL01
device, the EP01 is ideal for applications requiring the fastest AC
performance available.
The 100 Series contains temperature compensation.
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MARKING DIAGRAMS*
8
8
Features
1
• 230 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range:
SOIC−8
D SUFFIX
CASE 751
1
8
HEP01
ALYW
G
KEP01
ALYW
G
1
VCC = 3.0 V to 5.5 V with VEE = 0 V
1
TSSOP−8
DT SUFFIX
CASE 948R
1
8
HP01
ALYWG
G
1
KP01
ALYWG
G
5H MG
G
•
•
8
8
VCC = 0 V with VEE = −3.0 V to −5.5 V
Open Input Default State
Pb−Free Packages are Available
DFN8
MN SUFFIX
CASE 506AA
H
K
5H
2W
M
= MC10
= MC100
= MC10
= MC100
= Date Code
2W MG
G
• NECL Mode Operating Range:
1
4
1
4
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 8
1
Publication Order Number:
MC10EP01/D
MC10EP01, MC100EP01
Table 1. PIN DESCRIPTION
D0
D1
1
8
2
7
VCC
Pin
Q
D2
3
6
Q
D3
4
5
VEE
Function
D0 − D3
ECL Data Inputs
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
EP
Exposed pad must be connected to a sufficient
thermal conduit. Electrically connect to the most
negative supply or leave floating open.
Table 2. TRUTH TABLE
Figure 1. 8−Lead Pinout (Top View)
and Logic Diagram
D0*
D1*
D2*
D3*
Q
Q
L
L
L
L
L
H
H
X
X
X
H
L
X
H
X
X
H
L
X
X
H
X
H
L
X
X
X
H
H
L
H
H
H
H
H
L
*Pins will default LOW when left open.
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
ESD Protection
N/A
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
TSSOP−8
DFN8
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
> 4 kV
> 200 V
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
UL 94 V−0 @ 0.125 in
115 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2
MC10EP01, MC100EP01
Table 4. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
PECL Mode Power Supply
Parameter
VEE = 0 V
Condition 1
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
IBB
VBB Sink/Source
± 0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SOIC−8
SOIC−8
190
130
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
SOIC−8
41 to 44
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
TSSOP−8
41 to 44
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
Tsol
Wave Solder
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
265
265
°C
Pb
Pb−Free
Condition 2
VI v VCC
VI w VEE
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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3
MC10EP01, MC100EP01
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
20
24
31
20
24
31
20
24
31
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 3)
2165
2290
2415
2230
2355
2480
2290
2415
2540
mV
VOL
Output LOW Voltage (Note 3)
1365
1490
1615
1430
1555
1680
1490
1615
1740
mV
VIH
Input HIGH Voltage (Single−Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single−Ended)
1365
1690
1430
1755
1490
1815
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
150
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 4)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
20
24
31
20
24
31
20
24
31
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 5)
3865
3990
4115
3930
4055
4180
3990
4115
4240
mV
VOL
Output LOW Voltage (Note 5)
3065
3190
3315
3130
3255
3380
3190
3315
3440
mV
VIH
Input HIGH Voltage (Single−Ended)
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage (Single−Ended)
3065
3390
3130
3455
3190
3515
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
150
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
5. All loading with 50 W to VCC − 2.0 V.
Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 6)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
20
24
31
20
24
31
20
24
31
mA
Output HIGH Voltage (Note 7)
−1135
−1010
−885
−1070
−945
−820
−1010
−885
−760
mV
VOL
Output LOW Voltage (Note 7)
−1935
−1810
−1685
−1870
−1745
−1620
−1810
−1685
−1560
mV
VIH
Input HIGH Voltage (Single−Ended)
−1210
−885
−1145
−820
−1085
−760
mV
VIL
Input LOW Voltage (Single−Ended)
−1935
−1610
−1870
−1545
−1810
−1485
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. Input and output parameters vary 1:1 with VCC.
7. All loading with 50 W to VCC − 2.0 V.
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4
MC10EP01, MC100EP01
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 8)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
15
24
32
17
26
36
19
28
38
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 9)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 9)
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
VIH
Input HIGH Voltage (Single−Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1355
1675
1355
1675
1355
1675
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
150
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
9. All loading with 50 W to VCC − 2.0 V.
Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 10)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
15
24
32
17
26
36
19
28
38
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 11)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
VOL
Output LOW Voltage (Note 11)
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3055
3375
3055
3375
3055
3375
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
150
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
11. All loading with 50 W to VCC − 2.0 V.
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 12)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
15
24
32
17
26
36
19
28
38
mA
Output HIGH Voltage (Note 13)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 13)
−1945
−1820
−1695
−1945
−1820
−1695
−1945
−1820
−1695
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1945
−1625
−1945
−1625
−1945
−1625
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
12. Input and output parameters vary 1:1 with VCC.
13. All loading with 50 W to VCC − 2.0 V.
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5
MC10EP01, MC100EP01
Table 11. AC CHARACTERISTICS VCC = 3.0 V to 5.5 V; VEE = 0 V or VCC = 0 V; VEE = −3.0 V to −5.5 V (Note 14)
−40°C
Symbol
Min
Characteristic
fmax
Maximum Frequency
(See Figure 2. Fmax/JITTER)
tPLH,
tPHL
Propagation Delay
tJITTER
Cycle−to−Cycle Jitter
(See Figure 2. Fmax/JITTER)
tr
tf
Output Rise/Fall Times
(20% − 80%)
25°C
Typ
Max
Min
>3
D to Q, Q
Q, Q
150
50
85°C
Typ
Max
Min
>3
260
330
0.2
<1
120
170
150
60
Typ
Max
>3
270
330
0.2
<1
130
180
200
70
Unit
GHz
300
350
ps
0.2
<1
ps
150
200
ps
900
8
800
7
700
6
600
5
500
4
ÉÉ
ÉÉ
ÉÉ
400
3
300
2
200
ÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉ
100
0
1
(JITTER)
0
1000
2000
3000
JITTEROUT (ps) (RMS)
VOUTpp (mV)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
4000
5000
6000
FREQUENCY (MHz)
Figure 2. Fmax/Jitter
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
D
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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6
MC10EP01, MC100EP01
ORDERING INFORMATION
Package
Shipping†
SOIC−8
98 Units / Rail
MC10EP01DG
SOIC−8
(Pb−Free)
98 Units / Rail
MC10EP01DR2
SOIC−8
2500 / Tape & Reel
MC10EP01DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC10EP01DT
TSSOP−8
100 Units / Rail
MC10EP01DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC10EP01DTR2
TSSOP−8
2500 / Tape & Reel
MC10EP01DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC10EP01MNR4
DFN8
1000 / Tape & Reel
DFN8
(Pb−Free)
1000 / Tape & Reel
SOIC−8
98 Units / Rail
MC100EP01DG
SOIC−8
(Pb−Free)
98 Units / Rail
MC100EP01DR2
SOIC−8
2500 / Tape & Reel
MC100EP01DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC100EP01DT
TSSOP−8
100 Units / Rail
MC100EP01DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC100EP01DTR2
TSSOP−8
2500 / Tape & Reel
MC100EP01DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC100EP01MNR4
DFN8
1000 / Tape & Reel
DFN8
(Pb−Free)
1000 / Tape & Reel
Device
MC10EP01D
MC10EP01MNR4G
MC100EP01D
MC100EP01MNR4G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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7
MC10EP01, MC100EP01
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
1
0.25 (0.010)
M
Y
M
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
H
0.10 (0.004)
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
MC10EP01, MC100EP01
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x
0.15 (0.006) T U
0.10 (0.004)
S
2X
L/2
L
8
5
1
PIN 1
IDENT
0.15 (0.006) T U
K REF
S
M
T U
V
S
0.25 (0.010)
B
−U−
4
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
S
M
A
−V−
F
DETAIL E
C
0.10 (0.004)
−T− SEATING
PLANE
D
−W−
G
DETAIL E
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9
DIM
A
B
C
D
F
G
K
L
M
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.80
1.10
0.05
0.15
0.40
0.70
0.65 BSC
0.25
0.40
4.90 BSC
0_
6_
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.031
0.043
0.002
0.006
0.016
0.028
0.026 BSC
0.010
0.016
0.193 BSC
0_
6_
MC10EP01, MC100EP01
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
PIN ONE
REFERENCE
2X
0.10 C
2X
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
0.10 C
TOP VIEW
0.08 C
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.20
0.30
2.00 BSC
1.10
1.30
2.00 BSC
0.70
0.90
0.50 BSC
0.20
−−−
0.25
0.35
A
0.10 C
8X
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
E
(A3)
SIDE VIEW
A1
C
D2
e
e/2
4
1
8X
L
E2
K
8
5
8X
b
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
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MC10EP01/D