ONSEMI MC74LVX245DT

SEMICONDUCTOR TECHNICAL DATA
LVX
The MC74LVX245 is an advanced high speed CMOS octal bus
transceiver.
It is intended for two–way asynchronous communication between data
buses. The direction of data transmission is determined by the level of the
T/R input. The output enable pin (OE) can be used to disable the device,
so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static discharge.
•
•
•
•
•
•
•
•
LOW–VOLTAGE CMOS
High Speed: tPD = 4.7ns (Typ) at VCC = 3.3V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
APPLICATION NOTES
1. Do not force a signal on an I/O pin when it is an active output, damage may
occur.
2. All floating (high impedence) input or I/O pins must be fixed by means of
pull up or pull down resistors or bus terminator ICs.
3. A parasitic diode is formed between the bus and VCC terminals. Therefore,
the LVX245 cannot be used to interface 5V to 3V systems directly.
VCC
OE
B0
B1
B2
B3
B4
B5
B6
B7
20
19
18
17
16
15
14
13
12
11
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
PIN NAMES
1
2
T/R
A0
3
4
5
6
7
8
9
10
A1
A2
A3
A4
A5
A6
A7
GND
Pins
Function
OE
T/R
A0–A7
Output Enable Input
Transmit/Receive Input
Side A 3–State Inputs or 3–State
Outputs
Side B 3–State Inputs or 3–State
Outputs
Figure 1. 20–Lead Pinout (Top View)
B0–B7
6/97
 Motorola, Inc. 1997
1
REV 0
MC74LVX245
OE 19
T/R 1
A0
2
18
A1
3
17
A2
B5
8
12
A7
B4
7
13
A6
B3
6
14
A5
B2
5
15
A4
B1
4
16
A3
B0
B6
9
11
B7
Figure 2. Logic Diagram
INPUTS
OE
T/R
OPERATING MODE
Non–Inverting
L
L
B Data to A Bus
L
H
A Data to B Bus
H
X
Z
H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level
and Transitions are Acceptable; For ICC reasons, Do Not Float Inputs
MOTOROLA
2
LCX DATA
BR1339 — REV 3
MC74LVX245
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MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
–0.5 to +7.0
V
Vin
DC Input Voltage (T/R, OE)
–0.5 to +7.0
V
VI/O
DC Output Voltage
–0.5 to VCC +0.5
V
IIK
Input Diode Current
–20
mA
IOK
Output Diode Current
±20
mA
Iout
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±75
mA
PD
Power Dissipation
180
mW
Tstg
Storage Temperature
–65 to +150
_C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
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RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage
2.0
3.6
V
Vin
DC Input Voltage (T/R, OE)
0
5.5
V
VI/O
DC Output Voltage
0
VCC
V
TA
Operating Temperature, All Package Types
–40
+85
_C
∆t/∆V
Input Rise and Fall Time
0
100
ns/V
DC ELECTRICAL CHARACTERISTICS
S b l
Symbol
P
Parameter
T
Test
C
Conditions
di i
Min
1.5
2.0
2.4
VIH
High–Level Input Voltage
2.0
3.0
3.6
VIL
Low–Level Input Voltage
2.0
3.0
3.6
VOH
High–Level Output Voltage
(Vin = VIH or VIL)
IOH = –50µA
IOH = –50µA
IOH = –4mA
2.0
3.0
3.0
VOL
Low–Level Output Voltage
(Vin = VIH or VIL)
IOL = 50µA
IOL = 50µA
IOL = 4mA
2.0
3.0
3.0
Iin
Input Leakage Current
Vin = 5.5V or GND
(T/R, OE)
IOZ
Maximum Three–State
Leakage Current
ICC
Quiescent Supply Current
LCX DATA
BR1339 — REV 3
TA = 25°C
VCC
V
Typ
TA = – 40 to 85°C
Max
Min
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.58
Max
2.0
3.0
V
0.5
0.8
0.8
1.9
2.9
2.48
V
V
0.1
0.1
0.36
0.1
0.1
0.44
V
3.6
±0.1
±1.0
µA
Vin = VIL or VIH
Vout = VCC or GND
3.6
±0.25
±2.5
µA
Vin = VCC or GND
3.6
4.0
40.0
µA
3
0.0
0.0
U i
Unit
MOTOROLA
MC74LVX245
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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
TA = 25°C
S b l
Symbol
tPLH,
tPHL
tPZL,
tPZH
tPLZ,
tPHZ
tOSHL
tOSLH
P
Parameter
T
Test
C
Conditions
di i
Propagation Delay
Input to Output
Output Enable Time to
High and Low Level
Output Disable Time From
High and Low Level
Output–to–Output Skew
(Note 1.)
Min
TA = – 40 to 85°C
Typ
Max
Min
Max
U i
Unit
ns
VCC = 2.7V
CL = 15pF
CL = 50pF
6.1
8.6
10.7
14.2
1.0
1.0
13.5
17.0
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
4.7
7.2
6.6
10.1
1.0
1.0
8.0
11.5
VCC = 2.7V
RL = 1kΩ
CL = 15pF
CL = 50pF
9.0
11.5
16.9
20.4
1.0
1.0
20.5
24.0
VCC = 3.3 ± 0.3V
RL = 1kΩ
CL = 15pF
CL = 50pF
7.1
9.6
11.0
14.5
1.0
1.0
13.0
16.5
VCC = 2.7V
RL = 1kΩ
CL = 50pF
11.5
18.0
1.0
21.0
VCC = 3.3 ± 0.3V
RL = 1kΩ
CL = 50pF
9.6
12.8
1.0
14.5
VCC = 2.7V
VCC = 3.3 ±0.3V
CL = 50pF
CL = 50pF
1.5
1.5
1.5
1.5
ns
ns
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
CAPACITIVE CHARACTERISTICS
TA = 25°C
S b l
Symbol
P
Parameter
Min
TA = – 40 to 85°C
Typ
Max
10
Min
Max
U i
Unit
10
pF
Cin
Input Capacitance (T/R, OE)
4
CI/O
Maximum Three–State I/O Capacitance
8
pF
CPD
Power Dissipation Capacitance (Note 2.)
21
pF
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per bit). CPD is used to determine the no–load
dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package)
TA = 25°C
S b l
Symbol
Ch
Characteristic
i i
Typ
Max
U i
Unit
VOLP
Quiet Output Maximum Dynamic VOL
0.5
0.8
V
VOLV
Quiet Output Minimum Dynamic VOL
–0.5
–0.8
V
VIHD
Minimum High Level Dynamic Input Voltage
2.0
V
VILD
Maximum Low Level Dynamic Input Voltage
0.8
V
MOTOROLA
4
LCX DATA
BR1339 — REV 3
MC74LVX245
SWITCHING WAVEFORMS
VCC
50%
T/R
GND
VCC
VCC
Input
A or B
OE
50%
GND
tPZL
GND
tPLH
Output
B or A
50% VCC
50% VCC
tPLZ
HIGH
IMPEDANCE
tPHL
A or B
50% VCC
50% VCC
tPZH
A or B
VOL +0.3V
tPHZ
VOH –0.3V
HIGH
IMPEDANCE
50% VCC
Figure 3.
Figure 4.
TEST CIRCUITS
TEST POINT
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
OUTPUT
DEVICE
UNDER
TEST
CL*
* Includes all probe and jig capacitance
CL*
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
* Includes all probe and jig capacitance
Figure 5. Propagation Delay Test Circuit
LCX DATA
BR1339 — REV 3
1 kΩ
Figure 6. Three–State Test Circuit
5
MOTOROLA
MC74LVX245
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
–A–
20
11
–B–
10X
P
0.010 (0.25)
1
M
B
M
10
20X
D
0.010 (0.25)
T A
M
B
S
DIM
A
B
C
D
F
G
J
K
M
P
R
J
S
F
R X 45 _
C
–T–
G
18X
SEATING
PLANE
MILLIMETERS
MIN
MAX
12.65
12.95
7.40
7.60
2.35
2.65
0.35
0.49
0.50
0.90
1.27 BSC
0.25
0.32
0.10
0.25
0_
7_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.499
0.510
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.050 BSC
0.010
0.012
0.004
0.009
0_
7_
0.395
0.415
0.010
0.029
M
K
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
20X
0.15 (0.006) T U
K REF
0.10 (0.004)
S
M
T U
S
V
S
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
K
K1
2X
L/2
20
11
J J1
B
–U–
L
PIN 1
IDENT
SECTION N–N
1
10
0.25 (0.010)
N
0.15 (0.006) T U
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
M
A
–V–
N
F
DETAIL E
–W–
C
D
G
H
DETAIL E
0.100 (0.004)
–T– SEATING
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
6.40
6.60
4.30
4.50
–––
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.27
0.37
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.252
0.260
0.169
0.177
–––
0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.011
0.015
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
PLANE
MOTOROLA
6
LCX DATA
BR1339 — REV 3
MC74LVX245
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967–01
ISSUE O
20
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
11
Q1
E HE
1
M_
L
10
DETAIL P
Z
D
VIEW P
e
A
c
A1
b
0.13 (0.005)
M
0.10 (0.004)
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
–––
2.05
0.05
0.20
0.35
0.50
0.18
0.27
12.35
12.80
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
–––
0.81
INCHES
MIN
MAX
–––
0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.486
0.504
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
–––
0.032
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
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Mfax is a trademark of Motorola, Inc.
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– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
INTERNET: http://motorola.com/sps
◊
LCX DATA
BR1339 — REV 3
7
MC74LVX245/D
MOTOROLA