MK2761A SET-TOP CLOCK SOURCE Description Features The MK2761A is a low-cost, low-jitter, high-performance clock synthesizer for set-top box applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal or clock input to produce multiple output clocks including the processor clock, the UART clock, a selectable audio clock, and four low skew copies of the 27 MHz. The audio clocks are frequency-locked to the 27 MHz using our patented zero ppm error techniques. This allows audio and video to track exactly, thereby eliminating the need for large buffer memory. • Packaged in a 16-pin narrow (150 mil) SOIC • Available in Pb (lead) free package • Selectable audio sampling frequencies support 32, ICS manufactures a large variety of Set-top Box and multimedia clock synthesizers for all applications. Consult ICS to eliminate crystals and oscillators from your board. 44.1, and 48 kHz in most DACs • • • • 27 MHz crystal or clock input Processor frequency of 16.67 MHz Fixed clocks of 27 and 3.6864 MHz Zero ppm in audio clocks exactly track video frequency • 25 mA output drive capability at TTL levels • Advanced, low-power, sub-micron CMOS process • Operating voltage of 5.0 V ±10% Block Diagram VDD 2 2 ACS1:0 Audio Clock Clock Synthesis and Control Circuitry 3.6864 MHz 16.667 MHz 27.000 MHz crystal or clock X1 4 Crystal Ocsillator 27.000 MHz X2 3 GND 1 MDS 2761A D I n t e gra te d C i r c u i t S y s t e m s ● 525 Race Stre et, San Jo se, CA 9 5126 Revision 070705 ● te l (40 8) 2 97-12 01 ● w w w. i c st . c o m MK2761A SET-TOP CLOCK SOURCE Pin Assignment Audio Clock (MHz) DecodingTable ACS1 1 16 ACS0 X2 2 15 27 MHz X1/ICLK 3 14 27 MHz VDD 4 13 VDD GND 5 12 GND 16.67 MHz 6 11 27 MHz 3.68 MHz 7 10 27 MHz ACLK 8 9 ACS1 ACS0 ACLK 0 0 1 1 0 1 0 1 8.192 11.2896 12.288 5.6448 GND 16-pin (150 mil) SOIC Pin Descriptions Pin Number Pin Name Pin Type 1 ACS1 Input 2 X2 XO Crystal connection. Connect to 27 MHz crystal. Leave unconnected for clock input. 3 X1/ICLK XI Crystal connection. Connect to 27 MHz crystal or to a 27 MHz input clock. 4 VDD Power Connect to +5 V. 5 GND Power Connect to ground. 6 16.67M Output 16.667 MHz processor clock output. 7 3.68M Output 3.6864 MHz clock output. 8 ACLK Output Audio clock output. Determined by status of ACS1, ACS0. See table above 9 GND Power Connect to ground. 10 27M Output 27 MHz buffered reference clock output. Duty cycle matches input clock. 11 27M Output 27 MHz buffered reference clock output. Duty cycle matches input clock. 12 GND Power Connect to ground. 13 VDD Power Connect to +5 V. 14 27M Output 27 MHz buffered reference clock output. Duty cycle matches input clock. 15 27M Output 27 MHz buffered reference clock output. Duty cycle matches input clock. 16 ACS0 Input Audio clock Select 1. Selects ACLK on pin 8. See table above. Audio clock Select 0. Selects audio clock on pin 8. See table above. 2 MDS 2761A D In te grated Circuit Systems Pin Description ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 070705 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m MK2761A SET-TOP CLOCK SOURCE External Components The MK2761A requires a minimum number of external components for proper operation. Decoupling capacitors of 0.1µF should be connected between VDD and GND, as close to the MK2761A as possible. A series termination resistor of 33Ω may be used for each clock output. If a clock input is not used, the 27 MHz crystal must be connected as close to the chip as possible. The crystal should be a fundamental mode (do not use third overtone), parallel resonant, 50 ppm or better. Crystal capacitors should be connected from pins X1 to ground and X2 to ground. The value of these capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL-4) x 2. So, for a crystal with 16 pF load capacitance, the crystal caps should be 24 pF each. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK2761A. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70°C Storage Temperature -65 to +150°C Junction Temperature 125°C Soldering Temperature 260°C Recommended Operation Conditions Parameter Min. Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Max. Units 0 +70 °C +4.5 +5.5 V 3 MDS 2761A D In te grated Circuit Systems Typ. ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 070705 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m MK2761A SET-TOP CLOCK SOURCE DC Electrical Characteristics VDD = 5.0 V ±10% (unless otherwise noted), Temp 0 to +70°C Parameter Symbol Conditions Operating Voltage VDD Input High Voltage VIH X1/ICLK pin only Input Low Voltage VIL X1/ICLK pin only Input High Voltage VIH Input Low Voltage VIL Output High Voltage VOH IOH = -25 mA Output Low Voltage VOL IOL = 25 mA Output High Voltage, CMOS level VOH IOH = -8 mA Operating Supply Current IDD No load, Note 1 Short Circuit Current IOS Each output Input Capacitance CIN Min. Typ. 4.5 3.5 Max. Units 5.5 V 2.5 V 2.5 1.5 2 V V 0.8 2.4 V V 0.4 VDD-0.4 V V 65 mA ±100 mA 7 pF Frequency Error, ACLK 0 ppm Note 1: With ACLK clock at 12.28 MHz. AC Electrical Characteristics VDD = 5.0 V ±10% (unless otherwise noted), Temp 0 to +70°C Parameter Symbol Conditions Min. Input Frequency Typ. Max. Units 27 MHz Output Clock Rise Time tOR 0.8 to 2.0 V 1.5 ns Output Clock Fall Time tOF 2.0 to 0.8 V 1.5 ns 60 % Output Clock Duty Cycle At 1.4 V Absolute Jitter, short term Variation from mean Skew of 27 MHz Outputs Rising edges at 1.4 V ±250 -500 0 ● 525 Ra ce Street, San Jose, CA 9512 6 ps 500 4 MDS 2761A D In te grated Circuit Systems 40 ps Revision 070705 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m MK2761A SET-TOP CLOCK SOURCE Thermal Characteristics Parameter Symbol Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Min. Max. Units Still air 120 °C/W θJA 1 m/s air flow 115 °C/W θJA 3 m/s air flow 105 °C/W 58 °C/W θJC Marking Diagram (MK2761ASLF) 9 16 MK2761AS $$###### YYWW 1 Typ. θJA Marking Diagram (MK2761AS) 16 Conditions 9 MK2761ASLF ###### YYWW 8 1 8 Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. “LF” denotes Pb (lead) free package. 4. Bottom marking: (origin). Origin = country of origin if not USA. 5 MDS 2761A D In te grated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 070705 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m MK2761A SET-TOP CLOCK SOURCE Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 16 Symbol E Min A A1 B C D E e H h L α H INDEX AREA 1 2 D Inches* Max Min 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .3859 .3937 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° *For reference only. Controlling dimensions in mm. A h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature Tubes 16-pin SOIC 0 to +70° C Tape and Reel 16-pin SOIC 0 to +70° C MK2761AS MK2761ASTR see page 5 MK2761ASLF MK2761ASLFTR Tubes 16-pin SOIC 0 to +70° C Tape and Reel 16-pin SOIC 0 to +70° C Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 6 MDS 2761A D In te grated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 070705 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m