MM54HCT03/MM74HCT03 Quad 2-Input NAND Gate (Open Drain) General Description The MM54HCT03/MM74HCT03 are logic functions fabricated by using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOSÐlow quiescent power and wide power supply range. These devices are input and output characteristic and pinout compatible with standard DM54LS/74LS logic families. All inputs are protected from static discharge damage by internal diodes to VCC and ground. MM54HCT/MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LSTTL devices and can be used to reduce power consumption in existing designs. Features Y Y Y Y TTL, LS pin-out and threshold compatible Fast switching: tPLH, tPHL e 12 ns (typ) Low power: 10 mW at DC High fan-out, 10 LS-TTL loads Connection and Logic Diagrams Dual-In-Line Package TL/F/9395 – 1 Order Number MM54HCT03 or MM74HCT03 TL/F/9395 – 2 C1995 National Semiconductor Corporation TL/F/9395 RRD-B30M105/Printed in U. S. A. MM54HCT03/MM74HCT03 Quad 2-Input NAND Gate (Open Drain) January 1988 Absolute Maximum Ratings (Notes 1 & 2) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) b 0.5V to a 7.0V Supply Voltage (VCC) b 1.5V to VCC a 1.5V DC Input Voltage (VIN) b 0.5V to VCC a 0.5V DC Output Voltage (VOUT) g 20 mA Clamp Diode Current (IIK, IOK) g 25 mA DC Output Current, per Pin (IOUT) g 50 mA DC VCC or GND Current, per Pin (ICC) b 65§ C to a 150§ C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Lead Temperature (TL) (Soldering, 10 seconds) 260§ C Operating Temperature Range (TA) MM74HCT MM54HCT Min 4.5 Max 5.5 Units V 0 VCC V b 40 b 55 a 85 a 125 §C §C 500 ns Input Rise or Fall Times (tr, tf) DC Electrical Characteristics VCC e 5V g 10% (unless otherwise specified) Symbol Parameter Conditions TA e 25§ C 74HCT 54HCT TA eb40§ C to a 85§ C TA eb55§ C to a 125§ C Units Typ Guaranteed Limits VIH Minimum High Level Input Voltage 2.0 2.0 2.0 V VIL Maximum Low Level Input Voltage 0.8 0.8 0.8 V VOL Maximum Low Level Voltage VIN e VIH 0 lIOUTl e 20 mA lIOUTl e 4.0 mA, VCC e 4.5V 0.2 lIOUTl e 4.8 mA, VCC e 5.5V 0.2 0.1 0.26 0.26 0.1 0.33 0.33 0.1 0.4 0.4 V V V IIN Maximum Input Current VIN e VCC or GND, VIH or VIL g 0.1 g 1.0 g 1.0 mA ILKG Minimum High Level VIN e VIH or VIL, Output Leakage Current VOUT e VCC 0.5 5.0 10 mA ICC Maximum Quiescent Supply Current VIN e VCC or GND IOUT e 0 mA 2.0 20 40 mA VIN e 2.4V or 0.5V (Note 4) 1.2 1.4 1.5 mA Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package; b 12 mW/§ C from 100§ C to 125§ C. Note 4: This is measured per input with all other inputs held at VCC or ground. 2 AC Electrical Characteristics VCC e 5.0V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns, unless otherwise noted Parameter Conditions Typ Units tPZL Symbol Maximum Propagation Delay RL e 1 kX 7 ns tPLZ Maximum Propagation Delay RL e 1 kX 10 ns AC Electrical Characteristics VCC e 5.0V g 10%, CL e 50 pF, tr e tf e 6 ns, unless otherwise specified Symbol Parameter Conditions TA e C 25§ Typ 74HCT TA eb40§ C to a 85§ C 54HCT TA eb55§ C to a 125§ C Units Guaranteed Limits tPZL Maximum Propagation Delay RL e 1 kX 10 20 25 30 ns tPLZ Maximum Propagation Delay RL e 1 kX 12 20 25 30 ns tTHL Maximum Output Fall Time 10 15 19 22 ns CPD Power Dissipation Capacitance (Note 5) CIN Maximum Input Capacitance (per gate) RL e % 14 5 pF 10 10 pF Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC. Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54HCT03J or MM74HCT03J NS Package Number J14A 3 MM54HCT03/MM74HCT03 Quad 2-Input NAND Gate (Open Drain) Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM74HCT03N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: (a49) 0-180-530 85 86 Email: cnjwge @ tevm2.nsc.com Deutsch Tel: (a49) 0-180-530 85 85 English Tel: (a49) 0-180-532 78 32 Fran3ais Tel: (a49) 0-180-532 93 58 Italiano Tel: (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.