NCP551, NCV551 150 mA CMOS Low Iq Low−Dropout Voltage Regulator The NCP551 series of fixed output low dropout linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent. The NCP551 series features an ultra−low quiescent current of 4.0 A. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits. The NCP551 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 0.1 F. The device is housed in the micro−miniature TSOP−5 surface mount package. Standard voltage versions are 1.5, 1.8, 2.5, 2.7, 2.8, 3.0, 3.2, 3.3, and 5.0 V. Other voltages are available in 100 mV steps. • 1 TSOP−5 (SOT23−5, SC59−5) SN SUFFIX CASE 483 Low Quiescent Current of 4.0 A Typical Maximum Operating Voltage of 12 V Low Output Voltage Option High Accuracy Output Voltage of 2.0% Industrial Temperature Range of −40°C to 85°C (NCV551, TA = −40°C to +125°C) NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes Pb−Free Packages are Available Vin 1 GND 2 Enable 3 5 Vout 4 N/C xxxYW • 5 PIN CONNECTIONS AND MARKING DIAGRAM Features • • • • • http://onsemi.com xxx = Version Y = Year W = Work Week (Top View) Typical Applications • Battery Powered Instruments • Hand−Held Instruments • Camcorders and Cameras Vin ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. 1 5 Thermal Shutdown Vout Driver w/ Current Limit Enable ON 3 OFF GND 2 Figure 1. Representative Block Diagram Semiconductor Components Industries, LLC, 2004 August, 2004 − Rev. 9 1 Publication Order Number: NCP551/D NCP551, NCV551 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 Vin 2 GND 3 Enable 4 N/C No Internal Connection. 5 Vout Regulated output voltage. Positive power supply input voltage. Power supply ground. This input is used to place the device into low−power standby. When this input is pulled low, the device is disabled. If this function is not used, Enable should be connected to Vin. MAXIMUM RATINGS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ Rating Symbol Value Unit Input Voltage Vin 0 to 12 V Enable Voltage VEN −0.3 to Vin +0.3 V Output Voltage Vout −0.3 to Vin +0.3 V Power Dissipation and Thermal Characteristics Power Dissipation Thermal Resistance, Junction−to−Ambient PD RJA Internally Limited 250 W °C/W TJ +150 °C TA −40 to +85 −40 to +125 °C Tstg −55 to +150 °C Operating Junction Temperature Operating Ambient Temperature NCP551 NCV551 Storage Temperature Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 200 V 2. Latchup capability (85°C) 100 mA DC with trigger voltage. http://onsemi.com 2 NCP551, NCV551 ELECTRICAL CHARACTERISTICS (Vin = Vout(nom.) + 1.0 V, VEN = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless otherwise noted.) Characteristic Symbol Output Voltage (TA = 25°C, Iout = 10 mA) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.2 V 3.3 V 5.0 V Vout Output Voltage (TA = Tlow to Thigh, Iout = 10 mA) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.2 V 3.3 V 5.0 V Vout Min Typ Max 1.455 1.746 2.425 2.646 2.744 2.94 3.136 3.234 4.90 1.5 1.8 2.5 2.7 2.8 3.0 3.2 3.3 5.0 1.545 1.854 2.575 2.754 2.856 3.06 3.264 3.366 5.10 1.440 1.728 2.400 2.619 2.716 2.910 3.104 3.201 4.850 1.5 1.8 2.5 2.7 2.8 3.0 3.2 3.3 5.0 1.560 1.872 2.600 2.781 2.884 3.09 3.296 3.399 5.150 Unit V V Line Regulation (Vin = Vout + 1.0 V to 12 V, Iout = 10 mA) Regline − 10 30 mV Load Regulation (Iout = 10 mA to 150 mA, Vin = Vout + 2.0 V) Regload − 40 65 mV Output Current (Vout = (Vout at Iout = 100 mA) −3%) 1.5 V−2.0 V (Vin = 4.0 V) 2.1 V−3.0 V (Vin = 5.0 V) 3.1 V−4.0 V (Vin = 6.0 V) 4.1 V−5.0 V (Vin = 8.0 V) Io(nom.) 150 150 150 150 − − − − − − − − Dropout Voltage (Iout = 10 mA, Measured at Vout −3.0%) 1.5 V, 1.8 V, 2.5 V 2.7 V, 2.8 V, 3.0 V, 3.2 V, 3.3 V, 5.0 V Vin−Vout − − 130 40 220 150 − − 0.1 4.0 1.0 8.0 − 100 − 1.3 − − − − 0.3 160 160 160 160 350 350 350 350 600 600 600 600 Quiescent Current (Enable Input = 0 V) (Enable Input = Vin, Iout = 1.0 mA to Io(nom.)) IQ Output Voltage Temperature Coefficient Tc Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) mA mV A V Vth(en) Output Short Circuit Current (Vout = 0 V) 1.5 V−2.0 V (Vin = 4.0 V) 2.1 V−3.0 V (Vin = 5.0 V) 3.1 V−4.0 V (Vin = 6.0 V) 4.1 V−5.0 V (Vin = 8.0 V) mA Iout(max) 3. Maximum package power dissipation limits must be observed. TJ(max) TA PD RJA 4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. NCP551 Tlow = −40°C Thigh = +85°C Thigh = +125°C. NCV551 Tlow = −40°C http://onsemi.com 3 ppm/°C NCP551, NCV551 DEFINITIONS Load Regulation Line Regulation The change in output voltage for a change in output current at a constant temperature. The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. Dropout Voltage The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 3% below its nominal. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Line Transient Response Typical over and undershoot response when input voltage is excited with a given slope. Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Maximum Power Dissipation The maximum total dissipation for which the regulator will operate within its specifications. Quiescent Current The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current. Maximum Package Power Dissipation The maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. Depending on the ambient power dissipation and thus the maximum available output current. http://onsemi.com 4 NCP551, NCV551 3.45 3.35 Vout = 3.3 V 3.3 GROUND CURRENT (A) GROUND CURRENT (A) Vout = 2.8 V 3.25 3.2 3.15 3.1 3.05 3.35 3.3 3.25 3.2 3.15 0 25 50 100 75 125 150 0 100 75 125 Figure 2. Ground Pin Current versus Output Current Figure 3. Ground Pin Current versus Output Current 4 3.5 3.5 3 2.5 2 1.5 Vout(nom) = 2.8 V Iout = 25 mA 1 0.5 150 3 2.5 2 1.5 Vout(nom) = 3.3 V Iout = 25 mA 1 0.5 0 0 2 4 6 8 10 12 0 14 2 4 6 8 10 12 Vin, INPUT VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS) Figure 4. Ground Pin Current versus Input Voltage Figure 5. Ground Pin Current versus Input Voltage Vin, INPUT VOLTAGE (V) 0 8 6 4 OUTPUT VOLTAGE DEVIATION (mV) Vin, INPUT VOLTAGE (V) 50 Iout, OUTPUT CURRENT (mA) 4 OUTPUT VOLTAGE DEVIATION (mV) 25 Iout, OUTPUT CURRENT (mA) GROUND PIN CURRENT (A) GROUND PIN CURRENT (A) 3.4 Vin = 3.8 V to 4.8 V Vout = 2.8 V Cout = 1 F Iout = 10 mA 400 200 14 6 4 Vin = 3.8 V to 4.8 V Vout = 2.8 V Cout = 1 F Iout = 100 mA 400 200 0 −200 0 −400 −200 −600 −400 0 200 400 600 800 1000 1200 1400 1600 0 200 400 600 800 1000 1200 1400 TIME (s) TIME (s) Figure 6. Line Transient Response Figure 7. Line Transient Response http://onsemi.com 5 160 Vin, INPUT VOLTAGE (V) 6 4 Vin = 3.8 V to 4.8 V Vout = 2.8 V Cout = 1 F Iout = 150 mA 400 200 0 −200 0 200 400 600 800 1000 1200 1400 0 1600 200 400 600 800 1000 1200 1400 1600 TIME (s) TIME (s) Figure 8. Line Transient Response Figure 9. Line Transient Response Vin, INPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) 200 −600 0 6 4 800 400 200 OUTPUT VOLTAGE DEVIATION (mV) Vin = 4.3 V to 5.3 V Vout = 3.3 V Cout = 1 F Iout = 100 mA 600 OUTPUT VOLTAGE DEVIATION (mV) Vin = 4.3 V to 5.3 V Vout = 3.3 V Cout = 1 F Iout = 10 mA 400 −400 −600 0 −200 6 4 Vin = 4.3 V to 5.3 V Vout = 3.3 V Cout = 1 F Iout = 150 mA 600 400 200 0 −200 −400 −400 −600 −600 300 500 700 900 1100 1300 1500 1700 1900 800 1200 1600 2000 Figure 10. Line Transient Response Figure 11. Line Transient Response Vout = 2.8 V Cout = 10 mF OUTPUT VOLTAGE DEVIATION (mV) 0 0 −500 −1000 0 400 TIME (s) Iout = 3.0 mA − 150 mA 150 0 TIME (s) Iout, OUTPUT CURRENT (mA) 100 Iout, OUTPUT CURRENT (mA) 4 −200 −400 OUTPUT VOLTAGE DEVIATION (mV) 6 OUTPUT VOLTAGE DEVIATION (mV) OUTPUT VOLTAGE DEVIATION (mV) Vin, INPUT VOLTAGE (V) NCP551, NCV551 1 2 3 4 5 6 7 8 9 Iout = 3.0 mA − 150 mA Vout = 2.8 V Cout = 10 mF 150 0 1000 500 0 −500 TIME (ms) 0 1 2 3 4 5 6 7 8 9 TIME (ms) Figure 12. Load Transient Response ON Figure 13. Load Transient Response OFF http://onsemi.com 6 Iout, OUTPUT CURRENT (mA) Iout = 3.0 mA − 150 mA Vout = 3.3 V Cout = 10 mF 150 0 OUTPUT VOLTAGE DEVIATION (mV) OUTPUT VOLTAGE DEVIATION (mV) Iout, OUTPUT CURRENT (mA) NCP551, NCV551 1000 500 0 −500 0 1 2 3 4 5 6 7 8 9 Iout = 3.0 mA − 150 mA Vout = 3.3 V Cout = 10 mF 150 0 −500 −1000 0 1 2 3 TIME (ms) 7 8 9 ENABLE VOLTAGE (V) 3 2 1 0 3 Co = 1 F Vin = 4.3 V Vout = 3.3 V RO = 3.3 k VEN = 2.0 V 2 1 Vout, OUTPUT VOLTAGE (V) ENABLE VOLTAGE (V) 6 Figure 15. Load Transient Response ON 3 Vout, OUTPUT VOLTAGE (V) 5 TIME (ms) Figure 14. Load Transient Response OFF Co = 10 F 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2 1 0 3 Co = 1 F Vin = 3.8 V Vout = 2.8 V RO = 2.8 k VEN = 2.0 V 2 1 Co = 10 F 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0 TIME (s) TIME (s) Figure 16. Turn−On Response Figure 17. Turn−On Response 3 3.5 Vout, OUTPUT VOLTAGE (VOLTS) Vout, OUTPUT VOLTAGE (VOLTS) 4 2.5 2 Vin = 0 V to 12 V Vout(nom) = 2.8 V Iout = 10 mA Cin = 1 F Cout = 1 F VEN = Vin 1.5 1 0.5 0 3 2.5 Vin = 0 V to 12 V Vout = 3.3 V Iout = 10 mA Cin = 1 F Cout = 1 F VEN = Vin 2 1.5 1 0.5 0 0 2 4 6 8 10 0 12 2 4 6 8 10 12 Vin, INPUT VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS) Figure 18. Output Voltage versus Input Voltage Figure 19. Output Voltage versus Input Voltage http://onsemi.com 7 NCP551, NCV551 APPLICATIONS INFORMATION Thermal A typical application circuit for the NCP551 series is shown in Figure 20. As power across the NCP551 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and also the ambient temperature effect the rate of temperature rise for the part. This is stating that when the NCP551 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications. The maximum dissipation the package can handle is given by: Input Decoupling (C1) A 0.1 F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP551 package. Higher values and lower ESR will improve the overall line transient response. Output Decoupling (C2) The NCP551 is a stable Regulator and does not require any specific Equivalent Series Resistance (ESR) or a minimum output current. Capacitors exhibiting ESRs ranging from a few m up to 3.0 can thus safely be used. The minimum decoupling value is 0.1 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response. PD If junction temperature is not allowed above the maximum 125°C, then the NCP551 can dissipate up to 400 mW @ 25°C. The power dissipated by the NCP551 can be calculated from the following equation: Enable Operation Ptot [Vin * Ignd (Iout)] [Vin Vout] * Iout The enable pin will turn on or off the regulator. These limits of threshold are covered in the electrical specification section of this data sheet. If the enable is not used then the pin should be connected to Vin. or P Vout * Iout VinMAX tot IGND Iout Hints If a 150 mA output current is needed then the ground current from the data sheet is 4.0 A. For an NCP551SN30T1 (3.0 V), the maximum input voltage will then be 5.6 V. Please be sure the Vin and GND lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. Battery or Unregulated Voltage TJ(max) TA RJA Vout + + C1 ON OFF Figure 20. Typical Application Circuit http://onsemi.com 8 C2 NCP551, NCV551 Input R1 Input Q1 Q1 R2 R Output 1 1.0 F R3 5 Output 1 1.0 F 2 3 Q2 1.0 F 4 5 1.0 F 2 3 Figure 21. Current Boost Regulator 4 Figure 22. Current Boost Regulator with Short Circuit Limit The NCP551 series can be current boosted with a PNP transistor. Resistor R in conjunction with VBE of the PNP determines when the pass transistor begins conducting; this circuit is not short circuit proof. Input/Output differential voltage minimum is increased by VBE of the pass resistor. Short circuit current limit is essentially set by the VBE of Q2 and R1. ISC = ((VBEQ2 − ib * R2) / R1) + IO(max) Regulator Output Input 1 5 1.0 F 1.0 F 2 Enable 3 Input 4 R Output 1 1.0 F 3 5 1.0 F 2 3 4 11 V 2 R 1 1.0 F 5 1.0 F Output Q1 4 C Figure 24. Input Voltages Greater than 12 V Figure 23. Delayed Turn−on A regulated output can be achieved with input voltages that exceed the 12 V maximum rating of the NCP551 series with the addition of a simple pre−regulator circuit. Care must be taken to prevent Q1 from overheating when the regulated output (Vout) is shorted to GND. If a delayed turn−on is needed during power up of several voltages then the above schematic can be used. Resistor R, and capacitor C, will delay the turn−on of the bottom regulator. http://onsemi.com 9 NCP551, NCV551 ORDERING INFORMATION Nominal Output Voltage Marking Package NCP551SN15T1 1.5 LAO TSOP−5 NCP551SN15T1G 1.5 LAO TSOP−5 (Pb−Free) NCP551SN18T1 1.8 LAP TSOP−5 NCP551SN18T1G 1.8 LAP TSOP−5 (Pb−Free) NCP551SN25T1 2.5 LAQ TSOP−5 NCP551SN25T1G 2.5 LAQ TSOP−5 (Pb−Free) NCP551SN27T1 2.7 LAR TSOP−5 NCP551SN27T1G 2.7 LAR TSOP−5 (Pb−Free) NCP551SN28T1 2.8 LAS TSOP−5 NCP551SN28T1G 2.8 LAS TSOP−5 (Pb−Free) NCP551SN30T1 3.0 LAT TSOP−5 NCP551SN30T1G 3.0 LAT TSOP−5 (Pb−Free) NCP551SN33T1 3.3 LAU TSOP−5 NCP551SN33T1G 3.3 LAU TSOP−5 (Pb−Free) NCP551SN50T1 5.0 LAV TSOP−5 NCP551SN50T1G 5.0 LAV TSOP−5 (Pb−Free) NCV551SN15T1 1.5 LFZ TSOP−5 NCV551SN18T1 1.8 LGA TSOP−5 NCV551SN25T1 2.5 LGB TSOP−5 NCV551SN27T1 2.7 LGC TSOP−5 NCV551SN28T1 2.8 LGD TSOP−5 NCV551SN30T1 3.0 LGE TSOP−5 NCV551SN32T1 3.2 LFR TSOP−5 NCV551SN33T1 3.3 LGG TSOP−5 NCV551SN50T1 5.0 LGF TSOP−5 Device Shipping† 3000 / 7″ Tape & Reel NOTE: Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 6. NCV551 is qualified for automotive use. http://onsemi.com 10 NCP551, NCV551 PACKAGE DIMENSIONS TSOP−5 (SOT23−5, SC59−5) SN SUFFIX PLASTIC PACKAGE CASE 483−02 ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D S 5 4 1 2 3 B L G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181 A J C 0.05 (0.002) H K M SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NCP551, NCV551 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 12 For additional information, please contact your local Sales Representative. NCP551/D