NJG1707PG1 800MHz TDMA FRONT-END GaAs MMIC nGENERAL DESCRIPTION NJG1707PG1 is a front-end IC for a digital cellular phone of 800MHz band. A 2x6 antenna switches and a low noise amplifier are included. The parallel control signals of three bits logic connect T/R circuits to internal two antennas or external two antennas. The termination ports with external matching circuits make low interference between diversity antennas. The ultra small & thin FFP32-G1 package is adopted. nPACKAGE OUTLINE NJG1707PG1 nFEATURES •Ultra small & thin package •Antenna Switch lLow voltage operation lLow current consumption lLow insertion loss lLow Adjacent Channel Leakage Power •Low Noise Amplifier lLow voltage operation lLow current consumption lSmall signal gain lLow noise figure lHigh input IP3 +2.7V typ. +2.7mA typ. 17.5dB typ. @f=820MHz 1.4dB typ. @ f=820MHz IIP3=-4.5dBm typ. OIP3=+13dBm typ. @f=820MHz+820.1MHz nPIN CONFIGURATION FFP32 Type FFP32-G1 (Mount Size: 4.5x4.5x0.85mm) -2.5V (Tx only) and +3.5V 10uA typ. (Tx Mode, Pin=30dBm), 2uA typ. (Rx Mode, Pin=10dBm) 0.5dB typ. @(Tx-ANT1, Tx-EXT1) fin=960MHz, Pin=30dBm -63dBc typ. @ VDD=+3.5V, VSS=-2.5V, fin=960MHz, Pin=30dBm TER1 GND AN T2 GND RX GND AN T1 GND TE R2 (Top View) 24 23 22 21 20 19 18 17 25 SW 6 SW 5 GND(LN A) 26 SW 1 GND(LN A) LNAIN 16 GND 15 TX 14 GND 13 EXT1 12 GND 11 EXT2 10 GND 9 VDD SW 4-1 27 SW 3 SW 7 SW 8 28 SW 4-2 GND 29 SW 9 LNAOUT 30 SW 2 EXTCAP ANT-SW CONTROL VO LTAGE 31 A NT-SW DECO RDER 1 2 3 4 5 6 7 8 GND GN D CTL1 CTL2 CTL3 VSS GN D 32 GN D GND -1- NJG1707PG1 nABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER SYMBOL CONDTIONS RATINGS UNITS Supply Voltage 1 VDD1 VDD Terminal 6.0 V Supply Voltage 2 V DD2 LNAOUT Terminal 5.0 V Supply Voltage 3 VSS VSS Terminal -4.0~+0.3 V Control Voltage VCTL CTL1, CTL2, CTL3 Terminals 6.0 V TX, ANT1, EXT1 Terminals 37 dBm RX, ANT2, EXT2 Terminals 28 dBm LNAIN Terminal 10 dBm PD 600 mW Topr -40~+85 °C Tstg -55~+125 °C Input Power Power Dissipation Operating Temperature Storage Temperature Pin nELECTRICAL CHARACTERISTICS 1 [ANTENNA SWITCH DC CHARACTERISTICS] General Conditions: Ta=25°C, VDD=3.5V, VSS=-2.5V TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω) TER1, TER2 : grounded by 10pF capacitor PARAMETER SYMBOL Positive Supply Voltage VDD Negative Supply Voltage VSS Current Consumption 1 IDD1 Current Consumption 2 ISS1 Current Consumption 3 IDD2 Current Consumption 4 ISS2 Control Voltage (H) VCTL(H) Control Voltage (L) VCTL(L) Control Current ICTL Control terminal Input Impedance Rin CONDITIONS MIN TYP MAX UNITS VDD Terminal 2.7 3.5 5.0 V VSS Terminal VDD Terminal Rx Mode, No RF Signal VSS Terminal Rx Mode, No RF Signal VDD Terminal, fin=0.1~2GHz Tx Mode, Pin=30dBm VSS Terminal, fin=0.1~2GHz Tx Mode, Pin=30dBm CTL1, CTL2, CTL3 Terminals -3.5 -2.5 -2.0 V - 2.0 5.0 µA -0.1 - 0 uA - 10 30 uA -30 -10 - uA 2.0 3.0 VDD V CTL1, CTL2, CTL3 Terminals CTL1, CTL2, CTL3=VDD or CTL1, CTL2, CTL3=0V 0 0 0.6 V -1.3 - 1.3 uA 4 - - MΩ CTL1, CTL2, CTL3 Terminals * The voltage of this terminal should be supplied before or same time with other DC supplying terminals. (CTL1~3, VSS). - 2- NJG1707PG1 nELECTRICAL CHARACTRISTICS 2 [Tx Mode] General Conditions: Ta=25°C,VDD=3.5V,VSS=-2.5V, fin=885~940MHz Tested on PCB circuit as shown below. Insertion loss of each connectors, striplines, and capacitors are excluded. TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω) TER1, TER2: grounded by 10pF capacitor. PARAMETER SYMBOL Tx-ANT1 Insertion Loss LOSS1 Pin=30dBm - 0.50 0.65 dB Tx-EXT1 Insertion Loss LOSS2 Pin=30dBm - 0.50 0.65 dB 24 27 - dB 22 25 - dB 33 38 - dB 21 24 - dB 32 37 - dB 33 35 - dBm - -63 -60 dBc - -74 -70 dBc Tx-Rx Isolation ISL1 Tx-ANT1 Isolation ISL2 Tx-ANT2 Isolation ISL3 Tx-EXT1 Isolation ISL4 Tx-EXT2 Isolation ISL5 Input Power at 0.5dB Compression 1 P-0.5dB(1) CONDITION Pin=30dBm Tx-ANT1, Tx-EXT1 passing Pin=30dBm Tx-EXT1 passing Pin=30dBm Tx-ANT1, Tx-EXT1 passing Pin=30dBm Tx-ANT1 passing Pin=30dBm Tx-ANT1,Tx-EXT1 passing Tx-ANT1,Tx-EXT1 passing PDC Standard, ±50kHz offset Pin=30dBm Input Signal ACP=-64dBc @ 30dBm PDC Standard, ±100kHz offset Pin=30dBm Input Signal ACP=-76dBc @ 30dBm MIN TYP MAX UNITS Adjacent Channel Leakage Power 1 ACP1 Adjacent Channel Leakage Power 2 ACP2 2nd Harmonics 1 2f0(1) Pin=30dBm Input Signal 2nd Harmonics=-70dBc - -65 -63 dBc 3rd Harmonics 1 3f0(1) Pin=30dBm Input Signal 3rd Harmonics=-100dBc - -64 -62 dBc Tx-ANT1, Tx-EXT1 passing - 1.2 1.5 CTL1~3 - 120 500 VSWR 1 Switching Time 1 VSWR1 T D1 nsec -3- NJG1707PG1 nELECTRICAL CHARACTRISTICS 3 [Rx Mode] General Conditions: Ta=25°C, VDD=3.5V, VSS=0V, fin=810~885MHz Tested on PCB circuit as shown below. Insertion loss of each connectors, striplines, and capacitors are excluded. TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω) TER1, TER2: grounded by 10pF capacitor. PARAMETER SYMBOL Rx-ANT1 Insertion Loss LOSS3 Rx-ANT2 Insertion Loss MIN TYP MAX UNITS Pin=10dBm - 0.65 0.80 dB LOSS4 Pin=10dBm - 0.60 0.75 dB Rx-EXT1 Insertion Loss LOSS5 Pin=10dBm - 0.70 0.85 dB Rx-EXT2 Insertion Loss LOSS6 Pin=10dBm - 0.65 0.80 dB Rx-ANT1 Isolation ISL6 Pin=10dBm 22 26 - dB Rx-ANT2 Isolation ISL7 Pin=10dBm 24 30 - dB Rx-EXT1 Isolation ISL8 Pin=10dBm 22 26 - dB Rx-EXT2 Isolation ISL9 Pin=10dBm 22 26 - dB Input Power at 1dB Compression 1 P-1dB(1) Rx-ANT1, Rx-ANT2, Rx-EXT1, RxEXT2 passing 21 26 - dBm VSWR 2 VSWR2 RX-ANT1, RX-ANT2, RX-EXT1, RXEXT2 passing - 1.2 1.6 CTL1~3 - 120 500 Switching Time 2 T D2 CONDITION Rx-ANT2, Rx-EXT1, Rx-EXT2 passing Rx-ANT1, Rx-EXT1, Rx-EXT2 passing Rx-ANT1, Rx-ANT2, Rx-EXT2 passing Rx-ANT1, Rx-ANT2, Rx-EXT1 passing nsec nELECTRICAL CHARACTRISTICS 4 [LNA] General Conditions: Ta=25°C, VDD=3.5V, VSS=0V, fin=820MHz Tested on PCB circuit as shown below. PARAMETER MIN TYP MAX UNITS fRF 810 - 885 MHz Drain Voltage VDD3 2.5 2.7 4.5 V Current Consumption IDD3 - 2.7 3.6 mA Small Signal Gain Gain 16.0 17.5 18.5 dB Gain Flatness Gflat - 0.5 1.0 dB Noise Figure Pout at 1dB Gain Compression Point Input 3rd order Intercept Point LNAIN Port VSWR NF - 1.4 1.6 dB P-1dB(2) -3.0 +1.0 - dBm IIP3 -8.0 -4.5 - dBm VSWRi - 1.5 2.5 VSWRo - 1.5 2.5 Operation Frequency LNAOUT Port VSWR - 4- SYMBOL CONDITION No RF input fRF=810~885MHz NJG1707PG1 nTERMINAL INFORMATION PIN NO. SYMBOL 4 CTL1 5 CTL2 6 CTL3 7 VSS 9 VDD 11 EXT2 13 EXT1 15 TX 17 TER2 19 ANT1 21 RX 23 ANT2 25 TER1 26,27 GND(LNA) 28 LNAIN 30 LNAOUT 31 EXTCAP 1,2,3,8,10, 12,14,16,1 8,20,22,24, 29,32 GND DESCRIPTIONS Control signal input terminal of high impedance C-MOS logic. Logic level: High; more than +2V, Low; 0~+0.6V. Please connect to GND or VDD with 100kΩ if potential is open or uncertain. Negative supply terminal. Negative voltage of -3.5~-2.0V must be supplied on Tx mode. This terminal is isolated on Rx mode, so open or –2.5~0V condition can be used. Please connect bypass capacitor with GND to keep RF performance. Positive supply terminal. The voltage of this terminal should be supplied before or same time with other DC supplying terminals (CTL1~3, VSS). The bias voltage should be +2.7~+5.0V. Please connect bypass capacitor with GND to keep RF performance. RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. Tx power input terminal. A DC cut capacitor is required to block VDD voltage, and also an external matching circuit is required to improve VSWR(See Application circuit). A termination terminal for ANT1 in case ANT2 is in use. The influence of ANT1 against ANT2 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage. RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. Rx output terminal. A DC cut capacitor is required to block VDD voltage, and also an external matching circuit is required to improve VSWR(See Application circuit). RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. A termination terminal for ANT2 in case ANT1 is in use. The influence of ANT2 against ANT1 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage. Ground terminal of LNA. Please place ground plane close to this pin for good RF performance. LNA input terminal. An external matching circuit is required. LNA output terminal. An external matching circuit with LNA biasing element L3, L4 as in application circuit is required. Bypass capacitor terminal of LNA. Please place C9 as in application circuit close to this terminal. Ground terminal. Please connect to ground plane as close as possible for good RF performance. nTRUTH TABLE ”H”=VCTL (H), ”L”=VCTL (L), ”X”=H or L CONTROL INPUT ROUTE Tx/Rx Diversity IN/OUT CONTROL OUTPUT SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9 CTL1 CTL2 CTL3 Tx-ANT1 H X H OFF OFF OFF ON ON OFF OFF OFF Tx-EXT1 H X L OFF OFF ON OFF ON ON ON OFF OFF Rx-ANT1 L L H OFF OFF ON OFF ON OFF ON ON ON Rx-ANT2 L H H ON OFF OFF OFF OFF ON ON ON ON Rx-EXT1 L L L OFF OFF OFF Rx-EXT2 L H L OFF ON ON ON ON ON OFF ON OFF OFF OFF ON ON ON ON ON -5- NJG1707PG1 nTYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. ANT SW Loss,V.S.W.R vs. Frequency ANT SW Loss,V.S.W.R vs. Frequency (Thru:TX-ANT1,V =3.5V,V =-2.5V) DD (Thru:TX-EXT1,V =3.5V,V =-2.5V) SS DD 0 -0.5 1.6 -0.5 1.6 -1 1.4 -1 1.4 -1.5 1.2 1.2 V.S.W.R 700 900 -2 500 1 1000 600 700 900 1 1000 Frequency (MHz) ANT SW Loss,V.S.W.R vs. Frequency ANT SW Loss,V.S.W.R vs. Frequency 0 1.6 -0.5 1.4 -1 Insertion Loss (dB) Loss 1.8 V.S.W.R (Thru:RX-ANT1,VDD=3.5V,V SS=0V) -0.5 (Thru:RX-ANT2,V =3.5V,V =0V) DD 600 700 800 1.8 Loss 1.6 1.4 -1 1.2 V.S.W.R V.S.W.R -2 500 SS -1.5 1.2 -1.5 900 -2 500 1 1000 600 700 800 900 1 1000 Frequency (MHz) Frequency (MHz) ANT SW Loss,V.S.W.R vs. Frequency ANT SW Loss,V.S.W.R vs. Frequency (Thru:RX-EXT2,V =3.5V,V =0V) (Thru:RX-EXT1,V =3.5V,V =0V) SS -0.5 1.8 0 1.6 -0.5 -1 1.4 -1.5 1.2 V.S.W.R Loss Insertion Loss (dB) DD 0 Insertion Loss (dB) 800 Frequency (MHz) 0 Insertion Loss (dB) 800 DD 600 700 800 Frequency (MHz) 900 1 1000 SS 1.8 1.6 Loss -1 1.4 -1.5 -2 500 1.2 V.S.W.R V.S.W.R -2 500 V.S.W.R 600 V.S.W.R Insertion Loss (dB) Insertion Loss (dB) V.S.W.R -1.5 V.S.W.R -2 500 1.8 Loss Loss - 6- SS 1.8 600 700 800 Frequency (MHz) 900 1 1000 V.S.W.R 0 NJG1707PG1 nTYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. ANT SW Isolation vs. Frequency ANT SW Isolation vs. Frequency (Thru:TX-ANT1 , V =3.5V , V =-2.5V) DD -10 -20 (Thru:TX-EXT1 , V =3.5V , V =-2.5V) SS SS -25 TX-EXT1 Isolation TX-ANT1 Isolation -30 TX-RX Isolation -30 Isolation (dB) Isolation (dB) DD -20 -40 TX-EXT2 Isolation -50 TX-RX Isolation -35 -40 -45 TX-EXT2 Isolation -50 -60 -70 500 TX-ANT2 Isolation TX-ANT2 Isolation 600 -55 700 800 Frequency (MHz) 900 -60 500 1000 ANT SW Isolation vs. Frequency DD -25 RX-EXT2 Isolation -35 -40 500 700 800 Frequency (MHz) 900 -40 500 1000 RX-ANT1 Isolation 600 700 800 Frequency (MHz) 900 1000 (Thru:RX-EXT2 , V =3.5V , V =0V) SS DD -20 SS -25 Isolation (dB) -25 Isolation (dB) RX-EXT2 Isolation ANT SW Isolation vs. Frequency (Thru:RX-EXT1 , V =3.5V , V =0V) -20 SS RX-EXT1 Isolation ANT SW Isolation vs. Frequency DD 1000 -30 -35 RX-ANT2 Isolation 600 DD -20 RX-EXT1 Isolation -30 900 (Thru:RX-ANT2 , V =3.5V , V =0V) SS Isolation (dB) Isolation (dB) -25 700 800 Frequency (MHz) ANT SW Isolation vs. Frequency (Thru:RX-ANT1 , V =3.5V , V =0V) -20 600 RX-ANT1 Isolation -30 RX-EXT2 Isolation RX-ANT2 Isolation -35 -30 RX-ANT1 Isolation RX-ANT2 Isolation -35 RX-EXT1 Isolation -40 500 600 700 800 Frequency (MHz) 900 1000 -40 500 600 700 800 Frequency (MHz) 900 1000 -7- NJG1707PG1 nTYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. ANT-SW Pout,Loss vs. Pin I DD2 (TX-ANT1,fin=960MHz,V =3.5V,V =-2.5V) DD 40 SS ( Tx-ANT1,V =3.5V,V =-2.5V,f=960MHz) 1.2 35 1.1 30 1 25 0.9 20 0.8 15 0.7 10 0.6 5 0.5 0 0.4 vs. Input Power DD 60 SS DD2 (uA) 40 30 I Insertion Loss (dB) Output Power (dBm) 50 20 10 0 5 10 15 20 25 30 Input Power (dBm) 35 0 0 40 5 10 15 20 25 Input Power (dBm) I vs. Input Power ANT-SW Pout,Loss vs. Pin DD1 (RX-ANT1,fin=885MHz,V =3.5V,V =0V) DD SS 6 30 1.6 5 25 1.4 20 1.2 15 1 10 0.8 5 0.6 0 0.4 40 DD SS DD1 (uA) 4 3 I Insertion Loss (dB) Output Power (dBm) 35 ( Rx-ANT1,V =3.5V,V =0V,f=885MHz) 1.8 35 30 2 1 0 5 10 15 20 25 Input Power (dBm) 30 0 0 10 15 20 25 Input Power (dBm) 30 35 3rd Harmonics vs. Frequency 2nd Harmonics vs. Frequency (Tx-ANT1,Pin=30dBm,V =-2.5V) (Tx-ANT1,Pin=30dBm,V =-2.5V) SS -60 5 35 SS -60 VDD=3.5V 3rd Harmonics (dBc) 2nd Harmonics (dBc) VDD=2.9V -65 -70 -65 -70 VDD=3.5V VDD=2.9V -75 880 900 920 940 Frequency (MHz) - 8- 960 980 -75 880 900 920 940 Frequency (MHz) 960 980 NJG1707PG1 nTYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. Loss vs. Temperature Loss vs. Temperature (Rx-ANT1,f=885MHz,Pin=10dBm,V =0V) (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) SS 1.0 SS 1.0 VDD=3.5V VDD=3.5V VDD=2.9V 0.8 VDD=2.9V Insertion Loss(dB) Insertion Loss(dB) 0.8 0.6 0.4 0.6 0.4 0.2 0.2 0.0 -50 0 50 o Ambient Temperature( C) 0.0 -50 100 Rx Isolation vs. Temperature EXT1 Isolation vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) SS SS 30 VDD=3.5V VDD=3.5V 28 VDD=2.9V Isolation(dB) Isolation(dB) 100 (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) 32 30 0 50 o Ambient Temperature( C) 28 26 24 VDD=2.9V 26 24 22 22 -50 0 50 o Ambient Temperature( C) P -0.5dB 20 -50 100 I vs. Temperature SS vs. Temperature DD2 DD 20 ss VDD=3.5V VDD=3.5V 38 100 ( Tx-ANT1,fin=960MHz,Pin=30dBm,V =3.5V,V =-2.5V ) (Tx-ANT1,f=960MHz,V =-2.5V) 40 0 50 o Ambient Temperature( C) VDD=2.9V VDD=2.9V P DD2 (uA) 36 10 I -0.5dB (dBm) 15 34 5 32 30 -50 0 50 o Ambient Temperature( C) 100 0 -50 0 50 100 o Ambient Temperature( C) -9- NJG1707PG1 nTYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit. ACP(100kHz) vs. Temperature ACP(50kHz) vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) SS -55 VDD=3.5V VDD=3.5V VDD=2.9V VDD=2.9V -60 -65 -70 -50 0 50 -70 -75 -80 -50 100 o Ambient Temperature ( C) 2nd Harmonics vs. Temperature 0 50o Ambient Temperature ( C) 100 3rd Harmonics vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) -60 SS -65 ACP offset:100kHz (dBc) ACP offset:50kHz (dBc) (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) SS SS -60 VDD=3.5V 3rd Harmonics (dBc) 2nd Harmonics (dBc) VDD=2.9V -65 -70 -65 -70 VDD=3.5V VDD=2.9V -75 -50 - 10- 0 50 o Ambient Temperature ( C) 100 -75 -50 0 50 o Ambient Temperature ( C) 100 NJG1707PG1 nTYPICAL CHARACTERISTICS (LNA) Measured on the PCB evaluation circuit. LNA NF,Gain vs. Frequency (V =2.7V,I DD3 19 LNA Gain,NF vs. V =2.7mA) DD3 18 2 19 1.8 18 1.6 17 DD3 (f=820MHz) 2 Gain 1.8 1.6 NF 16 1.4 NF 1.2 15 14 750 800 850 900 Frequency (MHz) LNA I DD3 1 950 ,P-1dB vs. V (V 6 3.5 0 DD3 3 -2 2.5 -4 4 V DD3 4.5 5 (V) DD3 =2.7mA,f=820+820.1MHz) -10 -20 IM3 -30 -40 -50 -60 -70 -40 5 -35 -30 (V) LNA IIP3,OIP3 vs. V -25 -20 -15 Input Power (dBm) -10 -5 0 ANT SW - LNA OUT Isolation vs. Frequency DD3 ( RX and LNAin :50ohm terminated,V =3.5V , V =0V) (f=820+820.1MHz,Pin=-30dBm) 4 18 2 4.5 Pout -6 3.5 4 0 Output Power,IM3 (dBm) 2 =2.7V,I DD3 10 P-1dB Output Power (dBm) (mA) 4 I DD3 4 I 3.5 LNA Pout,IM3 vs. Pin DD3 P-1dB 3 3 DD3 4.5 2 2.5 1 14 2.5 V (f=820MHz) 5 1.2 15 SS RX-ANT2 Thru 16 OIP3 DD -30 -40 RX-EXT1 Thru IIP3 -2 12 -4 10 -6 8 -8 6 Isolation (dB) 14 OIP3 (dBm) IIP3 (dBm) 0 -50 RX-ANT1 Thru -60 -70 RX-EXT2 Thru -80 -10 2.5 4 3 3.5 4 V DD3 (V) 4.5 5 100 200 300 400 500 600 700 Frequency (MHz) 800 900 1000 - 11 - NF (dB) 1.4 16 Gain (dB) 17 NF(dB) Gain (dB) GAIN NJG1707PG1 nTYPICAL CHARACTERISTICS (LNA) Measured on the PCB evaluation circuit. VDD3=2.7V - 12- NJG1707PG1 nTYPICAL CHARACTERISTICS (LNA) Measured on the PCB evaluation circuit. LNA Gain,I DD3 (V vs. Temperature 19 LNA NF vs. Temperature =2.7V,f=820MHz) DD3 (V DD3 2 4.5 =2.7V,f=820MHz) 1.8 18 4 16 3 NF (dB) (mA) 3.5 DD3 17 I Gain (dB) 1.6 1.4 1.2 1 15 -50 0 0.8 -50 2.5 100 50 0 50 o Ambient Temperature ( C) o Ambient Temperature ( C) LNA IIP3,OIP3 vs. Temperature LNA P-1dB vs. Temperature (V 5 100 (V =2.7V,f=820MHz) DD3 2 DD3 =2.7V,f=820.0+820.1MHz,Pin=-30dBm) 16 1 15 0 14 -1 13 -2 12 -3 11 -4 10 -5 9 2 1 0 -50 -6 0 50 o Ambient Temperature ( C) 100 -50 0 50 o Ambient Temperature ( C) 8 100 - 13 - OIP3(dBm) 3 IIP3(dBm) P-1dB(dBm) 4 NJG1707PG1 nTYPICAL CHARACTERISTICS (LNA) LNA Scattering Parameter Table Freq. (GHz) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 S11 mag. ang. (unit) (deg.) 1.000 -2.22 0.987 -5.10 0.985 -7.12 0.987 -10.49 0.967 -12.19 0.967 -15.33 0.943 -17.89 0.928 -20.65 0.911 -23.45 0.894 -26.19 0.882 -28.43 0.867 -30.91 0.861 -33.29 0.853 -35.74 0.848 -37.65 0.843 -39.63 0.834 -41.23 0.832 -42.72 0.823 -43.91 0.816 -44.93 S21 mag. ang. (unit) (deg.) 2.147 176.00 2.087 168.16 2.053 161.77 2.079 154.25 2.020 147.74 1.998 141.28 1.947 134.57 1.899 128.63 1.845 122.18 1.795 116.45 1.723 111.16 1.675 105.79 1.613 100.76 1.556 95.80 1.498 90.90 1.442 86.45 1.384 82.25 1.344 78.49 1.288 74.67 1.253 71.30 VDD3=2.7V, IDD3=3mA, Zo=50Ω - 14- S12 mag. ang. (unit) (deg.) 0.009 48.67 0.008 38.98 0.005 68.44 0.010 61.48 0.008 58.51 0.007 57.29 0.010 62.79 0.010 57.35 0.013 61.22 0.013 64.15 0.013 68.15 0.014 66.63 0.014 69.43 0.015 65.80 0.015 69.41 0.017 75.17 0.018 76.93 0.018 80.33 0.021 84.19 0.022 82.05 S22 mag. ang. (unit) (deg.) 0.949 -1.04 0.940 -3.71 0.954 -4.61 0.940 -7.50 0.939 -8.86 0.931 -11.32 0.921 -13.70 0.918 -15.28 0.924 -18.33 0.914 -20.15 0.923 -22.40 0.910 -24.64 0.927 -26.98 0.916 -28.74 0.921 -30.73 0.915 -32.14 0.913 -33.86 0.913 -35.13 0.908 -36.37 0.912 -37.14 NJG1707PG1 nRECOMMENDED CIRCUIT (Tx-ANT1 PASSING) PRECAUTIONS Please connect resistors R1~R3 between VCTL1~VCTL3 terminals (Pin#4, 5, 6) and GND or VDD only when CTL1~CTL3 voltage is required to clip to H or L level. - 15 - NJG1707PG1 nRECOMMENDED PCB DESIGN Board total loss (Capacitors, Connectors, and PCB) Frequency Pass route 800MHz band (dB) (MHz) TX-ANT1 0.30 960 TX-EXT1 0.26 RX-ANT1 0.28 RX-ANT2 0.29 885 RX-EXT1 0.32 RX-EXT2 0.37 PARTS LIST PARTS ID VALUE COMMENT R1-R3 100Ω 1005 Size C1~3, C9 1000pF MURATA(GRM36) C4, C5, C7, C8 22pF MURATA(GRM36) C10, C12 10pF MURATA(GRM36) C11 16pF MURATA(GRM36) C13 4pF MURATA(GRM36) L1 27nH TAIYO-YUDEN(HK1608) L2 33nH TAIYO-YUDEN(HK1005) L3 27nH TAIYO-YUDEN(HK1005) L4 12nH TAIYO-YUDEN(HK1005) L5 15nH TAIYO-YUDEN(HK1005) L6 22nH TAIYO-YUDEN(HK1005) PRECAUTIONS [1] The bypass capacitors should be connected to the VDD, VSS terminals as close as possible respectively. [2] For good RF performance, the ground terminals should be directly connected to the ground patterns and through-holes as close as possible by using relativity wide pattern. - 16- NJG1707PG1 nPACKAGE OUTLINE (FFP32-G1) 1pin INDEX 0.35 2pin INDEX 0.254±0.1 3.5±0.1 0.30 0.17 0.10 0.30 0.85±0.15 0.5 0.5 0.20 0.365 0.27 UNITS PCB OVER COAT LEAD SURFACE WEIGHT Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. • Do NOT eat or put into mouth. • Do NOT dispose in fire or break up this product. • Do NOT chemically make gas or powder with this product. • To waste this product, please obey the relating law of your country. : mm : Ceramic : Epoxy resin : Au : 30mg [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle - 17 -