NLAS6234 Audio DPDT Switch with Noise Suppression Description The NLAS6234 is a DPDT switch featuring Popless noise suppression circuitry designed to prevent pass through of undesirable transient signals known as pops. Intended for audio systems within portable applications, it provides protection against audible pops that are generated when switching between two different audio sources, such as an amplifier and a CODEC. The NLAS6234 incorporates two double throw switches controlled by a single select line which allows the system controller to simultaneously switch between two sets of signal lines. The Popless noise suppression circuitry controls the ON and OFF times that define the time interval when switching between the normally open (NO) and normally closed (NC) terminals. This allows any pops to be dissipated within the system before the switch settles into a closed position. The NLAS6234 operates off of a single supply voltage, VCC, and is available in an ultra-thin UQFN10 package. http://onsemi.com MARKING DIAGRAM 1 UQFN10 MU SUFFIX CASE 488AT AR MG G AR = Specific Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location) Features •Popless Noise Suppression Circuitry •OVT up to +4.5 V on Control Pin •RON < 0.5 Across BCC Range, Typical •THD < 0.02 %, Typical •Off Isolation = -70 dB, Typical •Crosstalk Attenuation < -70 dB, Typical •Ultra Small, Thin Package: 1.4 mm x 1.8 mm UQFN10 •This is a Pb-Free Device ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. Typical Applications •Cell Phones, PDAs, MP3 and Other Portable Media Players © Semiconductor Components Industries, LLC, 2007 October, 2007 - Rev. 1 1 Publication Order Number: NLAS6234/D NLAS6234 VCC 1 NO1 2 NO2 COM2 TEST 10 9 8 Timing/ Noise Reduction Control 3 4 5 COM1 S NC1 7 NC2 6 GND Figure 1. Pin Connections and Logic Diagram (Top View) NOTE: Pin 8 is for ATE use only, not intended for end customer use. TRUTH TABLE PIN ASSIGNMENT PIN FUNCTION S NC1, NC2 NO1, NO2 VCC Supply Voltage 0 ON OFF GND Ground 1 OFF ON S Control Input Select Line TEST ATE Test Pin NC1, NO1, NC2, NO2 Independent Channels COM1, COM2 Common Channels MAXIMUM RATINGS Symbol Pins VCC VCC VIS NOx, NCx, COMx VIN S IIS_CON NOx, NCx, COMx IIS_PK NOx, NCx, COMx Rating Value Unit -0.5 to +5.5 V Analog Signal Voltage -0.5 to VCC + 0.5 V Control Input Voltage -0.5 to +5.5 V Analog Signal Continuous Current-Closed Switch $300 mA Analog Signal Continuous Current 10% Duty Cycle $500 mA Positive DC Supply Voltage IIN S Control Input Current $20 mA Ts Ts Storage Temperature -65 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol Pins VCC VCC VIS NOx, NCx, COMx VIN S Parameter Min Max Unit 2.7 4.5 V Analog Signal Voltage GND VCC V Control Input Voltage (OVT Protection) GND 4.5 V TA Operating Temperature Range -40 +85 °C tr, tf Input Rise or Fall Time, S 0 10 ns/V Positive DC Supply Voltage VCC = 3.0 V to 3.6 V http://onsemi.com 2 NLAS6234 DC ELECTRICAL CHARACTERISTICS CONTROL INPUT (Typical: T = 25°C, VCC = 3.3 V) -40°C to +85°C Parameter Test Conditions VCC (V) Min Typ Max Unit Symbol Pins VIH S Minimum High-Level Input Voltage, Select Input 2.7 4.2 1.4 2.0 - - V VIL S Maximum Low-Level Input Voltage, Select Input 2.7 4.2 - - 0.7 0.8 V IIN S Control Input Leakage Current 2.7-4.5 - ±100 ±1000 nA VIS = GND SUPPLY CURRENT AND LEAKAGE (Typical: T = 25°C, VCC = 3.3 V, VIN = VCC or GND) -40°C to +85°C Test Conditions VCC (V) Min Typ Max Unit ICC VCC Quiescent Supply Current VIS = VCC or GND; ID = 0 A 2.7 - 4.5 - <100 1000 nA INC(OFF), INO(OFF) NCx, NOx OFF State Leakage Current VCOM = 4.5 V VNO, VNC = 1.0 V 2.7 - 4.5 - ±10 ±1000 nA Power OFF Leakage Current VIS = GND 0 - ±10 ±1000 nA Symbol Pins IOFF Parameter ON RESISTANCE (Typical: T = 25°C, VCC = 3.3 V) -40°C to +85°C Symbol Pins Parameter Test Conditions VCC (V) Min Typ Max Unit On-Resistance VIN = VIL or VIN = VIH VIS = 0 to VCC; IIS = 100 mA 2.7 4.2 - 0.40 0.35 0.60 0.55 RFLAT On-Resistance Flatness VIS = 0 to VCC; IIS = 100 mA 2.7 4.2 - 0.14 0.15 0.19 0.20 RON On-Resistance Match Between Channels VIS = 0 to VCC; IIS = 100 mA 2.7 4.2 - 0.15 0.15 0.20 0.20 RON http://onsemi.com 3 NLAS6234 AC ELECTRICAL CHARACTERISTICS TIMING/FREQUENCY (Typical: T = 25°C, VCC = 3.3 V, RL = 50 , CL = 35 pF, f = 1 MHz) -405C to +855C Min Typ Max Symbol Pins Parameter tON - Turn-ON Time (Figures 2, 3, 12) 2.7-4.5 11 ns tOFF - Turn-OFF Time (Figures 2, 3, 13) 2.7-4.5 9.0 ns tBBM - Minimum Break Before Make Time (Figure 14) VIS = 3.0, typ @ VCC = 3.6 V 3.4-4.2 60 ms BW - -3dB Bandwidth VIS = 0 dB 2.7-4.5 36 MHz Test Conditions VCC (V) Unit ISOLATION (Typical: T = 25°C, VCC = 3.3 V, RL = 50 , CL = 5 pF) -405C to +855C Min Typ Max Symbol Pins OIRR NOx OFF-Isolation VIS = 1.0 VRMS, f = 100 kHz 2.7-4.5 -70 dB XTALK COM 1 to COM 2 Crosstalk VIS = 1.0 VRMS, f = 100 kHz 2.7-4.5 -98 dB THD - Total Harmonic Distortion RL = 600 , VCOMn = 2.0 Vp-p 3.0 0.02 % Parameter Test Conditions VCC (V) Unit CAPACITANCE (Typical: T = 25°C, VCC = 3.3 V, RL = 50 , CL = 5 pF, f = 1 MHz) -405C to +855C Symbol Pins CIN S Parameter Test Conditions Select Input Capacitance VCC (V) 0 Min Typ Max Unit 2.5 pF COFF NOx OFF-Capacitance VIS = 3.3 V, S = 0 V 2.7-4.5 72 pF CON COMx to NCx ON-Capacitance S=0V 2.7-4.5 113 pF http://onsemi.com 4 NLAS6234 VCC Input DUT VOUT 0.1 F 50 Open 50% 0V Output VCC 50% VOH 90% 35 pF 90% Output VOL Input tON tOFF Figure 2. tON / tOFF, Vis = VCC VCC VCC Input DUT 50 Output 50% VOUT Open 50% 0V VOH 35 pF Output 10% 10% VOL Input tOFF tON Figure 3. tON / tOFF, Vis = GND 50 DUT Reference Input Transmitted Output 50 Generator 50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. ǒVVOUT Ǔ for VINat100kHz IN VISO + OffChannelIsolation + 20Log ǒVVOUT Ǔ for VIN at 100 kHz to 50 MHz IN VONL + OnChannelLoss + 20Log Bandwidth (BW) = the frequency 3 dB below VONL VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 Figure 4. Off-Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL http://onsemi.com 5 NLAS6234 0 0 -10 -0.5 MAGNITUDE (dB) MAGNITUDE (dB) -20 -30 -40 -50 -60 -70 -1 -1.5 -2 -2.5 -3 -80 -3.5 -90 -100 -4 0.01 0.1 1 10 FREQUENCY (MHz) 0.01 100 0.1 1 10 FREQUENCY (MHz) 100 Figure 6. Bandwidth vs. Frequency @ VCC = 3 V Figure 5. Crosstalk vs. Frequency @ 255C 0.04 0.6 0.035 0.4 0.025 85°C RON () THD (%) 0.03 0.02 0.015 25°C -40°C 0.2 0.01 0.005 0 0.01 0 0.1 1 10 100 0 0.5 1.0 FREQUENCY (kHz) 1.5 2.0 2.5 3.0 VIN (V) Figure 7. Total Harmonic Distortion @ VCC = 3.0 V Figure 8. On-Resistance vs. Input Voltage @ VCC = 3.0 V 0.6 0.45 0.40 0.35 RON () RON () 0.4 85°C 25°C 0.30 3.0 V 0.25 0.2 -40°C 0.20 0 4.3 V 0.15 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 VIN (V) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VIN (V) Figure 9. On-Resistance vs. Input Voltage @ VCC = 4.3 V Figure 10. On-Resistance vs. Input Voltage @ 255C http://onsemi.com 6 NLAS6234 250 E-9 12 85°C 200 E-9 11 TON (ns) ICC (A) 150 E-9 100 E-9 85°C 50 E-9 25°C 10 -40°C 25°C 9 0 E+0 -40°C -50 E-9 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 8 1.65 1.92 2.19 2.46 2.73 3.0 3.27 3.54 3.81 4.08 4.35 4.5 VIN (V) VCC (V) Figure 11. ICC vs VCC Figure 12. tON vs VCC 12 11 TOFF (ns) 0 10 85°C 9 25°C -40°C 8 1.65 1.92 2.19 2.46 2.73 3.0 3.27 3.54 3.81 4.08 4.35 VCC (V) Figure 13. tOFF vs VCC http://onsemi.com 7 NLAS6234 Popless Implementation on the NLAS6234 where a switch is used to alternate between two different audio sources. When the signal from the common pin is removed from one terminal, the switch waits an extended amount of time before connecting to the opposite terminal. The time interval for tBBM is a function of the supply voltage of the switch, VCC. Figure 14 shows the relationship of tBBM for each VCC value within the recommended operating voltage range. Audio sources such as amplifiers or CODECs can generate undesirable, transient voltage spikes when powering up and down. Those voltage spikes can be translated into current surges and ultimately lead to audible pop noises in the speaker if not diverted or suppressed. The NLAS6234 includes popless noise suppression circuitry designed to prevent such undesirable pops from propagating through to the speaker. This feature is realized through a deliberate increase in the Break-Before-Make time, tBBM, and is useful in applications 120 TBBM (ms) 100 80 60 40 20 0 3.0 3.2 3.4 3.6 3.8 4.0 4.2 VCC (V) Figure 14. NLAS6234 TBBM vs. VCC DEVICE ORDERING INFORMATION Device NLAS6234MUTBG Package Shipping† UQFN10 (Pb-Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 8 NLAS6234 PACKAGE DIMENSIONS UQFN10, 1.4x1.8, 0.4P CASE 488AT-01 ISSUE A EDGE OF PACKAGE D ÉÉ ÉÉ PIN 1 REFERENCE 2X 2X L1 E DETAIL A Bottom View (Optional) 0.10 C 0.10 C B TOP VIEW A1 0.05 C A1 C SIDE VIEW 3 9X EXPOSED Cu A 0.05 C 10X 5 SEATING PLANE ÉÉÉ ÉÉÉ ÉÉÉ DIM A A1 A3 b D E e L L1 L3 MOLD CMPD A3 DETAIL B Side View (Optional) 1.700 0.0669 0.663 0.0261 6 e 1 0.200 0.0079 10 X L3 b MILLIMETERS MIN MAX 0.45 0.60 0.00 0.05 0.127 REF 0.15 0.25 1.40 BSC 1.80 BSC 0.40 BSC 0.30 0.50 0.00 0.15 0.40 0.60 MOUNTING FOOTPRINT e/2 L 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A 1 0.10 C A B 0.05 C 9X 0.563 0.0221 2.100 0.0827 NOTE 3 BOTTOM VIEW 0.400 0.0157 PITCH 10 X 0.225 0.0089 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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