NX3V1T384 Low-ohmic single-pole single-throw analog switch Rev. 3 — 4 November 2011 Product data sheet 1. General description The NX3V1T384 is a low-ohmic single-pole single-throw analog switch. It has two input/output terminals (Y and Z) and an active LOW enable input pin (E). When E is HIGH, the analog switch is turned off. Schmitt trigger action at the enable input (E) makes the circuit tolerant to slower input rise and fall times. A low input voltage threshold allows pin E to be driven by lower level logic signals without a significant increase in supply current ICC. This makes it possible for the NX3V1T384 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need for logic level translation. The NX3V1T384 allows signals with amplitude up to VCC to be transmitted from Y to Z or from Z to Y. Its ultra-low ON resistance (0.3 ) and flatness (0.1 ) ensures minimal attenuation and distortion of transmitted signals. 2. Features and benefits Wide supply voltage range from 1.4 V to 4.3 V Very low ON resistance (peak): 0.8 (typical) at VCC = 1.4 V 0.5 (typical) at VCC = 1.65 V 0.3 (typical) at VCC = 2.3 V 0.25 (typical) at VCC = 2.7 V 0.25 (typical) at VCC = 4.3 V High noise immunity ESD protection: HBM JESD22-A114F Class 3A exceeds 7500 V MM JESD22-A115-A exceeds 200 V CDM AEC-Q100-011 revision B exceeds 1000 V IEC61000-4-2 contact discharge exceeds 6000 V for switch ports CMOS low-power consumption Latch-up performance exceeds 100 mA per JESD 78B Class II Level A Enable input accepts voltages above supply voltage 1.8 V control logic at VCC = 3.6 V Very low supply current, even when input is below VCC High current handling capability (500 mA continuous current under 3.3 V supply) Specified from 40 C to +85 C and from 40 C to +125 C NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 3. Applications Cell phone PDA Portable media player 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version NX3V1T384GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 NX3V1T384GM 40 C to +125 C XSON6 SOT886 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm 5. Marking Table 2. Marking codes[1] Type number Marking code NX3V1T384GW e3 NX3V1T384GM e3 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram Y E Z Y E 001aag476 Fig 1. Logic symbol NX3V1T384 Product data sheet Z 001aai598 Fig 2. Logic diagram All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 2 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 7. Pinning information 7.1 Pinning NX3V1T384 NX3V1T384 Y 1 Z 2 GND 3 5 4 Y 1 6 VCC Z 2 5 n.c. GND 3 4 E VCC E 001aaj987 Transparent top view 001aaj986 Fig 3. Pin configuration SOT353-1 (TSSOP5) Fig 4. Pin configuration SOT886 (XSON6) 7.2 Pin description Table 3. Pin description Symbol Pin Description SOT353-1 SOT886 Y 1 1 independent input or output Z 2 2 independent output or input GND 3 3 ground (0 V) E 4 4 enable input (active LOW) n.c. - 5 not connected VCC 5 6 supply voltage 8. Functional description Table 4. Function table[1] Input E Switch L ON-state H OFF-state [1] H = HIGH voltage level; L = LOW voltage level. NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 3 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions enable input E Min Max Unit 0.5 +4.6 V [1] 0.5 +4.6 V [2] 0.5 VCC + 0.5 V VI input voltage VSW switch voltage IIK input clamping current VI < 0.5 V 50 - mA ISK switch clamping current VI < 0.5 V or VI > VCC + 0.5 V - 50 mA ISW switch current VSW > 0.5 V or VSW < VCC + 0.5 V; source or sink current - 500 mA VSW > 0.5 V or VSW < VCC + 0.5 V; pulsed at 1 ms duration, < 10 % duty cycle; peak current - 750 mA 65 +150 C - 250 mW storage temperature Tstg total power dissipation Ptot Tamb = 40 C to +125 C [3] [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V. [3] For TSSOP5 package: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 package: above 118 C the value of Ptot derates linearly with 7.8 mW/K. 10. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VSW Conditions enable input E switch voltage Tamb ambient temperature t/V input transition rise and fall rate VCC = 1.4 V to 4.3 V Min Max Unit 1.4 4.3 V 0 4.3 V [1] 0 VCC V 40 +125 C [2] - 200 ns/V [1] To avoid sinking GND current from of terminal Z when switch current flows in terminal Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Y. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 4 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter VIH VIL HIGH-level input voltage LOW-level input voltage Tamb = 25 C Conditions Typ Max Min VCC = 1.4 V to 1.6 V 0.9 - - 0.9 - - V VCC = 1.65 V to 1.95 V 0.9 - - 0.9 - - V VCC = 2.3 V to 2.7 V 1.1 - - 1.1 - - V VCC = 2.7 V to 3.6 V 1.3 - - 1.3 - - V VCC = 3.6 V to 4.3 V 1.4 - - 1.4 - - V VCC = 1.4 V to 1.6 V - - 0.3 - 0.3 0.3 V VCC = 1.65 V to 1.95 V - - 0.4 - 0.4 0.3 V VCC = 2.3 V to 2.7 V - - 0.4 - 0.4 0.4 V - - 0.5 - 0.5 0.5 V VCC = 3.6 V to 4.3 V - - 0.6 - 0.6 0.6 V - - - - 0.5 1 A VCC = 1.4 V to 3.6 V - - 5 - 50 500 nA VCC = 3.6 V to 4.3 V - - 10 - 50 500 nA VCC = 1.4 V to 3.6 V - - 5 - 50 500 nA VCC = 3.6 V to 4.3 V - - 10 - 50 500 nA VCC = 3.6 V - - 100 - 690 6000 nA VCC = 4.3 V - - 150 - 800 7000 nA additional VSW = GND or VCC supply current VI = 2.6 V; VCC = 4.3 V - 2.0 4.0 - 7 7 A VI = 2.6 V; VCC = 3.6 V - 0.35 0.7 - 1 1 A VI = 1.8 V; VCC = 4.3 V - 7.0 10.0 - 15 15 A VI = 1.8 V; VCC = 3.6 V - 2.5 4.0 - 5 5 A VI = 1.8 V; VCC = 2.5 V - 50 200 - 300 500 nA enable input E; VI = GND to 4.3 V; VCC = 1.4 V to 4.3 V IS(OFF) OFF-state leakage current Y port; see Figure 5 ON-state leakage current Z port; see Figure 6 ICC Max Max (85 C) (125 C) VCC = 2.7 V to 3.6 V input leakage current ICC Unit Min II IS(ON) Tamb = 40 C to +125 C supply current VI = VCC or GND; VSW = GND or VCC CI input capacitance - 1.0 - - - - pF CS(OFF) OFF-state capacitance - 70 - - - - pF CS(ON) ON-state capacitance - 205 - - - - pF NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 5 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 11.1 Test circuits VCC VCC E VIH Z VI E VIL Y IS IS GND Z GND VI VO Y 001aag479 VO 001aag480 VI = 0.3 V or VCC 0.3 V; VO = VCC 0.3 V or 0.3 V. VI = 0.3 V or VCC 0.3 V; VO = open circuit. Fig 5. Test circuit for measuring OFF-state leakage current Fig 6. Test circuit for measuring ON-state leakage current 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 14. Symbol RON(peak) Parameter Tamb = 40 C to +85 C Conditions Unit Min Max Min Max - 0.8 1.9 - 2.1 ON resistance VI = GND to VCC; (peak) ISW = 100 mA; see Figure 7 VCC = 1.4 V VCC = 1.65 V - 0.5 0.8 - 0.9 VCC = 2.3 V - 0.3 0.5 - 0.6 VCC = 2.7 V - 0.25 0.45 - 0.5 - 0.25 0.45 - 0.5 VCC = 1.4 V - 0.5 1.7 - 1.8 VCC = 1.65 V - 0.25 0.6 - 0.7 VCC = 2.3 V - 0.1 0.2 - 0.2 VCC = 2.7 V - 0.1 0.2 - 0.2 VCC = 4.3 V - 0.1 0.25 - 0.25 VCC = 4.3 V RON(flat) Tamb = 40 C to +125 C Typ[1] ON resistance VI = GND to VCC; (flatness) ISW = 100 mA [2] [1] Typical values are measured at Tamb = 25 C. [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 6 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 11.3 ON resistance test circuit and graphs 001aag564 1.6 RON (Ω) 1.2 VSW (1) V 0.8 VCC (2) (3) E VIL (4) 0.4 Z Vl (5) (6) Y GND ISW 0 0 1 2 RON = VSW / ISW. 3 4 5 VI (V) 001aai599 (1) VCC = 1.5 V. (2) VCC = 1.8 V. (3) VCC = 2.5 V. (4) VCC = 2.7 V. (5) VCC = 3.3 V. (6) VCC = 4.3 V. Measured at Tamb = 25 C. Fig 7. Test circuit for measuring ON resistance NX3V1T384 Product data sheet Fig 8. Typical ON resistance as a function of input voltage All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 7 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 001aah805 0.8 RON (Ω) 001aah801 0.6 RON (Ω) 0.6 0.4 (1) 0.4 (2) (1) (3) (2) 0.2 (3) 0.2 (4) (4) 0 0 0 1 2 3 0 1 2 (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 9. ON resistance as a function of input voltage; VCC = 1.5 V 001aah802 0.6 3 VI (V) VI (V) RON (Ω) Fig 10. ON resistance as a function of input voltage; VCC = 1.8 V 001aah803 0.6 RON (Ω) 0.4 0.4 (1) (1) (2) (2) (3) 0.2 (3) 0.2 (4) 0 (4) 0 0 1 2 3 0 VI (V) (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 11. ON resistance as a function of input voltage; VCC = 2.5 V Product data sheet 2 3 VI (V) (1) Tamb = 125 C. NX3V1T384 1 Fig 12. ON resistance as a function of input voltage; VCC = 2.7 V All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 8 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 001aah804 0.6 001aaj895 0.6 RON (Ω) RON (Ω) 0.4 0.4 (1) (2) (3) (4) (1) (2) (3) 0.2 0.2 (4) 0 0 0 1 2 3 4 0 1 2 3 4 VI (V) 5 VI (V) (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 13. ON resistance as a function of input voltage; VCC = 3.3 V Fig 14. ON resistance as a function of input voltage; VCC = 4.3 V 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 16. Symbol Parameter enable time ten Tamb = 25 C Conditions disable time [1] Unit Min Max Min Max (85 C) Max (125 C) - 50 90 - 120 120 ns E to Z or Y; see Figure 15 VCC = 1.4 V to 1.6 V tdis Tamb = 40 C to +125 C Typ[1] VCC = 1.65 V to 1.95 V - 36 70 - 80 90 ns VCC = 2.3 V to 2.7 V - 24 45 - 50 55 ns VCC = 2.7 V to 3.6 V - 22 40 - 45 50 ns VCC = 3.6 V to 4.3 V - 22 40 - 45 50 ns VCC = 1.4 V to 1.6 V - 30 45 - 50 60 ns VCC = 1.65 V to 1.95 V - 20 30 - 35 40 ns VCC = 2.3 V to 2.7 V - 15 20 - 22 25 ns VCC = 2.7 V to 3.6 V - 11 15 - 18 22 ns VCC = 3.6 V to 4.3 V - 11 15 - 18 22 ns E to Z or Y; see Figure 15 Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V and 3.3 V respectively. NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 9 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 12.1 Waveform and test circuits VI VM E input VM GND ten tdis VOH Y or Z output LOW to OFF OFF to LOW VX VX GND switch disabled switch enabled switch disabled 001aai600 Measurement points are given in Table 10. Logic level: VOH is the typical output voltage that occurs with the output load. Fig 15. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VX 1.4 V to 4.3 V 0.5VCC 0.9VOH VCC E Y/Z G V I V VO RL Z/Y VEXT = 1.5 V CL 001aai601 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 16. Load circuit for switching times Table 11. Test data Supply voltage Input VCC VI tr, tf CL RL 1.4 V to 4.3 V VCC 2.5 ns 35 pF 50 NX3V1T384 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 10 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf 2.5 ns. Tamb = 25 C Symbol Parameter Conditions THD fi = 20 Hz to 20 kHz; RL = 32 ; see Figure 17 total harmonic distortion Min Typ Max VCC = 1.4 V; VI = 1 V (p-p) - 0.05 - % VCC = 1.65 V; VI = 1.2 V (p-p) - 0.03 - % [1] VCC = 2.3 V; VI = 1.5 V (p-p) - 0.01 - % VCC = 2.7 V; VI = 2 V (p-p) - 0.01 - % - 0.01 - % - 25 - MHz - 90 - dB VCC = 1.4 V to 3.6 V - 0.3 - V VCC = 3.6 V to 4.3 V - 0.5 - V VCC = 1.5 V - 6.5 - pC VCC = 1.8 V - 6.5 - pC VCC = 2.5 V - 6.5 - pC VCC = 3.3 V - 6.5 - pC VCC = 4.3 V - 12 - pC VCC = 4.3 V; VI = 2 V (p-p) f(3dB) 3 dB frequency response RL = 50 ; see Figure 18 iso isolation (OFF-state) fi = 100 kHz; RL = 50 ; see Figure 19 [1] VCC = 1.4 V to 4.3 V [1] VCC = 1.4 V to 4.3 V crosstalk voltage Vct charge injection Qinj [1] Unit between digital inputs and switch; fi = 1 MHz; CL = 50 pF; RL = 50 ; see Figure 20 fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V; Rgen = 0 ; see Figure 21 fi is biased at 0.5VCC. 12.3 Test circuits VCC 0.5VCC E VIL RL Y/Z Z/Y fi D 001aai602 Fig 17. Test circuit for measuring total harmonic distortion NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 11 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch VCC 0.5VCC E VIL RL Y/Z Z/Y fi dB 001aai603 Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB. Fig 18. Test circuit for measuring the frequency response when channel is in ON-state VCC 0.5VCC RL 0.5VCC E VIH RL Y/Z Z/Y fi dB 001aai604 Adjust fi voltage to obtain 0 dBm level at input. Fig 19. Test circuit for measuring isolation (OFF-state) VCC E Y/Z G VI Z/Y RL RL 0.5VCC 0.5VCC CL V VO 001aai605 a. Test circuit logic input (E) off on VO off Vct 001aai606 b. Input and output pulse definitions Fig 20. Test circuit for measuring crosstalk voltage between digital inputs and switch NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 12 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch VCC E Y/Z G VI V RL VO Z/Y Rgen Vgen CL GND 001aai607 a. Test circuit logic input (E) off on off VO VO 001aai608 b. Input and output pulse definitions Definition: Qinj = VO CL. VO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 21. Test circuit for measuring charge injection NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 13 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 22. Package outline SOT353-1 (TSSOP5) NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 14 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× (2) L L1 e 6 5 4 e1 e1 6× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 1.5 1.4 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 MO-252 Fig 23. Package outline SOT886 (XSON6) NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 15 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 14. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged-Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model PDA Personal Digital Assistant 15. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes NX3V1T384 v.3 20111104 Product data sheet - NX3V1T384 v.2 Modifications: • Legal pages updated. NX3V1T384 v.2 20101221 Product data sheet - NX3V1T384 v.1 NX3V1T384 v.1 20090921 Product data sheet - - NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 16 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. 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No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 17 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] NX3V1T384 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 18 of 19 NX3V1T384 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 18. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 11.3 12 12.1 12.2 12.3 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance test circuit and graphs. . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveform and test circuits . . . . . . . . . . . . . . . 10 Additional dynamic characteristics . . . . . . . . . 11 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 4 November 2011 Document identifier: NX3V1T384