Delta She et, DS 2, Ju ne 2001 DFE-T V2.1 Quad ISDN 4B3T Echocanceller D ig i t a l F ro n t E n d P E F 2 4 9 0 1 V er s i o n 2 . 1 Wired Communications N e v e r s t o p t h i n k i n g . Edition 2001-06-22 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 2001. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Delta She et, DS 2, Ju ne 2001 DFE-T V2.1 Quad ISDN 4B3T Echocanceller D ig i t a l F ro n t E n d P E F 2 4 9 0 1 V er s i o n 2 . 1 Wired Communications N e v e r s t o p t h i n k i n g . PEF 24901 Revision History: 2001-06-22 DS 2 Previous Version: 03.99 DS 1 Major changes since last revision: - added table with specified power consumption - Pinning – changed pin16: MTO functionality is not supported – new on pin 45: SLOT1 selection – changed pin 49: functionility not required – changed pin 55: renamed SLOT0 - Removed ’Exchange of Transparent Messages’: not supported - BER description refined (zeros must be sent by the user) - C/I-Command LTD will be supported in V2.1 (same function as in V1.2) - Slightly optimized statemachine - Coefficients are not retrievable - Version update of the boundary scan IDCODE Register - MON-8 AID version identification - Recognition delay of C/I-changes - MON-8 message in state ’Reset’ - C/I-channel indication in hardware reset - Hardware reset execution For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://www.infineon.com PEF 24901 Table of Contents Page 1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 MON-12 Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Bit Error Rate Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5 Digital Local Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 LT Mode Only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7 C/I Channel Command Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 8 C/I Code ’HI’ omitted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 9 State Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 10 Retrieving Coefficients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 Boundary Scan Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 Version Update of the Boundary Scan IDCODE Register . . . . . . . . . . 12 13 MON-8 AID Version Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 14 Recognition Delay of C/I-Code Changes . . . . . . . . . . . . . . . . . . . . . . . . 13 15 MON-8 Messages in State ’Reset’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 16 C/I-Channel Indication in Hardware Reset . . . . . . . . . . . . . . . . . . . . . . 13 17 Hardware Reset Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Delta Sheet 2001-06-22 Quad ISDN 4B3T Echocanceller Digital Front End DFE-T V2.1 PEF 24901 Version 2.1 This Delta Sheet lists the add-on features and differences between the DFE-T V2.1 and the DFE-T V1.2. 1 Power Supply The DFE-T V2.1 requires a +3.3V ±0.3V power supply. The inputs and outputs remain 5V TTL compatible. Table 1 Power Consumption Mode Typ. values Max. values Unit Test conditions Power-up all Channels 85 100 mA 3.3 V, open outputs, inputs at VDD /VSS Power-down 35 t.b.d. mA 3.3 V, open outputs, inputs at VDD /VSS 2 Pinning Table 2 lists the changes that were made concerning the pinning, Table 3 specifies new pin functions that were introduced with version 2.1. Table 2 Pinning Changes Pin No. V2.1 V1.2 Comment 32 PUP SLOT2 additional push-pull mode for pin DOUT eases interface adaption, SLOT2 was not used in V1.2 45 SLOT1 N.C. increased max data rate (4 MBit/s) requires an additional SLOT pin 49 N.C. TP3 no function Delta Sheet 1 2001-06-22 PEF 24901 Table 2 Pinning Changes Pin No. V2.1 V1.2 Comment 53 N.C. LT as in V1.x LT-RP mode is not supported in V2.1 55 SLOT0 SLOT renamed 56 SSP TSP dedicated pin for ’Send Single Pulses’ test mode 62 DT TP2 dedicated pin for ’Data Through’ test mode 63 TRST TP1 BScan power-on-reset is replaced by a dedicated reset line Table 3 Pin Definitions and Functions Pin No. Symbol Input (I) Output (O) Function 32 PUP I (PD) Push Pull Mode in push pull mode ’0’ and ’1’ is actively driven during an occupied time-slot, outside the active time-slots DOUT is high impedance (tristate) ’1’= configures DOUT as push/pull output ’0’= configures DOUT as open drain output 55 SLOT0 I IOM®-2 Channel Slot Selection 0 assigns IOM®-2 channels in blocks of 4 SLOT1, 0: ’00’= IOM®-2 channels 0 to 3 ’01’= IOM®-2 channels 4 to 7 ’10’= IOM®-2 channels 8 to 11 ’11’= IOM®-2 channels 12 to 15 45 SLOT1 I (PD) IOM®-2 Channel Slot Selection 1 assigns IOM®-2 channels in blocks of 4 49 N.C. - No function May be clamped to GND for compatibility to former versions Delta Sheet 2 2001-06-22 PEF 24901 Table 3 Pin Definitions and Functions Pin No. Symbol Input (I) Output (O) Function 53 N.C. - No function May be clamped to VDD for compatibility to former versions 56 SSP I Send Single Pulses (SSP) Test Mode enables/disables SSP test mode ’1’= SSP test mode enabled, +1 pulses are issued at the four line ports in 1ms intervals ’0’= SSP test mode disabled 62 DT I Data Through (DT) Test Mode enables/disables DT test mode ’1’= DT test mode enabled, the U-transceiver is forced on all line ports to enter the ’Transparent’ state ’0’= DT test mode disabled 63 TRST I (PU) JTAG Boundary Scan Disable resets the TAP controller state machine (asynchronous reset), internal pullup ’1’= reset inactive ’0’= reset active PU: Pull Up: typ 100µA PD: Pull Down: typ 100µA Delta Sheet 3 2001-06-22 D2D D3D CLS2 N.C. VDD SLOT0 SSP VSS N.C. N.C. RES CLS3 DT TRST TCK 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 VDD D1B N.C. D0B D3A D2A SLOT1 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 P-MQFP-64 24 23 22 21 20 19 18 17 PUP D1A D0A CLS0 ST00 ST01 ST10 VSS ST11 ST20 VDD ST21 CLS1 ST30 ST31 SDX 6 7 8 9 10 11 12 13 14 15 16 TDI TDO CL15 SDR VDD PDM3 PDM2 VSS PDM1 PDM0 DCL FSC TMS 1 2 3 4 5 Figure 1 Pin Diagram of the DFE-T V2.1 3 MON-12 Protocol DIN DOUT N.C. N.C. D2C D1C D0C VSS D3B D2B D1D D0D D3C PEF 24901 pinning.vsd MON-12 commands feature direct access to the device internal register map via the IOM®-2 Monitor channel. The MON-12 protocol works in the manner of a serial microprocessor interface. New functions such as digital local loopbacks, BER measurement etc. are only accessible via MON-12 commands. Functions that were so far provided via MON-8 commands, e.g. RDS counter status retrieval, can be accessed as well via the MON-12 protocol. For a detailed description of the register set please refer to the data sheet of the DFE-T V2.1. 4 Bit Error Rate Measurement For bit error rate monitoring the DFE-T V2.1 features an 16-bit Bit Error Rate counter (BERC) per line. As soon as the BER function is enabled, the user must send zeros in Delta Sheet 4 2001-06-22 PEF 24901 the selected channels and incoming ones are counted until the BER function has been disabled again by the user. 5 Digital Local Loops Besides the remote loopback stimulation and the local analog loopback (C/I= ARL) the DFE-T V2.1 features digital local loopbacks via its internal register set. The loopbacks that are additionally available with the internal LOOP register are shown in Figure 2. The local loops LB1, LB2 and LBBD can be activated at any time independent of the current activation status using the MON-12 protocol. Before loop DLB may be closed, the DFET must be in a transparent state, e.g. by applying C/I-command ’Data Through DT’. Delta Sheet 5 2001-06-22 PEF 24901 LOOP.LB1=1 or LOOP.LB2=1 or LOOP.LBBD= 1 & LOOP.U/IOM= 0 LOOP.LB1=1 or LOOP.LB2=1 or LOOP.LBBD= 1 & LOOP.U/IOM= 1 DFE-T V2.1 DSP Layer-1 Controller M U X Echo Canceller PDM Filter + 4B3T Coder Scrambler SIU U Framing IOM®-2 SyncWord A G C Equalizer M U X 4B3T Decoder DeScrambler U DeFraming Timing Recovery Activation/ Deactivation Controller System Interface Unit LOOP.DLB= 1 DFE-T V2.1 Layer-1 Controller DSP M U X Echo Canceller PDM Filter + 4B3T Coder Scrambler SIU U Framing IOM®-2 SyncWord A G C Equalizer M U X 4B3T Decoder DeScrambler U DeFraming Timing Recovery Activation/ Deactivation Controller System Interface Unit loopreg.vsd Figure 2 Delta Sheet Loopbacks Featured by Register LOOP 6 2001-06-22 PEF 24901 6 LT Mode Only The DFE-T V2.1 operates only in LT mode. LT-RP mode is not supported. 7 C/I Channel Command Coding C/I code mnemonics were adapted to the 2B1Q notation for consistency reasons. The coding has been retained unchanged. Table 4 presents all defined C/I codes. The former C/I code names of the DFE-T V1.2 are given in brackets. Table 4 Command / Indicate Codes (4B3T) Code LT-Mode DIN DOUT 0000 DR – 0001 – DEAC(DA) 0010 – – 0011 LTD – (HI) 0100 – RSY (RSYU) 0101 SSP – 0110 DT(TEST) – 0111 – UAI(RDS) 1000 AR(ARN) AR(ARU) 1001 AR1 – 1010 AR2 – 1011 AR4 – 1100 – AI(AIU) 1101 RES – 1110 – – 1111 DC(DID) DI(DIU) • AI Activation Indication DR Deactivation Request AR Activation Request LTD LT Disable AR1 Activation Request Local Loop RES Reset AR2 Activation Request Loop 2 RSY Resynchronization Indication AR4 Activation Request Loop 4 SSP Send-Single-Pulses Delta Sheet 7 2001-06-22 PEF 24901 DC Deactivation Confirmation DT Data Through Mode DEAC Deactivation Accepted UAI U Activation Indication DI Deactivation Indication. 8 C/I Code ’HI’ omitted The C/I indication ’HI’ is no more supported. 9 State Machine Some minor changes were made regarding the state machine, e.g. the notation was aligned to that of 2B1Q for consistency reasons. The improvements are summarized and listed in Table 5. See also the state diagrams in Figure 3 (V2.1) and Figure 4 (V1.2). Delta Sheet 8 2001-06-22 PEF 24901 AR, AR1, AR2, AR4 (T05E & U0) U0 Deac. Acknowledge DI U0 Deactivating DEAC T05S DC AR1 U0 Deactivated DI AR, AR1, AR2, AR4 T12S T12S U2W Start Awaking Uk0 DR AWR T12S DR AR T12S AWT T7S (T12E & /AR1) (T12E & AR1) U0 Awake Signal Sent AR DR DR (AWR & /AR1) U2W Sending Awake-Ack. AR T7S AWT T7S U0 Ack. Sent / Received AR AWR DR T7E U2 Synchronizing AR U3 DR DR U1 U2 Uk0 Synch. no TE? UAI / RSY (U3 | AR1) T1S U4H Link to TE Synch. UAI / RSY T1S DR T1E AR1, DR U0 Reset DEAC AR1, DR SP / U0 Test DEAC T1S U4 Wait 1ms UAI / RSY DR T1E SSP, Pin-SSP LTD U4 Transparent AI / RSY DR DT, Pin-DT ANY STATE RES, Pin RES LT_SM_4B3T_cus.emf Figure 3 Delta Sheet State Diagram of V2.1 9 2001-06-22 PEF 24901 Figure 4 Delta Sheet State Diagram of V1.2 10 2001-06-22 PEF 24901 Table 5 Differences to LT-SM of DFE-T V1.2 No. V1.2 State/ Signal 1. ’Maintenance’ State Change in V2.1 Comment split into two states - Reset State - Test State defined reset and test states transition with C/I-code ’AR1’: new: from state ’Reset’ or ’Test’ to state ’Deactivating’ old: to state ’Start Awaking Uk0’: no more supported simplifies SM implementation 2. Any State transition condition PFOFF& no support of the IEC type power /ARL doesn’t exist any more controller interface 3. State ’Data Transmission’ renamed to state ’Transparent’ 4. State ’Power Down’ renamed to state ’Deactivated’ 5. Renamed C/I codes old ARN ARL AIU DA DID DIU RSYU TEST RDS 6. C/I code HI C/I codes ’HI’ omitted 7. Timer variables introduced Name T05 T1 T7 T12 10 -> -> -> -> -> -> -> -> -> -> consistency to 2B1Q coding new AR AR1 AI DEAC DC DI RSY DT UAI Duration 0.5ms 1.0ms 7.0ms 12.0ms Retrieving Coefficients Coefficients are not retrievable by MON-8 commands. The corresponding MON-8 commands are no more supported. Delta Sheet 11 2001-06-22 PEF 24901 11 Boundary Scan Instruction Set The Boundary-Scan instructions ’CLAMP’ and ’HIGHZ’ are introduced in version 2.1. The instruction ’SSP’ is omitted since this test function can be triggered either by pin ’SSP’ or channel selective by C/I ’SSP’. CLAMP allows the state of the signals included in the boundary scan driven from the PEB 24901 to be determined from the boundary scan register while the bypass register is selected as the serial path between TDI and TDO. These output signals driven from the DFE-T V2.1 will not change while CLAMP is selected. HIGHZ sets all output pins included to the boundary scan path into a high impedance state. In this state, an in-circuit test system may drive signals onto the connections normally driven by the DFE-T V2.1 outputs without incurring the risk of damage to the DFE-T V2.1. Table 6 TAP Controller Instructions: Code Instruction Function 0000 EXTEST External testing 0001 INTEST Internal testing 0010 SAMPLE/PRELOAD Snap-shot testing 0011 IDCODE Reading ID code 0100 CLAMP Reading outputs 0101 HIGHZ Z-State of all boundary scan output pins 11XX BYPASS Bypass operation 12 Version Update of the Boundary Scan IDCODE Register Version Device Code Manufacturer Code 0001 0000 0000 0110 0111 0000 1000 001 13 Output 1 --> TDO MON-8 AID Version Identification On receiving the MON-8 Command RID the DFE-T responds with the MONITOR message AID coded 8008H . This code is unique for version 2.1 with respect to other DFE-T versions Delta Sheet 12 2001-06-22 PEF 24901 14 Recognition Delay of C/I-Code Changes The DFE-T V2.1 has implemented a new architecture for low power consumption. Furthermore it is developed for complete compatibility in MONITOR and C/I messages. The new architecture , however, leads to changes in response times compared to former versions, that could affect the compatibility to software with rigid time-out settings. The evaluation of changes of the incoming C/I-code takes longer than in former versions of the PEF 24901: • Recognition of changes to unconditional commands (I.e.: to RES, SSP, LTD and DT) takes up to 2,5 msec instead of 0.25 msec in former versions • In states ’Test’ and ’Reset’ recognition of changes in the C/I channel can also take up to 2,5 msec instead of 0.25 msec in former versions • In states other than ’Reset’ or ’Test’ recognition of changes to all other conditional commands takes up to 0,5 ms instead of 0.25 msec in former versions The C/I codes shall be repeated at least the times above, before the C/I code may be changed. Surveillance timers have to be set to values beyond the named times. 15 MON-8 Messages in State ’Reset’ The issuing of MON-8 messages has been improved in state ’Reset’ If the state ’Reset’ is entered due to a hardware reset (pin RES=0) the device will issue a MON-8 message AST afterwards if one of the pins STxy is high to communicate this status to the system software. The usage of MON-8 commands is not blocked during a Software Reset, i.e. the C/Icommand RES is applied. Even while the SW-reset is activated, the relay driver pins can be programmed by the MON-8 message SETD, and the status pins can be read with RST messages or will autonomously communicate changes of the status. The device will also answer on a RID-command with a AID-message. 16 C/I-Channel Indication in Hardware Reset As long as pin RES is low, the issued C/I-code is DI (1111b) instead of DEAC (0001b) for all channels. After putting RES to high the C/I-codes change to DEAC. 17 Hardware Reset Execution In contrast to former versions of the DFE-T, a hardware reset to the DFE-T V2.1 by RES = ’0’ takes effect immediately and requires no clocks on IOM-2. However, the DFET V2.1 must be supplied with 15.36 MHz masterclock on pin CL15. The end of reset execution is delayed internally for 900µs. Delta Sheet 13 2001-06-22