PHD/PHP36N03LT N-channel TrenchMOS logic level FET Rev. 02 — 8 June 2006 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. 1.2 Features n Logic level compatible n Low gate charge 1.3 Applications n DC-to-DC converters n Switched-mode power supplies 1.4 Quick reference data n VDS ≤ 30 V n RDSon ≤ 17 mΩ n ID ≤ 43.4 A n Ptot ≤ 57.6 W 2. Pinning information Table 1. Pinning Pin Description 1 gate (G) 2 drain (D) 3 source (S) mb mounting base; connected to drain Simplified outline Symbol mb [1] mb D G 2 1 mbb076 3 1 2 3 SOT428 (DPAK) [1] SOT78 (3-lead TO-220AB) It is not possible to make a connection to pin 2 of the SOT428 package. S PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 3. Ordering information Table 2. Ordering information Type number Package Name Description Version PHD36N03LT DPAK plastic single-ended surface-mounted package; 3 leads (one lead cropped) SOT428 PHP36N03LT SC-46 plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 4. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 30 V VDGR drain-gate voltage (DC) 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 30 V VGS gate-source voltage - ±20 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 2 and 3 - 43.4 A Tmb = 100 °C; VGS = 10 V; see Figure 2 - 30.7 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 - 173.6 A Ptot total power dissipation Tmb = 25 °C; see Figure 1 - 57.6 W Tstg storage temperature −55 +175 °C Tj junction temperature −55 +175 °C Source-drain diode IS source current Tmb = 25 °C - 43.4 A ISM peak source current Tmb = 25 °C; pulsed; tp ≤ 10 µs - 173.6 A PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 2 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 03aa16 120 03aa24 120 Ider Pder (%) (%) 80 80 40 40 0 0 0 50 100 150 Tmb (°C) 200 P tot P der = ------------------------ × 100 % P tot ( 25°C ) 0 50 100 150 200 Tmb (°C) ID I der = -------------------- × 100 % I D ( 25°C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature Fig 2. Normalized continuous drain current as a function of mounting base temperature 001aae811 103 ID (A) Limit RDSon = VDS / ID 102 tp = 10 µs 100 µs 10 DC 1 ms 1 1 102 10 VDS (V) Tmb = 25 °C; IDM is single pulse; VGS = 10 V Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 3 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 5. Thermal characteristics Table 4. Thermal characteristics Symbol Parameter Conditions Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 Rth(j-a) thermal resistance from junction to ambient [1] Min Typ Max Unit - - 2.6 K/W SOT78 vertical in free air - 60 - K/W SOT428 minimum footprint [1] - 75 - K/W SOT404 minimum footprint [1] - 50 - K/W Mounted on a printed-circuit board; vertical in still air. 001aae810 10 Zth(j−mb) (K/W) δ = 0.5 1 0.2 0.1 0.05 10−1 0.02 δ= P tp T single pulse t tp 10−2 10−5 T 10−4 10−3 10−2 10−1 1 tp (s) Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 4 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 6. Characteristics Table 5. Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C 30 - - V Tj = −55 °C 27 - - V Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) IDSS gate-source threshold voltage drain leakage current ID = 250 µA; VGS = 0 V ID = 250 µA; VDS = VGS; see Figure 9 and 10 Tj = 25 °C 1 1.5 2 V Tj = 175 °C 0.5 - - V Tj = −55 °C - - 2.2 V VDS = 24 V; VGS = 0 V Tj = 25 °C - 0.05 1 µA Tj = 175 °C - - 500 µA - 10 100 nA IGSS gate leakage current VGS = ±20 V; VDS = 0 V RDSon drain-source on-state resistance VGS = 4.5 V; ID = 12 A; see Figure 6 and 8 Tj = 25 °C - 18 22 mΩ Tj = 175 °C - 32.4 39.6 mΩ VGS = 10 V; ID = 25 A; see Figure 6 and 8 - 14 17 mΩ VGS = 3.5 V; ID = 5.2 A; see Figure 6 and 8 - 22 40 mΩ ID = 36 A; VDS = 15 V; VGS = 10 V; see Figure 11 and 12 - 18.5 - nC - 4.2 - nC - 2.9 - nC - 690 - pF - 160 - pF - 110 - pF - 6 - ns Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time VGS = 0 V; VDS = 25 V; f = 1 MHz; see Figure 14 VDS = 15 V; RL = 0.6 Ω; VGS = 10 V; RG = 10 Ω tr rise time - 10 - ns td(off) turn-off delay time - 33 - ns tf fall time - 19 - ns - 0.97 1.2 V Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; see Figure 13 PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 5 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 001aae812 30 10 4.5 3.8 3.5 001aae813 40 3.4 RDSon (mΩ) ID (A) VGS (V) = 3.4 3.5 3.2 30 3.8 20 3.0 4.5 20 2.8 10 10 10 2.6 VGS (V) = 2.4 0 0 0 0.2 0.4 0.6 0.8 1.0 VDS (V) 0 10 20 30 40 ID (A) Tj = 25 °C Tj = 25 °C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of drain current; typical values 001aae814 40 03af18 2 ID (A) a 30 1.5 20 1 0.5 10 175 °C Tj = 25 °C 0 0 1 2 3 4 0 -60 0 VGS (V) Tj = 25 °C and 175 °C; VDS > ID × RDSon 120 Tj (°C) 180 R DSon a = ----------------------------R DSon ( 25°C ) Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature PHD_PHP36N03LT_2 Product data sheet 60 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 6 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 03aa33 2.5 VGS(th) (V) 2 1.5 03aa36 10-1 ID (A) max 10-2 typ 10-3 min max 10-4 min 1 typ 10-5 0.5 0 -60 10-6 0 60 120 Tj (°C) 180 0 1 2 VGS (V) 3 Tj = 25 °C; VDS = 5 V ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature Fig 10. Sub-threshold drain current as a function of gate-source voltage 001aae817 10 VGS (V) 8 VDS ID 6 VGS(pl) 4 VGS(th) VGS 2 QGS1 QGS2 QGS 0 0 5 10 15 20 QG (nC) QGD QG(tot) 003aaa508 ID = 36 A; VDS = 15 V Fig 11. Gate-source voltage as a function of gate charge; typical values Fig 12. Gate charge waveform definitions PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 7 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 001aae815 40 001aae816 104 IS (A) C (pF) 30 103 Ciss 20 Coss Crss 102 10 175 °C Tj = 25 °C 0 0 0.3 0.6 0.9 1.2 10 10−1 1 VDS (V) Tj = 25 °C and 175 °C; VGS = 0 V VGS = 0 V; f = 1 MHz Fig 13. Source current as a function of source-drain voltage; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values PHD_PHP36N03LT_2 Product data sheet 102 10 VSD (V) © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 8 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E A A A1 b2 E1 mounting base D2 D1 HD 2 L L2 1 L1 3 b1 b w M c A e e1 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 b2 c D1 D2 min E E1 min e e1 HD L L1 min L2 w y max mm 2.38 2.22 0.93 0.46 0.89 0.71 1.1 0.9 5.46 5.00 0.56 0.20 6.22 5.98 4.0 6.73 6.47 4.45 2.285 4.57 10.4 9.6 2.95 2.55 0.5 0.9 0.5 0.2 0.2 OUTLINE VERSION SOT428 REFERENCES IEC JEDEC JEITA TO-252 SC-63 EUROPEAN PROJECTION ISSUE DATE 06-02-14 06-03-16 Fig 15. Package outline SOT428 (DPAK) PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 9 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78 A A1 p q mounting base D1 D L2 L1 Q b1 L 1 2 3 c b e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1 L2 max. p q Q mm 4.7 4.1 1.40 1.25 0.9 0.6 1.45 1.00 0.7 0.4 16.0 15.2 6.6 5.9 10.3 9.7 2.54 15.0 12.8 3.30 2.79 3.0 3.8 3.5 3.0 2.7 2.6 2.2 OUTLINE VERSION SOT78 REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 05-03-22 05-10-25 Fig 16. Package outline SOT78 (3-lead TO-220AB) PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 10 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 8. Revision history Table 6. Revision history Document ID Release date Data sheet status Change notice Supersedes PHD_PHP36N03LT_2 20060608 Product data sheet - PHD36N03LT-01 Modifications: PHD36N03LT-01 (9397 750 11613) • The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Addition of PHP36N03LT 20030630 Product data PHD_PHP36N03LT_2 Product data sheet - - © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 11 of 13 PHD/PHP36N03LT Philips Semiconductors N-channel TrenchMOS logic level FET 9. Legal information 9.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.semiconductors.philips.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a Philips Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is for the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.semiconductors.philips.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V. 10. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] PHD_PHP36N03LT_2 Product data sheet © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 02 — 8 June 2006 12 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © Koninklijke Philips Electronics N.V. 2006. All rights reserved. For more information, please visit: http://www.semiconductors.philips.com. For sales office addresses, email to: [email protected]. Date of release: 8 June 2006 Document identifier: PHD_PHP36N03LT_2