ETC PWR-82332-110

PWR-82332
SMART POWER 3-PHASE MOTOR
DRIVE FOR SPACE APPLICATIONS
FEATURES
DESCRIPTION
APPLICATIONS
The PWR-82332 is a Smart Power
3-phase Motor Drive hybrid. The
PWR-82332 uses a MOSFET output stage with 400 VDC rating, and
can deliver 19A continuous current
to the load. Individual fast recovery
diodes are internally connected
across each of the six output transistors to clamp inductive flyback.
High and low-side input logic signals are XOR’d in each phase to
prevent simultaneous turn on of inline transistors, thus eliminating a
shoot thru condition. The internal
logic controls the high and low-side
gate drives for each phase and
operates from 5 V logic levels. The
internal power supply provides a
constant voltage source to the
floating high-side gate drives. This
provides constant output performance for switching frequencies
from dc to 50 kHz.
Packaged in a small case, this
hybrid is an excellent choice for high
performance, high-reliability motor
drives for servo-amps and speed
controls. Among the many applications are robotic arms; electromechanical valve assemblies; actuator systems; antenna and solar
panel positioning; fan and blower
motors for environmental conditioning; Reaction wheels; compressor
motors for cryogenic coolers. The
PWR-82332 hybrid is ideal for harsh
military/space environments where
shock, vibration, and temperature
extremes are evident. The PWR82332 operates over the -55°C to
+125°C temperature range and is
available with K-Level processing.
· Small Size (3.0" x 2.3" x 0.40")
· 400 VDC Rating
· 19 A Continuous Current Capability
· Class K Processing
· SEU Immune for LET Level of 36
MeV/mg/cm2
· Can Withstand 10 KRad (Si) Total
Dose Radiation
· Space Station Qualified Drawing
#SSQ22691
· High-Efficiency MOSFET Drive Stage
· Direct Drive for Commutation Logic
· 6 Step Trapezoidal or Sinusoidal Drive
· Four Quadrant Operation
Vb
POWER SUPPLY/BIAS GENERATION
VZ
VCC A
VLPI
VUA
VO A
VLA
DRIVE
A
GND
VUB
VLB
VSS A
DIGITAL
CONTROL
AND
PROTECTION
CIRCUITRY
VCC B
VO B
DRIVE
B
GND
VSS B
VCC C
VUC
VLC
GND
VO C
DRIVE
C
VSS C
VSd
FIGURE 1. PWR-82332 BLOCK DIAGRAM
© 1993, 1999 Data Device Corporation
TABLE 1. ABSOLUTE MAXIMUM RATINGS (SEE NOTE 1)
(TC = +25°C UNLESS OTHERWISE SPECIFIED)
SYMBOL
VALUE
UNITS
Supply Voltage (see note 2)
PARAMETER
Vcc
400
VDC
Bias Voltage
Vb
50
VDC
Logic Power-In Voltage
Input Logic Voltage
Output Current
Continuous
Pulsed (fo = 50kHz, duty cycle = 5%, Vcc = 120V
VLPI
5.5
VDC
VU, VL, Vsd
6.0
VDC
IO
IOP
19
25
A
A
Operating Frequency
fo
50
kHz
Case Operating Temperature
Tc
-55 to +125
°C
Storage Temperature Range
Tcs
-65 to +150
°C
±3V
VDC or peak
500
VDC
GND-Vss Differential Voltage
Dielectric Withstanding Voltage (all pins to package)
DMV
TABLE 2. PWR-82332 SPECIFICATIONS
(TC = +25°C UNLESS OTHERWISE SPECIFIED)
PARAMETER
SYMBOL
OUTPUT
Output Current Continuous
Supply Voltage
Output On-Resistance (each FET; see FIGURE 13)
Instant Forward Voltage (Flyback diode; see FIGURE 12)
Reverse Recovery Time (Flyback diode)
Reverse Leakage Current at Tc = +25°C
Reverse Leakage Current at Tc = +125°C
Io
Vcc
Ron
VF
trr
IR
IR
IF = 15A (see note 1)
IF = 15A (see note 1)
IF = 1A, IR = 1A
Vcc = 400V, VU = VL = Logic 0
Vcc = 400V, VU = VL = Logic 0
BIAS SUPPLY
Input Bias Supply (Tc = -55°C to +125°C)
Quiescent Bias Current (see note 2)
Bias Current (Tc = -55°C to +125°C;see FIGURES 9, 10, 11)
Inrush Current (Tc = -55°C to +125°C)
Logic Power Input Current
Vb
Ibq
Ib
Iir
ILPI
Vb = 28V
Vb = 28V, fo = 30kHz
Vb = 28V
VLPI = 5.0V
INPUT SIGNALS
High-Level Input Voltage
Low-Level Input Voltage
VIH
VIL
SWITCHING CHARACTERISTICS (see FIGURE 2)
Upper drive:
Turn-on Propagation Delay
Turn-off Propagation Delay
Shut-down Propagation Delay (see FIGURE 5)
Turn-on Rise Time
Turn-off Fall Time
Lower drive:
Turn-on Propagation Delay
Turn-off Propagation Delay
Shut-down Propagation Delay (see FIGURE 5)
Turn-on Rise Time
Turn-off Fall Time
td (on)
td (off)
tsd
tr
tf
TEST CONDITIONS
MIN
120
14
tpw
THERMAL
Maximum Thermal Resistance
Maximum Lead Soldering Temperature
Junction Temperature Range
Case Operating Temperature
Case Storage Temperature
θ j-c
Ts
Tj
Tco
Tcs
MAX
UNITS
19
400
0.25
1.6
50
280
7
A
V
Ohm
V
nsec
µA
mA
50
100
1.4
7
V
mA
mA
A
mA
0.9
V
V
690
1375
800
300
300
nsec
nsec
nsec
nsec
nsec
675
1050
700
300
300
nsec
nsec
nsec
nsec
nsec
40
3.15
Io = 15A Peak
Vcc = 120V
td (on)
td (off)
tsd
tr
tf
MINIMUM PULSE WIDTH
TYP
175
see note 3
each transistor
WEIGHT
NOTES:
1. Pulse width ≤ 300µs, duty cycle ≤ 2%.
2. VU, VL = Logic ‘0’ on pins 17, 18, 20, 21, 24 and 25.
3. Solder 1/8" from case for 5 seconds maximum.
2
-55
-55
-55
nsec
0.85
250
150
125
150
°C/W
°C
°C
°C
°C
6.125 (175)
oz (g)
INTRODUCTION
This provides a continuous high-side gate drive even during a
motor stall. The high and low-side gate drivers control the Nchannel MOSFET output stage. The MOSFETs used in the
PWR-82332 allow output switching up to 50 kHz. A flyback
diode parallels each output transistor and controls the regenerative energy produced by the motor. These fast recovery diodes
have faster reverse switching times than the intrinsic body diode
of the MOSFETS used in the PWR-82332. Care should be taken
to adequately heatsink these motor drives to maintain a case
temperature under 125°C. Junction temperatures should not
exceed 150°C. The PWR-82332 does not have an internal
short-circuit or overcurrent protection. For protection of the output transistors, these features must be added external to the
hybrid.
The 3-Phase PWR-82332 is a 19A motor drive rated at 400V.
The PWR-82332 uses a MOSFET output stage for high speed,
high current, and high-efficiency operation. This motor drive is
ideal for use in high-performance motion control systems, servo
amplifiers, and motor speed control designs. Furthermore, multiaxis systems requiring multiple drive stages can-benefit from the
small size of this power drive.
The PWR-82332 can be driven directly from commutation logic,
DSP, or a custom ASIC that supplies digital signals to control the
upper and lower transistors of each phase. This highly integrated
drive stage has digital inputs that control the high and low side of
each phase. Digital protection of each phase eliminates an in-line
firing condition, by preventing simultaneous turn-on of both the
upper and lower transistors in a given phase. The PWR-82332 has
a ground referenced low-side gate drive. An internal dc-dc converter supplies a floating output to each of the 3 high side drives.
INPUTS:
(VUA, VUB, VUC)
INPUTS:
(VLA, VLB, VLC)
50%
50%
tr
OUTPUTS:
(VOA, VOB, VOC)
tf
tr
OUTPUTS:
(VOA, VOB, VOC)
tf
90%
50%
10%
90%
50%
10%
t d (ON)
t d (ON)
t d (OFF)
t d (OFF)
FIGURE 2. INPUT/OUTPUT TIMING RELATIONSHIPS
+5V
BIAS VOLTAGES
+15V ≤ V ≤ +50Vdc
OPEN
+120Vdc
The PWR-82332 motor drive hybrid requires a single input bias
supply for operation. The hybrid generates three independent,
floating supplies internally, which eliminates the need for external bias voltages for each phase.
0.01µF
In order for the internal power supply to generate these voltages,
the input bias voltages (Vb) must be from 15 to 50 Vdc.
0.01µF
16
VLPI
13
12
VB
VZ
3
7 11
VCC
PWR-82332
Any voltage available in the system in the 15 to 50 Vdc range can
be directly connected to the Vb pin of the hybrid. (See FIGURE
3).
A 0.01 µF decoupling capacitor must be connected between Vb
(pin 12) and GND and VLPI (pin 16) to GND.
FIGURE 3. CONNECTION TO BUS VOLTAGE,
INPUT BIAS VOLTAGE AND LOGIC
POWER INPUT VOLTAGE
3
DIGITALLY CONTROLLED INPUTS
not respond to signals on the VL or VU inputs while the Vsd has
a logic ‘1’ applied. See FIGURE 5. When the user or the sense
circuitry ( as in FIGURE 6) returns the Vsd input to a logic ‘0’, the
output transistors will respond to the corresponding digital input.
This feature can be used with the external current limit or temperature sense circuitry to disable the drive if a fault condition
occurs (see FIGURE 6).
The PWR-82332 digital inputs can be driven with any type of 5
V logic, such as TTL or CMOS logic. PIN 16 is the logic power
input (VLPI) for the digital circuitry inside the hybrid. An external
5 V power supply must be connected between this pin and GND.
A 0.01 µF ceramic capacitor must be placed between this pin
and GND as close to the hybrid as possible see (FIGURE 3).
The commutation/control circuitry can be as simple as discrete
logic with PWM, or as sophisticated as a microprocessor or custom ASIC, depending on the system requirements. The Block
diagram in FIGURE 4 shows a typical interface of the PWR82332 with a motor and commutation logic in a Servo-Amp
System.
INTERNAL PROTECTION CIRCUITRY
The hybrid contains digital protection circuitry, which prevents inline transistors from conducting simultaneously. This, in effect,
would short circuit the power supply and would damage the output stage of the hybrid. The circuitry allows only proper input signal patterns to cause output conduction. TABLE 3. shows these
timing relationships. If an improper input requested that the
upper and lower transistors of the same phase conduct together,
the output would be a high impedance until removal of the illegal
code from the input of the PWR-82332. A dead time is not
required for the signals at the VU and VL pins.
SHUT-DOWN INPUT (Vsd)
Pin 23 (Vsd) provides a digital shut-down input, which allows the
user to completely turn off both the upper and lower output transistors in all 3 phases. Application of a logic ‘1’ to the Vsd input
will disable the Digital/Control Protection circuitry thereby turning
off all output transistors. The circuitry remains disabled and will
VCC
POWER SUPPLY/BIAS GENERATION
CC A
OA
CC B
Ω
OB
SS B
CC C
OC
SS C
CRITICAL GROUND PATH
To prevent damage to the internal drive circuitry, the differential voltage between
GND (pins 19,22,26) and Vss (pins 1, 5, 8) must not exceed ± 3V max, dc or peak
FIGURE 4. PWR-82332 TYPICAL INTERFACE WITH A MOTOR
4
HALL
EFFECT
DEVICE
+
SS A
MOTOR
1
V UA
V LA
1
0
1
0
1
0
V LB
1
0
V LC
1
0
V UB
V UC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
1
0
V Sd
1
0
V OA
H
Z
L
V OB
H
Z
L
V OC
H
Z
L
V Sd
t en
1
0
t sd
H
V OA Z
L
FIGURE 5. SHUT-DOWN (Vsd) TIMING RELATIONSHIP
5V
INPUT
COMMANDS
18
17
21
20
25
24
COMMUTATION
LOGIC
23
CURRENT
SENSE
CIRCUITRY
16
15V
12
120V
11
3
7
9
6
PWR82332
VSd
1
Vss
5
MOTOR
2
19,22,26
8
R SENSE
FIGURE 6. FUNCTIONAL SHUT-DOWN INPUT USED WITH CURRENT-SENSING CIRCUITRY
5
PWR-82332 POWER DISSIPATION (see FIGURE 7)
2. Switching Losses (PS)
There are three major contributors to power dissipation in the
motor driver: conduction losses, switching losses, and flyback
diode losses. Consider the following operating conditions
PS = [VCC (IOA) (ts1) + IOB (ts2))fo] / 2
PS= [120 (10 (600 ns) + 12 (300ns)) 25kHz] / 2
PS = 14.4 Watts
VCC= 120 V (Bus Voltage)
(see FIGURE 7)
IOA = 10 A, IOB = 12 A
ton = 30 µs (see FIGURE 7); T = 40 µs ( period )
Ron = 0.51Ω ( on-resistance, Assume worst case,Tj = +150°C)
(see Figure 13)
3. Flyback diode Losses (Pd)
Pd = If (avg) x Vf (avg)
If (avg) = [( IOB + IOA ) / 2] / 2
= [(12 + 10 ) /2] / 2 = 5.5 A
Pd = 5.5 A x 0.95 V
Pd = 5.23 Watts
ts1 = 600 ns; ts2 = 300 ns (see FIGURE 7)
fo = 25 kHz (switching frequency)
VF is the diode forward voltage, Io = 12 A, TC=+25°C
VF (avg)=0.95 V; IF is the diode forward current
Transistor Power Dissipation (PT)
1. Conduction Losses (PC)
PC = ( Imotor rms )2 x Ron
I motor rms =
(IOB - IOA)
2
IOB - IOB (IOB - IOA) +
2
3
To calculate the maximum power dissipation of the output transistor / diode pair as a function of the case temperature, use the
following equation. (Reference FIGURE 14 to ensure you don’t
exceed the maximum allowable power dissipation of each transistor / diode pair.)
ton
T
PT = PC + PS + Pd
In this example, PT = 46.42 + 14.4 + 5.23 = 66.05 Watts
I motor rms =
2
12 - 12 (12 - 10) +
(12 - 10)
3
2
Total Hybrid Power Dissipation (PHybrid)
To calculate Total Power Dissipated in the hybrid add
the power dissipation of each conducting transistor / diode pair.
Typically, only two transistor / diode pairs are conducting at any
given time.
30
40
PC = (9.54)2 x (0.51Ω ) = 46.42 Watts
PHASE CURRENT
LOWER TRANSISTOR
CURRENT
PHASE OUTPUT
VOLTAGE
T
t on
I OB
V CC
I OA
IO
t s1
FIGURE 7. OUTPUT CHARACTERISTICS
6
t s2
GROUND CONNECTIONS
LAYOUT AND EXTERNAL COMPONENTS
For example, a value of RSENSE of 0.025 Ω will give a voltage
drop of 0.375 V at 15 A. and allow enough margin for the voltage
drop in the ground conductors. Locate RSENSE 1IN. to 2IN. maximum from the hybrid. It is critical that all ground connections
be as short, and of lowest impedance, as the system allows.
Important Information - The following layout guidelines and
required external components are critical to the proper operation of this motor drive.
Permanent damage will result to the motor drive if the user
does not make the following recommended ground connections that will ensure the proper operation of the
hybrid.
C1 and C2 are 0.01µF power supply decoupling capacitors.
Care must be taken to control the regenerative energy produced
by the motor in order to prevent excessive voltage spiking on the
VCC line. Accomplish this by placing a Tantalum capacitor or
clamping diode between VCC and the high power ground return.
The Vb, VLPI and logic ground returns are on pins 19, 22, and 26
(GND). The VSS connections for the output stage are on pins 1,
5, and 8 (VSS). To prevent damage to the internal drive circuitry, the differential voltage between GND (pins 19, 22, 26)
and VSS (pins 1, 5, 8) must not exceed ±3 V max, dc or peak.
This includes the combined voltage drop of the associated
ground paths and the voltage drop across RSENSE (see FIGURES 6 and 8).
VCC
13
18
17
19
21
20
11
Vz
VUA
VCC A
VLA
VSS A
GND
VUB
VO A
VLB
VCC B
GND
VSS B
22
25
24
26
23
VO B
VUC
TANT
9
7
5
5Ω
1W
6
3
VCC C
VLC
VSS C
GND
VSd
Vb
12
0.01uF
100 V
8
C1
VO C
VLPI
1
2
15
C2
0.01uF
50 V
FIGURE 8. PWR-82332 GROUND CONNECTION
7
0.1uF
200 V
+
220uF
200 V
74
140
Bias Supply Current, Ib (mamps)
Bias Supply Current, Ib (mamps)
160
fo =30 kHz
TC=+125°C
120
100
80
60
TC=+25°C & -55°C
40
15
20
25
30
35
40
45
50
Vb = 28 V
70
68
66
64
30kHz
62
60
58
56
54
-60
20
10
72
55
-40
-20
20
40
60
80
100
120
140
Case Temperature, TC (°C)
Bias Voltage, Vb (Volts)
FIGURE 9. PWR-82332
BIAS SUPPLY CURRENT VS. BIAS VOLTAGE
FIGURE 10. PWR-82332
BIAS SUPPLY CURRENT VS. CASE TEMPERATURE
@ fo =30kHz
100
1.2
90
Diode Forward Voltage, Vf (Volts)
Bias Supply Current, Ib (mamps)
0
Vb = 28 V
80
TC=+125°C
70
TC=+25°C
TC=-55°C
60
50
40
10
15
20
25
30
35
40
45
50
TC=+25°C
1.0
0.9
TC=+125°C
0.8
0.7
0.6
0.5
0
30
5
TC=-55°C
1.1
2
4
6
8
10
12
14
16
18
20
Diode Forward Current, If (amps)
PWM Switching Frequency, fo (kHz)
FIGURE 12. PWR-82332
DIODE FORWARD VOLTAGE VS. DIODE FORWARD
CURRENT
FIGURE 11. PWR-82332
BIAS SUPPLY CURRENT VS. PWM SWITCHING
FREQUENCY
8
FIGURE 13. PWR-82332
ON-STATE RESISTANCE VS. JUNCTION TEMPERATURE
FIGURE 14. PWR-82332
POWER DISSIPATION VS. CASE TEMPERATURE
9
The PWR-82332 is offered in three lead-bend styles,(as shown in FIG. 15A, B, C)
downward bend, upward bend or straight leads.
2.300
0.120
2.060
0.250
1.800
0.125 (4 PLS)
0.300
(3 PLS)
1
26
10 EQ. SP. @
0.200 = 2.00
( TOL. NONCUM.)
12 EQ. SP. @
0.200 = 2.400
(TOL. NONCUM.)
3.000 ± 0.010
2.750
16
0.200 ( TYP)
13
SEE NOTE 1
0.130 ± 0.010 DIA
(4 HOLES)
0.10 R (MAX)
(4 PLS)
0.050 DIA (TYP)
(24 PLS)
0.040 (MAX) (24 PLS)
0.125 (TYP)
0.395 (MAX)
0.375 (MIN)
0.004
IN/IN
0.080
0.10 R +0.00
-0.06
90 o
±5 o
0.310 (MIN)
0.040 ± 0.002 DIA (TYP)
(24 PLS)
0.150
(REF)
0.150
2.600
NOTES:
1. Pin 1 is marked on lid. All other pin numbers are for reference only and do not appear on package.
2. Tolerance, unless otherwise specified: X.XXX = ± 0.005, X.XX = ± 0.01.
3. All dimensions are in inches, unless otherwise specified.
FIGURE 15A. CASE OUTLINE X
10
2.300
0.120
2.060
0.125 ( 4 PLS)
0.250
1.800
0.300
(3 PLS)
1
26
10 EQ. SP.@
0.200 = 2.00
( TOL. NONCUM.)
12 EQ. SP. @
0.200 = 2.400
( TOl. NONCUM.)
3.000 ± 0.010
2.750
16
0.200
(TYP)
13
SEE NOTE 1
DIA
0.128 +0.002
-0.005
0.10 R (TYP)
( 4 PLS)
(4 HOLES)
2.300 (REF)
0.035
(REF)
2.230 ± 0.010
0.040 ± 0.002 DIA (TYP)
(24 PLS)
o
90
±5 o
+0.00
0.10 R – 0.06
0.040 (MAX)
(24 PLS)
0.830 (MIN)
0.400 (MAX)
0.375 (MIN)
0.004
IN/IN
0.050 DIA (TYP)
(24 PLS)
0.125 (TYP)
0.080
NOTES:
1. Pin 1 is marked on lid. All other pin numbers are for reference only and do not appear on package.
2. Tolerance, unless otherwise specified: X.XXX = ± 0.005, X.XX = ±0.01.
3. All dimensions are in inches unless otherwise specified.
4. Material:
Frame: Stainless Steel 304
Base: Glid Copper
Lead: OFHC Copper
Cover: Stainless Steel 304
FIGURE 15B. CASE OUTLINE Y
11
2.300
2.060
0.120
0.250
1.800
0.125 (4 PLS)
0.300
(3 PLS)
1
3.000 ± 0.010
26
10 EQ. SP.@
0.200 = 2.00
(TOL. NONCUM.)
12 EQ. SP.@
0.200 = 2.400
(TOL. NONCUM.)
2.750
16
0.200 (TYP)
13
SEE NOTE 1
+0.002
0.128 -0.005 DIA
(4 HOLES)
0.10 R (4 PLS)
(TYP)
0.880 (MIN)
( 2 PLS)
0.050 DIA (TYP)
( 24 PLS)
0.400 (MAX) (24 PLS)
0.400 (MAX)
0.375 (MIN)
0.004
IN/IN
0.080
0.040 ± 0.002 DIA (TYP)
(24 PLS)
NOTES:
1. Pin 1 is marked on lid. All other pin numbers are for reference only and do not appear on package.
2. Tolerance, unless otherwise specified: X.XXX = ±0.005, X.XX = ±0.01
3. All dimensions are in inches, unless otherwise specified.
4. Material:
Frame: Stainless Steel 304
Base:
Glid Copper
Lead:
OFHC Copper
Cover: Stainless Steel 304
FIGURE 15C.CASE OUTLINE Z
12
0.125
(TYP)
MOUNTING
The package bolts to part of the chassis or even the motor assembly itself, depending on system requirements. In applications where
this isn’t convenient, the hybrid can be mounted to its own heatsink. The heat transfer in a hybrid is from semiconductor junction to
the bottom of the hybrid case. The flatness and maximum temperature of this mounting surface are critical to proper performance and
reliability, because this is the only method of dissipating the power created in the hybrid. Use a mounting surface flatness of 0.004
inches/inch maximum. This interface can be improved with the use of a thermal compound or pad. The heatsink should be designed
to insure that the temperature does not exceed +125°C.
TABLE 3. INPUT-OUTPUT TRUTH TABLE
INPUTS
UPPERS
OUTPUTS
LOWERS
CONTROL
VUA
VUB
VUC
VLA
VLB
VLC
Vsd
VOA
VOB
VOC
1
0
0
0
1
0
0
H
L
Z
1
0
0
0
0
1
0
H
Z
L
0
1
0
0
0
1
0
Z
H
L
0
1
0
1
0
0
0
L
H
Z
0
0
1
1
0
0
0
L
Z
H
0
0
1
0
1
0
0
Z
L
H
0
0
1
1
1
0
0
L
L
H
0
1
0
1
0
1
0
L
H
L
0
1
1
1
0
0
0
L
H
H
1
0
0
0
1
1
0
H
L
L
1
0
1
0
1
0
0
H
L
H
1
1
0
0
0
1
0
H
H
L
0
0
0
0
0
0
0
Z
Z
Z
0
0
0
1
1
1
0
L
L
L
1
1
1
0
0
0
0
H
H
H
X
X
X
X
X
X
1
Z
Z
Z
H=Vcc, L=RETURN, X=IRERELEVENT, Z=HIGH IMPEDENCE (OFF)
TABLE 4. PIN ASSIGNMENTS
PIN
FUNCTION
PIN
FUNCTION
1
VSSC
26
GND
2
VOC
25
VUC
3
VCC
24
VLC
4
N/C
23
Vsd
5
VSSB
22
GND
6
VOB
21
VUB
7
VCC
20
VLB
8
VSSA
19
GND
9
VOA
18
VUA
10
N/C
17
VLA
11
VCC
16
VLPI
12
VB
15
NO PIN
13
VZ
14
NO PIN
NOTE: Pins 3, 7 and 11 are internally connected.
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ORDERING INFORMATION
PWR-82332-XX0
Reliability Grade:*
0=Standard DDC Procedures
1=B-Level, Military processing available
2=B-level, Military procedures available
but without QCI testing
Temperature Range:
1=-55 to +125°C
3= 0 to +70°C
* For space flight hardware, please refer to NASA Drawing
#SSQ 22691 and consult our factory.
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NOTES
15
The information provided in this data sheet is believed to be accurate; however, no responsibility
is assumed by Data Device Corporation for its use, and no license or rights
are granted by implication or otherwise in connection therewith.
Specifications are subject to change without notice.
105 Wilbur Place, Bohemia, New York 11716-2482
For Technical Support - 1-800-DDC-5757 ext. 7420
Headquarters - Tel: (631) 567-5600 ext. 7420, Fax: (631) 567-7358
Southeast - Tel: (703) 450-7900, Fax: (703) 450-6610
West Coast - Tel: (714) 895-9777, Fax: (714) 895-4988
Europe - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264
Asia/Pacific - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689
World Wide Web - http://www.ddc-web.com
ILC DATA DEVICE CORPORATION
REGISTERED TO ISO 9001
FILE NO. A5976
H-06/99-500
PRINTED IN THE U.S.A.
16