Page No. : 1/8 RS6501 150KHz, 40V, 2A PWM Buck DC/DC Converter General Description The RS6501 is Monolithic IC that design for a step‐down DC/DC Converter, and own the ability of driving a 2A load without additional transistor component. The output version included 3.3V, 5V, 12V and an adjustable type. It operates at a switching frequency of 150KHz thus allowing smaller sized filter components than what would be needed with lower frequency switching regulators. Other features include a guaranteed ±4% tolerance on output voltage under specified input voltage and output load conditions, and ±15% on the oscillator frequency. Regarding protected function, thermal shutdown is to prevent over temperature operating from damage, and current limit is against over current operating of the output switch. Features Applications ● ● ● ● ● ● ● ● ● ● ● Simple High‐efficiency step‐down regulator 3.3V, 5V, 12V and adjustable ● Positive to negative converter Adjustable version output voltage range: 1.23‐37V ● On‐card switching regulators ±4% max over line and load conditions 150KHz ±15% fixed switching frequency TTL shutdown capability Operating voltage can be up to 40V Output load current: 2A SOP‐8 package Low power standby mode Thermal‐shunt down and current‐limit protection ● Built‐in switching a transistor on chip, requires only 4 external components Application Circuits +5.0V 1 33uH 2 D1 0.1uF C3 1000pF + C5 2 C4 2 10 1 1 R1 2 RS6501-ADS L1 2 2 1K(0805) GND GND GND GND 1 220uF/25V R2 VIN Output FB SD 8 7 6 5 1 21 C2 3.1K(0805) U1 DS-SS33 2 1 + 2 0.1uF 2 C1 220uF/25V 1 R1 1 2 3 4 1 1 VCC_INPUT Adjustable Output Voltage Version This integrated circuit can be damaged by ESD. Orister Corporation recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DS‐RS6501‐06 September, 2010 www.Orister.com Page No. : 2/8 Pin Assignments SOP‐8(EP) PACKAGE SOP‐8(EP) PIN 1 2 3 4 5, 6, 7, 8 ,9 SYMBOL VIN VOUT FB SD GND DESCRIPTION Regulator Input Pin Regulator Output Pin Output Voltage Feed Back Control Pin ON/OFF Shutdown Pin Ground Pin Ordering Information DEVICE DEVICE CODE XX is nominal output voltage (for example, AD=ADJ, 33 = 3.3V, 50 = 5.0V, 12 = 12V). Y is package designator : SE : SOP‐8(EP) Z is Lead Free designator : P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) RS6501‐XX YY Z Block Diagram SD VIN + Current Source Bias 1.235V Reference 2.5V Regulator Start Up 200mV + 220mV R + COMP Current Limit FB R2 + AMP - R1=2.5K + COMP - DS‐RS6501‐06 September, 2010 COMP + COMP + 3A Switch Driver 150KHz OSC. Thermal Limit Output GND www.Orister.com Page No. : 3/8 Absolute Maximum Ratings (Note1) Parameter Supply Voltage On/Off Pin Input Voltage Feedback Pin Voltage Output Voltage to Ground Power Dissipation Operating Temperature Storage Temperature Operating Junction Temperature Range Operating Voltage Symbol VCC VSD VFB VOUT PD Topr Tstg TJ VOP Value 40 ‐0.3~+25 ‐0.3~+25 ‐1 Internally Limited 0~+70 ‐65~+150 ‐40~+125 +4.5~+40 Unit V V V V W o C o C o C V Electrical Characteristics (Continued) Specifications with boldface type apply over for full operating temperature range, the other type are for TJ=25oC(Note 2) Part No. Parameter Symbol Conditions Min. Typ. Max. Output Voltage VOUT 5V≤VIN≤40V, 0.2A≤ILOAD≤2A 3.135 3.3 3.465 RS6501‐3.3V Efficiency VIN =12V, ILOAD=2A ‐ 72 ‐ η Output Voltage VOUT 7V≤VIN≤40V, 0.2A≤ILOAD≤2A 4.750 5.0 5.250 RS6501‐5.0V Efficiency VIN=12V, ILOAD=2A ‐ 79 ‐ η Output Voltage VOUT 15V≤VIN≤40V, 0.2A≤ILOAD≤2A 11.40 12.0 12.60 RS6501‐12V Efficiency VIN=25V, ILOAD=2A ‐ 90 ‐ η 4.5V≤VIN≤40V, 0.2A≤ILOAD≤2A 1.193 1.230 1.280 Reference Voltage VFB VOUT programmed for 3V RS6501‐ADJ Efficiency VIN=12V, ILOAD=2A ‐ 72 ‐ η Unit V % V % V % V % All Output Voltage Versions Electrical Characteristics Specifications with boldface type apply over for full operating temperature range, the other type are for TJ=25oC (Unless otherwise specified, VIN=12V for the 3.3V, 5V, and adjustable version and VIN=24V for the 12V version, ILOAD=500mA) Parameter Symbol Feedback Bias Current Ib Adjustable Version Only, VFB=1.3V Oscillator Frequency fO (Note 5) Saturation Voltage VSAT IOUT=2A (Note 6,7) Max. Duty Cycle (ON) Min. Duty Cycle (OFF) DC Current Limit ICL Output Leakage Current Quiescent Current Standby Quiescent Current Thermal Resistance Test Condition Device Parameters Min. Typ. ‐ 40 127 110 Max. 50 100 173 173 1.4 1.5 150 Unit nA KHz V ‐ 1.16 ‐ 100 0 ‐ % Peak Current (Note 6,7) ‐ 3.6 ‐ A IL IQ Output=0V (Note 6,8) (Note 8) ‐ ‐ ‐ 5 ISTBY ON/OFF pin=5V (Note 9) ‐ 85 ‐ 15 θJC θJA (Note 10) (Note 7) (Note 8) SOP‐8 SOP‐8 Junction to Case Junction to ambient ‐ 70 50 30 200 300 uA mA uA ‐ o C/W ‐ o C/W ON/OFF Control ON/OFF Pin Logic Input Threshold Voltage ON/OFF Pin Input Current VIH Low (Regulator ON) ‐ VIL IIH IIL High (Regulator OFF) VLOGIC=2.5V (Regulator OFF) VLOGIC=0.5V (Regulator ON) 2.0 ‐ ‐ 1.4 6 0.02 0.6 ‐ 15 5 V uA DS‐RS6501‐06 September, 2010 www.Orister.com Page No. : 4/8 NOTE: 1. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. 2. External components such as the catch diode, inductor, input and output capacitors, and voltage programming resistors can affect switching regulator system performance. 3. Typical numbers are at 25 oC and represent the most likely norm. 4. All limits guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature limits are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). 5. The switching frequency is reduced when the second stage current limit is activated. 6. No diode, inductor or capacitor connected to output pin. 7. Feedback pin removed from output and connected to 0V to force the output transistor switch ON. 8. Feedback pin removed from output and connected to 12V for the 3.3V, 5V, ADJ. version, and 15V for the 12V version, to force the output transistor switch OFF. 9. VIN=40V. 10. Junction to ambient thermal resistance. (With copper area of approximately 3in2) DS‐RS6501‐06 September, 2010 www.Orister.com Page No. : 5/8 Characteristics Curve Normalized Output Voltage Shutdown Quiescent Current 160 1.5 VIN=12V 140 ILOAD=200mA 120 0.5 Current (uA) Output Voltage Change (%).. 1 0 100 VON/VOFF=5V 80 TJ=25oC 60 -0.5 40 -1 20 -1.5 0 25 50 75 100 125 150 0 175 0 o 10 20 30 Supply Voltage (V) Junction Temperature ( C) 40 Switch Saturation Voltage Switch Current Limit 1.30 6.00 VIN=12V TJ=25oC 1.20 5.80 Saturation Voltage (V) Switch Current Limit (A) 5.90 5.70 5.60 VIN=12V 5.50 VOUT =5V 5.40 1.10 1.00 0.90 5.30 0.80 5.20 0 25 50 75 100 125 o 0 150 12 10 Vin=22V Current (uA) Tj=25℃ 6 4 2 0 0 5 10 15 20 2 3 4 On/Off Pin Current (Sinking) 8 1 Switch Current (A) Junction Temperature ( C) 25 30 On/Off Pin Voltage (V) DS‐RS6501‐06 September, 2010 www.Orister.com Page No. : 6/8 SOP‐8/EP Dimension NOTES: A. All linear dimensions are in millimeters (inches). B. This drawing is subject to change without notice. C. Body length does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.006 (0.15) per end. D. Body width dimension does not include inter‐lead flash or protrusions. Inter‐lead flash and protrusions shall not exceed 0.010 (0.25) per side. E. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the cross‐hatched area. F. Lead dimension is the length of terminal for soldering to a substrate. G. The lead width, as measured 0.014 (0.36) or greater above the seating plane, shall not exceed a maximum value of 0.024 (0.61). H. Lead to lead coplanarity shall be less than 0.004 (0.10) form Seating Plane. I. Falls within JEDEC MS‐012 variation AA. DS‐RS6501‐06 September, 2010 www.Orister.com Page No. : 7/8 Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface‐mount devices Figure 1: Temperature profile tP Critical Zone TL to TP TP Ramp-up TL tL Temperature Tsmax Tsmin tS Preheat 25 Ramp-down t 25oC to Peak Time Profile Feature Average ramp‐up rate (TL to TP) Sn‐Pb Eutectic Assembly o <3 C/sec Pb‐Free Assembly <3oC/sec ‐ Temperature Min (Tsmin) 100oC 150oC ‐ Temperature Max (Tsmax) 150oC 200oC 60~120 sec 60~180 sec Preheat ‐ Time (min to max) (ts) Tsmax to TL ‐ Ramp‐up Rate o <3 C/sec <3 C/sec Time maintained above: ‐ Temperature (TL) ‐ Time (tL) o 217oC 183 C 60~150 sec Peak Temperature (TP) Time within 5oC of actual Peak Temperature (tP) Ramp‐down Rate Time 25oC to Peak Temperature o o o 60~150 sec 240 C +0/‐5 C 260oC +0/‐5oC 10~30 sec 20~40 sec <6oC/sec <6oC/sec <6 minutes <8 minutes Peak temperature Dipping time 3. Flow (wave) soldering (solder dipping) Products Pb devices. Pb‐Free devices. o o 245 C ±5 C o o 260 C +0/‐5 C 5sec ±1sec 5sec ±1sec DS‐RS6501‐06 September, 2010 www.Orister.com Page No. : 8/8 Important Notice: © Orister Corporation Orister cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an Orister product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. Orister reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in Orister’s terms and conditions of sale, Orister assumes no liability whatsoever, and Orister disclaims any express or implied warranty relating to the sale and/or use of Orister products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent Orister deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. Orister and the Orister logo are trademarks of Orister Corporation. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. DS‐RS6501‐06 September, 2010 www.Orister.com