SEMTECH SC4211

SC4211
Very Low Input /Very Low Dropout
1 Amp Regulator With Enable
POWER MANAGEMENT
Description
Features
The SC4211 is a high performance positive voltage
regulator designed for use in applications requiring very
low Input voltage and very low dropout voltage at up to
1 amperes. It operates with a Vin as low as 1.4V, with
output voltage programmable as low as 0.5V. The
SC4211 features ultra low dropout, ideal for applications
where Vout is very close to Vin. Additionally, the SC4211
has an enable pin to further reduce power dissipation
while shutdown. The SC4211 provides excellent regulation over variations in line, load and temperature.
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Applications
The SC4211 is available in the SOIC-8-EDP (Exposed Die
Pad) package. Depending on how the FB pin is configured, the output voltage can be either externally adjusted
or fixed to either 0.5V or 1V.
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Typical Application Circuits
SC4211
4
3
VIN
2
1
Telecom/Networking cards
Motherboards/Peripheral cards
Industrial Applications
Wireless infrastructure
Set top boxes
Medical equipment
Notebook computers
Battery powered systems
5
NC
NC
ENABLE
Input Voltage as low as 1.4V
400mV dropout @ 1A
Adjustable output from 0.5V
Over current and over temperature protection
Enable pin
10µA quiescent current in shutdown
Full industrial temperature range
Available in SOIC-8-EDP Lead-free package, fully
WEEE and RoHS compliant
VO
VIN
EN
FB
NC
GND
6
VO
7
VO
0.5 (R1 + R2)
R2
R1
8
U1
C1
=
Volts
C2
R2
SC4211
4
3
VIN
2
ENABLE
1
VO
VIN
EN
FB
NC
GND
C1
Revision: November 06, 2008
SC4211
5
4
NC
NC
U1
6
3
VIN
VO = 0.5V
7
2
ENABLE
1
8
C1
C2
1
5
NC
NC
VIN
VO
EN
FB
NC
GND
U1
6
VO = 1V
7
8
C2
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SC4211
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in
the Electrical Characteristics section is not implied.
Parameter
Symbol
Max
Units
7
V
PD
Internally Limited
W
θJA
36
°C/W
θJC
5.5
°C/W
Operating Ambient Temperature Range
TA
-40 to +85
°C
Operating Junction Temperature Range
TJ
-40 to +125
°C
TSTG
-65 to +150
°C
TP
260
°C
V ESD
2
kV
Vin, EN, Vo, FB to GND
Power Dissipation
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
(1)
(1)
Storage Temperature Range
Peak IR Reflow Temperature (10s to 30s)
ESD Rating (Human Body Model) (2)
Notes:
(1) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per
JESD51 standards,
(2) Tested according to JEDEC standard JESD22-A114-B.
Electrical Characteristics
Unless specified: VEN = VIN, VFB = VO, VIN = 1.40V to 6.0V, IO = 10µA to 1A.
Values in bold apply over the full operating temperature range.
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
6.0
V
3
mA
10
50
µA
VO
+2%
V
VIN
Supply Voltage Range
VIN
Quiescent Current
IQ
1.40
VIN = 3.3V, IO = 0A
VIN = 6.0V, VEN = 0V
VO
Output Voltage(1)
VO
(Fixed Voltage, VFB = 0)
VIN = VO + 0.5V, IO = 10mA
-2%
1.40V ≤ VIN ≤ 6.0V, IO = 10mA
-3%
+3%
Line Regulation(1)
REG(LINE)
IO = 10mA
0.2
0.4
%/V
Load Regulation(1)
REG(LOAD)
IO = 10mA to 1A
0.5
1.5
%/V
V DO
IO = 500mA
100
250
mV
Dropout Voltage(1)(2)
300
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SC4211
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VEN = VIN, VFB = VO, VIN = 1.40V to 6.0V, IO = 10µA to 1A.
Values in bold apply over the full operating temperature range.
Parameter
Symbol
Test Conditions
VDO
IO = 1A
Minimum Load Current(3)
IO
VIN = VO + 0.5V
Current Limit(4)
ICL
Min
Typ
Max
200
400
Units
VO (Cont.)
Dropout Voltage(1)(2)
500
mV
10
µA
1.1
1.5
2.0
A
VIN = 3.3V, VFB = VOUT, IO = 10mA
0.495
0.5
0.505
V
Full IOUT , and VIN Range
0.490
F eed b ack
Reference Voltage(1)
Feedback Pin Current(4)
Feedback Pin Threshold (5)
VREF
IADJ
VFB = VREF
VTH(FB)
0.05
0.510
80
200
nA
0.16
0.40
V
1.5
10
µA
EN
Enable Pin Current
IEN
VEN = 0V, VIN = 3.3V
Enable Pin Threshold
VIH
VIN = 3.3V
VIL
VIN = 3.3V
1.6
V
0.4
Over Temperature Protection
High Trip level
Hysteresis
Notes:
(1)
(2)
(3)
(4)
(5)
THI
160
°C
THYST
10
°C
Low duty cycle pulse testing with Kelvin connections required.
VDO = VIN -VO when VO decreases by 1.5% of its nominal output voltage with VIN = VO +0.8V.
Required to maintain regulation. Voltage set resistors R1 and R2 are usually utilized to meet this requirement.
Guaranteed by design.
When VFB exceeds this threshold, the “Sense Select” switch disconnects the internal feedback chain from the error
amplifier and connects VFB instead.
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SC4211
POWER MANAGEMENT
Ordering Information
Part Number
P ackag e
Temp. Range (TJ)
SC4211STRT(1)(2)
SOIC-8-EDP
-40 to +125 OC
SC4211EVB
Evaluation Board
Notes:
(1) Only available in tape and reel packaging. A reel contains 2500 devices.
(2) Lead-free product. This product is fully WEEE and RoHS
compliant.
Pin Configuration
Top View
Bottom View
GND
NC
GND
GND
8
EN
FB
FB
7
VIN
VO
VO
6
NC
NC
NC
5
SOIC-8-EDP-2
Exposed
Die Pad
1
NC
2
EN
3
VIN
4
NC
SOIC-8-EDP-2
Pin Descriptions
Pin #
Pin Name Pin Desciption
2
EN
Enable Input. Pulling this pin below 0.4V turns the regulator off, reducing the quiescent current to a
fraction of its operating value. The device will be enabled if this pin is left open. Connect to VIN if not
being used.
3
VIN
Input voltage. For regulation at full load, the input to this pin must be between (VO+ 0.5V) and 5.5V.
Minimum VIN = 1.4V. A large bulk capacitance should be placed closely to this pin to ensure that the
input supply does not sag below 1.4V. Also a minimum of 4.7uF ceramic capacitor should be placed
directly at this pin.
6
VO
The pin is the power output of the device. A minimum of 10uF capacitor should be placed directly at
this pin.
7
FB
When this pin is grounded, an internal resistor divider sets the output voltage to 1.0V. If connected
to the Vo pin, the output voltage will be set at 0.5V. If external feedback resistors are used, the output
voltage will be (See Application Circuits on page 1):
0.5 (R1 + R2)
VO =
Volts
R2
8
GND
Reference ground. The GND pin and the exposed die pad must be connected together at the IC pin.
1,4,5
NC
No Connection.
THERMAL Pad for heatsinking purposes. Connect to ground plane using multiple vias. Not electrically connected
PAD
internally.
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SC4211
POWER MANAGEMENT
Block Diagram
FB
1.5uA
0.5
V
8V
REF
Marking Information
Top View
SC4211
yyww
xxxxx
yyww = Datecode (Example: 0015)
xxxxx = Semtech Lot No. (Example: 00101)
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SC4211
POWER MANAGEMENT
Typical Characteristics
Region of Instability
Stable Region
Region of Instability
Region of Instability
Stable Region
Region of Instability
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SC4211
POWER MANAGEMENT
Applications Information
Introduction
Enable: Pulling this pin below 0.4V turns the regulator
off, reducing the quiescent current to a fraction of its
operating value. A pull up resistor up to 400kOhms should
be connected from this pin to the VIN pin in application
where supply voltages of Vin < 1.9V is required. For applications with higher voltages than 1.9V, EN pin could
be left open or connected to VIN.
The SC4211 is intended for applications where high current capability and very low dropout voltage are required.
It provides a very simple, low cost solution that uses very
little PCB real estate. Additional features include an enable pin to allow for a very low power consumption standby
mode, and a fully adjustable output.
Thermal Considerations
Component Selection
The power dissipation in the SC4211 is approximately
equal to the product of the output current and the input
to output voltage differential:
Input capacitor: A large bulk capacitance of about
≥ 10uF/A (output load) should be closely placed to the
input supply pin of the SC4211 to ensure that Vin does
not sag below 1.4V. Also a minimum of 4.7µF ceramic
capacitor is recommended to be placed directly next to
the Vin pin. This allows for the device being some distance from any bulk capacitance on the rail. Additionally,
input droop due to load transients is reduced, improving
load transient response. Additional capacitance may be
added if required by the application.
PD ≈ (VIN − VOUT
)• I O
The absolute worst-case dissipation is given by:
PD(MAX) = (VIN
(MAX)
− VOUT
(MIN)
)• I
O(MAX)
+ VIN
(MAX)
• I Q(MAX)
For a typical scenario, VIN = 3.3V ± 5%, VOUT = 2.8V and
IO = 1A, therefore:
Output capacitor: A minimum bulk capacitance of
≥ 10µF/A (output load), along with a 0.1µF ceramic decoupling capacitor is recommended. Increasing the bulk
capacitance will improve the overall transient response.
The use of multiple lower value ceramic capacitors in
parallel to achieve the desired bulk capacitance will not
cause stability issues. Although designed for use with ceramic output capacitors, the SC4211 is extremely tolerant of output capacitor ESR values and thus will also
work comfortably with tantalum output capacitors.
VIN(MAX) = 3.465V, VOUT(MIN) = 2.744V and IQ(MAX) = 1.75mA,
Thus PD(MAX) = .722W.
Using this figure, and assuming TA(MAX) = 70°C, we can calculate the maximum thermal impedance allowable to maintain TJ ≤ 150°C:
R TH(J−A)(MAX) =
Noise immunity: In very electrically noisy environments,
it is recommended that 0.1µF ceramic capacitors be
placed from IN to GND and OUT to GND as close to the
device pins as possible.
(T
J(MAX)
− TA(MAX) )
PD(MAX)
=
(150 − 70) = 110°C/W
.722
This should be achievable for the SOIC-8-EDP package
using PCB copper area to aid in conducting the heat away,
such as one square inch of copper connected to the ground
pins of the device. Internal ground/power planes and air
flow will also assist in removing heat. For higher ambient
temperatures it may be necessary to use additional copper area.
Internal voltage selection: By connecting the FB pin to
GND, an internal resistor divider will regulate the output
voltage to 1.0V. If the FB pin is connected directly to the
VO pin, the output voltage will be regulated to the 0.5V
internal reference.
External voltage selection resistors: The use of 1%
resistors, and designing for a current flow ≥ 10µA is
recommended to ensure a well regulated output (thus
R2 ≤ 50kΩ).
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SC4211
POWER MANAGEMENT
Outline Drawing - SOIC-8-EDP
A
D
e
N
DIM
2X E/2
E1 E
1
2
ccc C
2X N/2 TIPS
e/2
B
D
aaa C
SEATING
PLANE
A2 A
C
A1
bxN
bbb
DIMENSIONS
INCHES
MILLIMETERS
MIN NOM MAX MIN NOM MAX
A
A1
A2
b
c
D
E1
E
e
F
H
h
L
L1
N
01
aaa
bbb
ccc
.069
.053
.005
.000
.065
.049
.020
.012
.010
.007
.189 .193 .197
.150 .154 .157
.236 BSC
.050 BSC
.116 .120 .130
.085 .095 .099
.010
.020
.016 .028 .041
(.041)
8
8°
0°
.004
.010
.008
C A-B D
1.75
1.35
0.13
0.00
1.65
1.25
0.51
0.31
0.25
0.17
4.80 4.90 5.00
3.80 3.90 4.00
6.00 BSC
1.27 BSC
2.95 3.05 3.30
2.15 2.41 2.51
0.25
0.50
0.40 0.72 1.04
(1.05)
8
0°
8°
0.10
0.25
0.20
h
F
EXPOSED PAD
h
H
H
c
GAGE
PLANE
0.25
SEE DETAIL
L
(L1)
A
DETAIL
01
A
SIDE VIEW
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MS-012, VARIATION BA.
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SC4211
POWER MANAGEMENT
Land Pattern - SOIC-8-EDP
E
SOLDER MASK
D
DIM
(C)
F
G
C
D
E
F
G
P
X
Y
Z
Z
Y
THERMAL VIA
Ø 0.36mm
P
X
DIMENSIONS
INCHES
MILLIMETERS
(.205)
.134
.201
.101
.118
.050
.024
.087
.291
(5.20)
3.40
5.10
2.56
3.00
1.27
0.60
2.20
7.40
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 300A.
3.
THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
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