TI SN54AS804BJ

SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B
HEX 2-INPUT NAND DRIVERS
SDAS022C – DECEMBER 1982 – REVISED JANUARY 1995
SN54ALS804A, SN54AS804B . . . J PACKAGE
SN74ALS804A, SN74AS804B . . . DW OR N PACKAGE
(TOP VIEW)
High Capacitive-Drive Capability
′ALS804A Has Typical Delay Time of 4 ns
(CL = 50 pF) and Typical Power Dissipation
of 3.4 mW Per Gate
′AS804B Has Typical Delay Time of 2.6 ns
(CL = 50 pF) and Typical Power Dissipation
of Less Than 9 mW Per Gate
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
•
•
1A
1B
1Y
2A
2B
2Y
3A
3B
3Y
GND
description
These devices contain six independent 2-input
NAND drivers. They perform the Boolean
functions Y = A • B or Y = A + B in positive logic.
OUTPUT
Y
H
H
L
L
X
H
X
L
H
logic symbol†
1A
1B
2A
2B
3A
3B
4A
4B
5A
5B
6A
6B
1
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
6B
6A
6Y
5B
5A
5Y
4B
4A
4Y
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6A
6Y
5B
5A
5Y
3Y
GND
4Y
4A
4B
B
2
1Y
1B
1A
VCC
2A
2B
2Y
3A
3B
FUNCTION TABLE
(each driver)
INPUTS
20
SN54ALS804A, SN54AS804B . . . FK PACKAGE
(TOP VIEW)
The SN54ALS804A and SN54AS804B are
characterized for operation over the full military
temperature range of – 55°C to 125°C. The
SN74ALS804A
and
SN74AS804B
are
characterized for operation from 0°C to 70°C.
A
1
6B
•
•
logic diagram (positive logic)
&
3
2
4
1Y
1B
6
5
2Y
9
3Y
11
4Y
15
16
4A
4B
14
5Y
18
19
3A
3B
12
13
2A
2B
7
8
1A
17
5A
5B
6Y
6A
6B
1
2
3
1Y
4
5
6
2Y
7
8
9
3Y
12
13
11
4Y
15
16
14
5Y
18
19
17
6Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Copyright  1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B
HEX 2-INPUT NAND DRIVERS
SDAS022C – DECEMBER 1982 – REVISED JANUARY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS804A . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS804A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS804A
SN74ALS804A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.7
0.8
V
High-level output current
– 12
– 15
mA
IOL
TA
Low-level output current
12
24
mA
70
°C
High-level input voltage
2
Operating free-air temperature
2
– 55
125
V
V
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = –18 mA
IOH = – 0.4 mA
VCC = 4.5 V
IOH = – 3 mA
IOH = – 12 mA
VOL
VCC = 4
4.5
5V
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
IIL
IO§
VCC = 5.5 V,
VCC = 5.5 V,
ICCH
ICCL
VCC = 5.5 V,
VCC = 5.5 V,
SN54ALS804A
TYP‡
MAX
MIN
–1.2
VCC – 2
2.4
–1.2
VCC – 2
2.4
3.2
3.2
UNIT
V
V
2
IOH = – 15 mA
IOL = 12 mA
2
0.25
IOL = 24 mA
VI = 7 V
VI = 2.7 V
VI = 0.4 V
VO = 2.25 V
VI = 0
SN74ALS804A
TYP‡
MAX
MIN
0.4
0.25
0.4
0.35
0.5
0.1
0.1
mA
20
20
µA
– 0.1
– 20
– 112
– 30
– 0.1
mA
– 112
mA
mA
0.9
2.5
0.9
2.5
7
12
7
12
mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
2
VI = 4.5 V
V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B
HEX 2-INPUT NAND DRIVERS
SDAS022C – DECEMBER 1982 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX†
SN54ALS804A SN74ALS804A
TO
(OUTPUT)
A or B
MIN
MAX
MIN
MAX
2
9
2
7
2
9
2
8
Y
UNIT
ns
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54AS804B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74AS804B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions§
SN54AS804B
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
High-level input voltage
SN74AS804B
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
2
High-level output current
IOL
Low-level output current
TA
Operating free-air temperature
– 55
§ These high sink- or source-current devices are not recommended for use above 40 MHz.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2
UNIT
V
V
0.8
0.8
V
– 40
– 48
mA
40
48
mA
70
°C
125
0
3
SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B
HEX 2-INPUT NAND DRIVERS
SDAS022C – DECEMBER 1982 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
SN54AS804B
TYP†
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = –18 mA
IOH = – 2 mA
VCC = 4.5 V
IOH = – 3 mA
IOH = – 40 mA
VOL
VCC = 4
4.5
5V
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
IIL
IO‡
VCC = 5.5 V,
VCC = 5.5 V,
ICCH
ICCL
VCC = 5.5 V,
VCC = 5.5 V,
MIN
SN74AS804B
TYP†
MAX
MIN
–1.2
VCC – 2
2.4
–1.2
VCC – 2
2.4
3.2
3.2
V
V
2
IOH = – 48 mA
IOL = 40 mA
UNIT
2
0.25
IOL = 48 mA
VI = 7 V
0.5
0.35
VI = 2.7 V
VI = 0.4 V
0.5
0.1
0.1
mA
20
20
µA
– 0.5
VO = 2.25 V
VI = 0
– 50
VI = 4.5 V
V
– 200
– 50
– 0.5
mA
– 200
mA
mA
3.5
5
3.5
5
16
27
16
27
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX§
SN54AS804B
tPLH
tPHL
A or B
Y
SN74AS804B
MIN
MAX
MIN
MAX
1
5
1
4
1
5
1
4
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
ns
SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B
HEX 2-INPUT NAND DRIVERS
SDAS022C – DECEMBER 1982 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
RL = R1 = R2
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
Data
Input
tw
th
tsu
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
www.ti.com
14-Nov-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
5962-87766012A
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
5962-8776601RA
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
5962-8776601SA
ACTIVE
CFP
W
20
1
TBD
Call TI
Level-NC-NC-NC
5962-88693012A
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
5962-8869301RA
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SN54ALS804AJ
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SN54AS804BJ
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SN74ALS804ADW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS804ADWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS804ADWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS804ADWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS804AN
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74ALS804ANE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74AS804BDW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS804BDWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS804BDWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS804BDWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS804BN
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74AS804BNE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SNJ54ALS804AFK
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54ALS804AJ
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54AS804BFK
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54AS804BJ
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54AS804BW
ACTIVE
CFP
W
20
1
TBD
Call TI
Level-NC-NC-NC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
14-Nov-2005
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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