SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
D Members of the Texas Instruments
D
D
D
D
SN54CBT16212A . . . WD PACKAGE
SN74CBT16212A . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
Widebus Family
5-Ω Switch Connection Between Two Ports
TTL-Compatible Input Levels
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 200-V Machine Model (A115-A)
S0
1A1
1A2
2A1
2A2
3A1
3A2
GND
4A1
4A2
5A1
5A2
6A1
6A2
7A1
7A2
VCC
8A1
GND
8A2
9A1
9A2
10A1
10A2
11A1
11A2
12A1
12A2
description/ordering information
The ’CBT16212A devices provide 24 bits of
high-speed TTL-compatible bus switching or
exchanging. The low on-state resistance of the
switch allows connections to be made with
minimal propagation delay.
Each device operates as a 24-bit bus switch or a
12-bit bus exchanger that provides data
exchanging between the four signal ports via the
data-select (S0, S1, S2) terminals.
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
S1
S2
1B1
1B2
2B1
2B2
3B1
GND
3B2
4B1
4B2
5B1
5B2
6B1
6B2
7B1
7B2
8B1
GND
8B2
9B1
9B2
10B1
10B2
11B1
11B2
12B1
12B2
ORDERING INFORMATION
TOP-SIDE
MARKING
Tube
SN74CBT16212ADL
Tape and reel
SN74CBT16212ADLR
TSSOP − DGG
Tape and reel
SN74CBT16212ADGGR
CBT16212A
TVSOP − DGV
Tape and reel
SN74CBT16212ADGVR
CY212A
SSOP − DL
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
VFBGA − GQL
CBT16212A
SN74CBT16212AGQLR
VFBGA − ZQL (Pb-free)
Tape and reel
SN74CBT16212AZQLR
CY212A
−55°C to 125°C
CFP − WD
Tube
SNJ54CBT16212AWD
SNJ54CBT16212AWD
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright 2005, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1 "** (""!'#'$,
(+&%#$ %!(*"# # 23454 "** (""!'#'$ "' #'$#'+
&*'$$ #-'/$' #'+, "** #-' (+&%#$ (+&%#
(%'$$1 +'$ # '%'$$"*0 %*&+' #'$#1 "** (""!'#'$,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
GQL OR ZQL PACKAGE
(TOP VIEW)
1
2
3
4
5
terminal assignments
6
1
2
3
4
5
6
A
A
1A2
1A1
S0
S1
S2
1B1
B
B
3A1
2A2
2A1
1B2
2B1
2B2
C
C
4A1
GND
3A2
3B1
GND
3B2
D
D
5A2
4A2
5A1
4B2
4B1
5B1
E
6A2
6A1
5B2
6B1
F
7A1
7A2
7B1
6B2
G
GND
GND
7B2
H
VCC
8A2
9A1
9A2
9B2
9B1
8B2
J
10A1
10A2
11A1
11B1
10B2
10B1
K
11A2
12A1
12A2
12B2
12B1
11B2
E
F
G
H
J
8A1
8B1
K
FUNCTION TABLE
INPUTS
2
INPUTS/OUTPUTS
FUNCTION
S2
S1
S0
A1
A2
L
L
L
Z
Z
Disconnect
L
L
H
B1 port
Z
A1 port = B1 port
L
H
L
B2 port
Z
A1 port = B2 port
L
H
H
Z
B1 port
A2 port = B1 port
H
L
L
Z
B2 port
A2 port = B2 port
H
L
H
Z
Z
Disconnect
H
H
L
B1 port
B2 port
A1 port = B1 port
A2 port = B2 port
H
H
H
B2 port
B1 port
A1 port = B2 port
A2 port = B1 port
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
logic diagram (positive logic)
1A1
1A2
12A1
2
54
3
53
1B2
27
30
28
29
12B1
12B2
12A2
S0
1B1
1
56
S1
S2
55
Pin numbers shown are for the DGG, DGV, DL, and WD packages.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56°C/W
GQL/ZQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54CBT16212A
SN74CBT16212A
MIN
MAX
MIN
MAX
5.5
4
5.5
VCC
VIH
Supply voltage
4
High-level control input voltage
2
VIL
TA
Low-level control input voltage
2
−55
125
V
V
0.8
Operating free-air temperature
UNIT
−40
0.8
V
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
II
ICC
∆ICC§
Control inputs
Ci
Control inputs
Cio(off)
SN54CBT16212A
TYP‡
MAX
TEST CONDITIONS
MIN
VCC = 4.5 V,
VCC = 0,
II = −18 mA
VI = 5.5 V
VCC = 5.5 V,
VCC = 5.5 V,
VI = 5.5 V or GND
IO = 0, VI = VCC or GND
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
VI = 3 V or 0
VO = 3 V or 0,
VCC = 4 V,
TYP at VCC = 4 V
ron¶
VCC = 4.5 V
SN74CBT16212A
TYP‡
MAX
MIN
UNIT
−1.2
−1.2
10
10
V
±1
±1
3.2
3
µA
2.5
2.5
mA
A
µA
2.5
2.5
pF
S0, S1, and S2 = GND
7.5
7.5
pF
VI = 2.4 V,
II = 15 mA
14
20
14
20
II = 64 mA
II = 30 mA
4
10
4
7
VI = 0
4
10
4
7
Ω
VI = 2.4 V, II = 15 mA
6
14
6
12
‡ All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
§ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
¶ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN54CBT16212A
FROM
(INPUT)
PARAMETER
TO
(OUTPUT)
SN74CBT16212A
VCC = 4 V
VCC = 5 V
± 0.5 V
VCC = 4 V
VCC = 5 V
± 0.5 V
MIN
MIN
MIN
MIN
MAX
MAX
MAX
tpd†
A or B
B or A
tpd
S
A or B
14
1.5
13
10
ten
tdis
S
A or B
15
1.5
13.7
10.4
S
A or B
14.2
1.5
13.5
9.2
0.8*
UNIT
MAX
0.35
0.25
ns
1.5
9.1
ns
1.5
9.7
ns
1.5
8.8
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
† The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
3V
Output
Control
LOAD CIRCUIT
1.5 V
1.5 V
0V
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
tPLZ
3.5 V
1.5 V
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 7 V
(see Note B)
1.5 V
VOL
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH
VOH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
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5
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9852101QXA
ACTIVE
CFP
WD
56
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74CBT16212ADGVRE4
ACTIVE
TVSOP
DGV
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16212ADGGR
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16212ADGVR
ACTIVE
TVSOP
DGV
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16212ADL
ACTIVE
SSOP
DL
56
20
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16212ADLG4
ACTIVE
SSOP
DL
56
20
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16212ADLR
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16212ADLRG4
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16212AGQLR
NRND
BGA MI
CROSTA
R JUNI
OR
GQL
56
1000
SNPB
Level-1-240C-UNLIM
SN74CBT16212AZQLR
ACTIVE
BGA MI
CROSTA
R JUNI
OR
ZQL
56
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
SNJ54CBT16212AWD
ACTIVE
WD
56
A42 SNPB
N / A for Pkg Type
1
TBD
TBD
TBD
A42 SNPB
MSL Peak Temp (3)
74CBT16212ADGGRE4
CFP
1
Lead/Ball Finish
N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2007
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997
WD (R-GDFP-F**)
CERAMIC DUAL FLATPACK
48 LEADS SHOWN
0.120 (3,05)
0.075 (1,91)
0.009 (0,23)
0.004 (0,10)
1.130 (28,70)
0.870 (22,10)
0.370 (9,40)
0.250 (6,35)
0.390 (9,91)
0.370 (9,40)
0.370 (9,40)
0.250 (6,35)
48
1
0.025 (0,635)
A
0.014 (0,36)
0.008 (0,20)
25
24
NO. OF
LEADS**
48
56
A MAX
0.640
(16,26)
0.740
(18,80)
A MIN
0.610
(15,49)
0.710
(18,03)
4040176 / D 10/97
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only
Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO -146AA
GDFP1-F56 and JEDEC MO -146AB
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MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
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MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
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MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Low Power Wireless
www.ti.com/lpw
Telephony
www.ti.com/telephony
Mailing Address:
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated