SCLS397F − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Typical VOLP (Output Ground Bounce) D D D <0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC, TA = 25°C Ioff Supports Partial-Power-Down-Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) A/B 1A 1B 1Y 2A 2B 2Y GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC G 4A 4B 4Y 3A 3B 3Y SN54LV157A . . . FK PACKAGE (TOP VIEW) 1A A/B NC VCC G D SN54LV157A . . . J OR W PACKAGE SN74LV157A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) description/ordering information The ’LV157A devices are quadruple 2-line to 1-line data selectors/multiplexers designed for 2-V to 5.5-V VCC operation. 1B 1Y NC 2A 2B 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A 4B NC 4Y 3A 2Y GND NC 3Y 3B These devices contain inverters and drivers to supply full data selection to the four output gates. A separate strobe (G) input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ’LV157A devices present true data. 4 NC − No internal connection ORDERING INFORMATION TOP-SIDE MARKING Tube of 40 SN74LV157AD Reel of 2500 SN74LV157ADR SOP − NS Reel of 2000 SN74LV157ANSR 74LV157A SSOP − DB Reel of 2000 SN74LV157ADBR LV157A Tube of 90 SN74LV157APW Reel of 2000 SN74LV157APWR Reel of 250 SN74LV157APWT TVSOP − DGV Reel of 2000 SN74LV157ADGVR LV157A CDIP − J Tube of 25 SNJ54LV157AJ SNJ54LV157AJ CFP − W Tube of 150 SNJ54LV157AW SNJ54LV157AW LCCC − FK Tube of 55 SNJ54LV157AFK SOIC − D −40°C to 85°C TSSOP − PW −55°C −55 C to 125 125°C C ORDERABLE PART NUMBER PACKAGE† TA LV157A LV157A SNJ54LV157AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2005, Texas Instruments Incorporated !"#$%&' #"'(' ')"*%("' #$**&' ( ") +$,-#("' !(&. *"!$# #"')"*% " +&#)#("' +&* & &*% ") &/( '*$%&' ('!(*! 0(**('1. *"!$#"' +*"#&'2 !"& '" '&#&(*-1 '#-$!& &'2 ") (-+(*(%&&*. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCLS397F − APRIL 1998 − REVISED APRIL 2005 description/ordering information (continued) These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. FUNCTION TABLE INPUTS OUTPUT Y DATA G SELECT A/B A B H X X X L L L X L L L H X H L H X L L L H X H H L logic diagram (positive logic) 1A 2 4 1B 2A 3 5 7 2B 3A 6 4A 10 G A/B 13 15 1 Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages. 2 3Y 14 12 4B 2Y 11 9 3B 1Y POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4Y SCLS397F − APRIL 1998 − REVISED APRIL 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range applied in high or low state, VO (see Notes 1 and 2) . . . . . . . . . . −0.5 V to VCC + 0.5 V Output voltage range applied in power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCLS397F − APRIL 1998 − REVISED APRIL 2005 recommended operating conditions (see Note 4) SN54LV157A VCC VIH High-level input voltage VIL Low-level input voltage VI VO Input voltage IOH IOL ∆t/∆v MIN MAX 2 5.5 Supply voltage VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 2 5.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.7 0.5 Output voltage 0 0 VCC −50 V VCC × 0.3 5.5 0 VCC −50 −2 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V V V V µA −2 −6 −6 −12 −12 VCC = 2 V VCC = 2.3 V to 2.7 V 50 50 2 2 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 6 6 12 12 VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V V VCC × 0.3 VCC × 0.3 VCC × 0.3 5.5 VCC = 2 V VCC = 2.3 V to 2.7 V UNIT 0.5 VCC × 0.3 VCC × 0.3 0 Input transition rise or fall rate MAX 1.5 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V Low-level output current MIN 1.5 VCC = 2 V VCC = 2.3 V to 2.7 V High-level output current SN74LV157A 200 0 200 100 0 100 20 0 20 mA µA mA ns/V TA Operating free-air temperature −55 125 −40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LV157A PARAMETER VOH VOL TEST CONDITIONS IOH = −50 µA IOH = −2 mA VCC 2 V to 5.5 V IOL = 50 µA IOL = 2 mA VI = 5.5 V or GND VI = VCC or GND, Ioff Ci VI or VO = 0 to 5.5 V VI = VCC or GND MIN VCC−0.1 2 3V 2.48 2.48 4.5 V 3.8 TYP MAX UNIT V 3.8 0.1 0.1 2.3 V 0.4 0.4 3V 0.44 0.44 4.5 V V 0.55 0.55 0 to 5.5 V ±1 ±1 µA 5.5 V 20 20 µA 0 5 5 µA IO = 0 3.3 V ')"*%("' #"'#&*' +*"!$# ' & )"*%(3& "* !&2' +(& ") !&3&-"+%&'. (*(#&*# !(( ('! "&* +&#)#("' (*& !&2' 2"(-. &/( '*$%&' *&&*3& & *2 " #('2& "* !#"''$& && +*"!$# 0"$ '"#&. 4 SN74LV157A MAX 2 V to 5.5 V IOL = 6 mA IOL = 12 mA II ICC TYP VCC−0.1 2 2.3 V IOH = −6 mA IOH = −12 mA MIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1.7 1.7 pF SCLS397F − APRIL 1998 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER tpd tpd FROM (INPUT) TO (OUTPUT) A or B Y A/B Y G Y A or B Y A/B Y G Y LOAD CAPACITANCE MIN TA = 25°C TYP MAX CL = 15 pF CL = 50 pF SN54LV157A SN74LV157A MIN MAX MIN MAX 7.4* 15.9* 1* 19.5* 1 19.5 7.9* 19.4* 1* 23.5* 1 23.5 7.8* 19.8* 1* 24* 1 24 22 9.4 18.8 1 22 1 10.8 22.3 1 26 1 26 9.6 22.7 1 26.5 1 26.5 UNIT ns ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tpd tpd FROM (INPUT) TO (OUTPUT) A or B Y A/B Y G Y A or B Y A/B Y G Y LOAD CAPACITANCE MIN TA = 25°C TYP MAX CL = 15 pF CL = 50 pF SN54LV157A SN74LV157A MIN MAX MIN MAX 5.2* 9.7* 1* 11.5* 1 11.5 5.8* 13.2* 1* 15.5* 1 15.5 5.5* 13.6* 1* 16* 1 16 6.7 13.2 1 15 1 15 7.6 16.7 1 19 1 19 7 17.1 1 19.5 1 19.5 UNIT ns ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tpd tpd FROM (INPUT) TO (OUTPUT) A or B Y A/B Y G Y A or B Y A/B Y G Y LOAD CAPACITANCE MIN TA = 25°C TYP MAX CL = 15 pF CL = 50 pF SN54LV157A SN74LV157A MIN MAX MIN MAX 3.6* 6.4* 1* 7.5* 1 7.5 4.1* 8.1* 1* 9.5* 1 9.5 3.8* 8.6* 1* 10* 1 10 4.8 8.4 1 9.5 1 9.5 5.4 10.1 1 11.5 1 11.5 5 10.6 1 12 1 12 UNIT ns ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 5) SN74LV157A PARAMETER MIN TYP MAX UNIT VOL(P) VOL(V) Quiet output, maximum dynamic VOL 0.3 0.8 V Quiet output, minimum dynamic VOL −0.1 −0.8 V VOH(V) VIH(D) Quiet output, minimum dynamic VOH 3.2 High-level dynamic input voltage V 2.31 VIL(D) Low-level dynamic input voltage NOTE 5: Characteristics are for surface-mount packages only. V 0.99 V ')"*%("' #"'#&*' +*"!$# ' & )"*%(3& "* !&2' +(& ") !&3&-"+%&'. (*(#&*# !(( ('! "&* +&#)#("' (*& !&2' 2"(-. &/( '*$%&' *&&*3& & *2 " #('2& "* !#"''$& && +*"!$# 0"$ '"#&. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SCLS397F − APRIL 1998 − REVISED APRIL 2005 operating characteristics, TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS CL = 50 pF, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 10 MHz VCC 3.3 V TYP 5V 13.1 UNIT 12.1 pF SCLS397F − APRIL 1998 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input 0V tw tsu VCC 50% VCC Input 50% VCC th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC 50% VCC Input 50% VCC tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output 0V VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) tPLH 50% VCC VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VCC Output Control 50% VCC 50% VCC 0V tPZL tPLZ 50% VCC VOL + 0.3 V VOL tPHZ tPZH Output Waveform 2 S1 at GND (see Note B) ≈VCC 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 PACKAGING INFORMATION (1) Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LV157AD ACTIVE SOIC D 16 SN74LV157ADBR ACTIVE SSOP DB SN74LV157ADBRE4 ACTIVE SSOP SN74LV157ADBRG4 ACTIVE SN74LV157ADE4 40 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ADG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ADGVR ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ADGVRE4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ADGVRG4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ADR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ADRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ADRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ANSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ANSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157ANSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWE4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWT ACTIVE TSSOP PW 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWTE4 ACTIVE TSSOP PW 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV157APWTG4 ACTIVE TSSOP PW 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM The marketing status values are defined as follows: Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.6 2.5 12.0 16.0 Q1 SN74LV157ADBR SSOP DB 16 2000 330.0 16.4 8.2 SN74LV157ADGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74LV157ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN74LV157ANSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74LV157APWR TSSOP PW 16 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV157ADBR SSOP DB 16 2000 346.0 346.0 33.0 SN74LV157ADGVR TVSOP DGV 16 2000 346.0 346.0 29.0 SN74LV157ADR SOIC D 16 2500 333.2 345.9 28.6 SN74LV157ANSR SO NS 16 2000 346.0 346.0 33.0 SN74LV157APWR TSSOP PW 16 2000 346.0 346.0 29.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. 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