EXAR SP708CU-L/TR

SP705-708/813L
Low Power Microprocessor Supervisory Circuits
■ Precision Voltage Monitor:
SP705/707/813L at 4.65V
SP706/708 at 4.40V
■ RESET Pulse Width - 200ms
■ Independent Watchdog Timer - 1.6s
Timeout (SP705/706/813L)
■ 60µA Maximum Supply Current
■ Debounced TTL/CMOS Manual Reset Input
■ RESET Asserted Down to VCC = 1.1V
■ Voltage Monitor for Power Failure or Low
Battery Warning
■ Available in 8-pin PDIP, NSOIC, and
Now available in Lead Free
µSOIC packages
■ Pin Compatible Enhancement to Industry Standard 705-708/813L Series
■ Functionally Compatible to Industry Standard 1232 Series
DESCRIPTION…
The SP705-708/813L series is a family of microprocessor (µP) supervisory circuits that
integrate myriad components involved in discrete solutions which monitor power-supply and
battery in µP and digital systems. The SP705-708/813L series will significantly improve
system reliability and operational efficiency when compared to solutions obtained with discrete
components. The features of the SP705-708/813L series include a watchdog timer,
a µP reset, a Power Fail Comparator, and a manual-reset input. The SP705-708/813L
series is ideal for applications in automotive systems, computers, controllers, and intelligent
instruments. The SP705-708/813L series is an ideal solution for systems in which critical
monitoring of the power supply to the µP and related digital components is demanded.
Part
Number
RESET
Threshold
RESET
Active
Manual
RESET
Watchdog
PFI
Accuracy
SP705
4.65 V
LOW
YES
YES
4%
SP706
4.40 V
LOW
YES
YES
4%
SP707
4.65 V
LOW and HIGH
YES
NO
4%
SP708
4.40 V
LOW and HIGH
YES
NO
4%
SP813L
4.65 V
HIGH
YES
YES
4%
June 2008 Rev C
SP705 Low Power Microprocessor Supervisory Circuits
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© 2008 Exar Corporation
Continuous Power Dissipation
Plastic DIP (derate 9.09mW/°C above +70°C)727mW
SO (derate 5.88mW/°C above +70°C) ...... 471mW
Mini SO (derate 4.10mW/°C above +70°C) 330mW
ABSOLUTE MAXIMUM RATINGS
This is a stress rating only and functional operation
of the device at these or any other conditions above
those indicated in the operation sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect reliability and cause permanent
damage to the device.
Storage Temperature Range ....... -65°C to +160°C
Lead Temperature (soldering, 10s) ............ +300°C
Vcc ....................................................................................... -0.3V to +6.0V
All Other Inputs (Note 1) ......... -0.3V to (Vcc+0.3V)
Input Current:
Vcc ............................................................................................................. 20mA
GND ............................................................ 20mA
Output Current (all outputs) ......................... 20mA
ESD Rating ..................................................... 4KV
SPECIFICATIONS
VCC = 4.75V to 5.50V for SP705/707/813L, VCC = 4.50V to 5.50V for SP706/708, TA = TMIN to TMAX, unless otherwise noted, typical at 25oC.
PARAMETER
Operating Voltage Range, VCC
MIN.
Supply Current, ISUPPLY
Reset Threshold
TYP.
MAX.
UNITS
5.5
V
40
60
µA
MR=VCC or Floating, WDI Floating
4.65
4.40
4.75
4.50
V
SP705, SP707, SP813L, Note 2
SP706, SP708, Note 2
1.1
4.50
4.25
Reset Threshold Hysteresis
40
Reset Pulse Width, tRS
140
RESET Output Voltage
VCC-1.5
0.8
200
280
mV
Note 2
ms
Note 2
V
0.40
0.30
Watchdog Timeout Period, tWD
WDI Pulse Width, tWP
WDI Input Threshold,
LOW
HIGH
1.00
2.25
s
µs
1
0.8
V
75
µA
Note 2
ISOURCE = 800µA
ISOURCE=4µA, VCC=1.1V
ISINK = 3.2mA
Vcc = 1.1V, ISINK = 50 µA
SP705, SP706, SP813L
VIL = 0.4V, VIH = 0.8XVCC
SP705, SP706, SP813L
VCC = 5V
3.5
WDI Input Current
30
-75
June 2008 Rev C
1.60
CONDITIONS
-20
SP705, SP706, SP813L
WDI = VCC
SP705, SP706, SP813L
WDI = 0V
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SPECIFICATIONS
VCC = 4.75V to 5.50V for SP705/707/813L,813M, VCC = 4.50V to 5.50V for SP706/708, TA = TMIN to TMAX, unless otherwise noted, typical at 25oC.
PARAMETER
MIN.
WDO Output Voltage
TYP.
MAX.
VCC-1.5
0.40
MR Pull-Up Current
100
MR Pulse Width, tMR
150
MR Input Threshold
LOW
HIGH
2.0
250
600
CONDITIONS
V
ISOURCE=800µA
ISINK=3.2mA
µA
MR = 0V
ns
MR to Reset Out Delay, tMD
PFI Input Threshold
UNITS
0.8
V
250
ns
Note 2
VCC = 5V
1.20
1.25
1.30
V
PFI Input Current
-25.00
0.01
25.00
nA
PFO Output Voltage
VCC-1.5
V
0.4
ISOURCE = 800µA
ISINK = 3.2mA
Note 1: The input voltage limits on PFI and MR can be exceeded if the input current is less than 10mA.
Note 2: Applies to both RESET in the SP705-SP708 and RESET in the SP707/708/813L/813M.
µSOIC
DIP and SOIC
MR 1
8 WDO
VCC 2
7 RESET / RESET*
GND 3
PFI 4
SP705
SP706
SP813L
RESET / RESET* 1
WDI
MR 3
5 PFO
VCC 4
6
MR 1
8 RESET
RESET 1
VCC 2
7 RESET
RESET 2
GND 3
PFI 4
SP707
SP708
N.C.
MR 3
5 PFO
VCC 4
6
8 WDI
WDO 2
* SP813L only
7 PFO
SP705
SP706
SP813L
6
PFI
5 GND
8 N.C.
7 PFO
SP707
SP708
6
PFI
5 GND
* SP813L only
Figure 1. Pinouts
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PIN DESCRIPTION
SP705/706
SP707/708
DIP/
SOIC
µSOIC
DIP/
SOIC
µSOIC
DIP/
SOIC
µSOIC
MR
Manual Reset - This input triggers a reset pulse
when pulled below 0.8V. This active-LOW input
has an internal 250µA pull-up current. It can be
driven from a TTL or CMOS logic line or shorted
to ground with a switch
1
3
1
3
1
3
VCC
+5V power supply
2
4
2
4
2
4
Ground reference for all signals
3
5
3
5
3
5
PFI
Power-Fail Input - When this voltage monitor input
is less than 1.25V, PFO goes LOW. Connect PFI
to ground or VCC when not in use.
4
6
4
6
4
6
PFO
Power-Fail Output - This output is HIGH until PFI
is less than 1.25V.
5
7
5
7
5
7
WDI
Watchdog Input - If this input remains HIGH or
LOW for 1.6s, the internal watchdog timer times
out and WDO goes LOW. Floating WDI or
connecting WDI to a high-impedance tri-state
buffer disables the watchdog feature. The internal
watchdog timer clears whenever RESET is
asserted, WDI is tri-stated, or whenever WDI sees
a rising or falling edge.
6
8
-
-
6
8
N.C.
No Connect.
-
-
6
8
-
-
RESET
Active-LOW RESET Output - This output pulses
LOW for 200ms when triggered and stays LOW
whenever VCC is below the reset threshold (4.65V
for the SP705/707/813L and 4.40V for the
SP706/708). It remains LOW for 200ms after Vcc
rises above the reset threshold or MR goes from
LOW to HIGH. A watchdog timeout will not trigger
RESET unless WDO is connected to MR.
7
1
7
1
-
-
WDO
Watchdog Output - This output pulls LOW when
the internal watchdog timer finishes its 1.6s count
and does not go HIGH again until the watchdog is
cleared. WDO also goes LOW during low-line
conditions. Whenever VCC is below the reset
threshold, WDO stays LOW. However, unlike
RESET, WDO does not have a minimum pulse
width. As soon as VCC is above the reset
threshold, WDO goes HIGH with no delay.
8
2
-
-
8
2
RESET
Active-HIGH RESET Output - This output is the
complement of RESET. Whenever RESET is
HIGH, RESET is LOW, and vice versa. Note the
SP813L/813M has a reset output only.
-
-
8
2
7
1
NAME
GND
FUNCTION
SP813L
Table 1. Device Pin Description
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WATCHDOG
TRANSITION
DETECTOR
WDI
WATCHDOG
TIMER
WDO
VCC
250µA
TIMEBASE FOR
RESET AND
WATCHDOG
MR
RESET
GENERATOR
RESET/RESET*
VCC
4.65V
(4.40V for the SP706 and SP813M)
PFI
PFO
SP705
SP706
SP813L
1.25V
GND
* For the SP813L only
Figure 2. Internal Block Diagram for the SP705/706/813L
VCC
RESET
250µA
MR
RESET
GENERATOR
RESET
VCC
4.65V
(4.40V for the SP708)
PFI
PFO
1.25V
SP707
SP708
GND
Figure 3. Internal Block Diagram for the SP707/708
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+5V
VCC = +5V
TA = +25 C
PFI
PFO
Figure 4A. Power-Fail Comparator De-assertion
Response Time.
1KΩ
30pF
+1.25V
Figure 4B. Circuit for the Power-Fail Comparator Deassertion Response Time.
+5V
VCC = +5V
TA = +25 C
1KΩ
PFI
PFO
30pF
+1.25V
Figure 5A. Power-Fail Comparator Assertion Response
Time.
Figure 5B. Circuit for the Power-Fail Comparator
Assertion Response Time.
VCC
TA = +25oC
VCC
2KΩ
RESET
RESET
330pF
GND
Figure 6A. SP705/707 RESET Output Voltage vs.
Supply Voltage.
June 2008 Rev C
Figure 6B. Circuit for the SP705/707 RESET Output
Voltage vs. Supply Voltage.
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VCC
TA = +25oC
VCC
10KΩ
RESET
RESET
330pF
GND
Figure 7A. SP705/707 RESET Response Time
Figure 7B. Circuit for the SP705/707 RESET Response
Time
Figure 8. SP707 RESET and RESET Assertion
Figure 9. SP707 RESET and RESET De-Assertion
VCC
TA = +25oC
VCC
10KΩ
RESET
330pF
RESET
330pF
GND
10KΩ
Figure 10. Circuit for the SP707 RESET and RESET Assertion and De-Assertion
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Figure 11. SP707/708/813L RESET Output
Voltage vs. Supply Voltage
Figure 12. SP813L RESET Response Time
VCC
VCC
RESET
330pF
10KΩ
GND
Figure 13. Circuit for the SP707/708/813L RESET Output Voltage vs. Supply Voltage and the SP813L
RESET Response Time
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FEATURES
RESET Output
The SP705-708/813L series provides four
key functions:
1. A reset output during power-up, power-down
and brownout conditions.
2. An independent watchdog output that goes
LOW if the watchdog input has not been toggled
within 1.6 seconds.
3. A 1.25V threshold detector for power-fail
warning, low battery detection, or monitoring a
power supply other than +5V.
4. An active-LOW manual-reset that allows
RESET to be triggered by a pushbutton switch.
A microprocessor's reset input starts the µP
in a known state. The SP705-708/813L
series asserts reset during power-up and
prevents code execution errors during powerdown or brownout conditions.
On power-up, once VCC reaches 1.1V, RESET
is a guaranteed logic LOW of 0.4V or less. As VCC
rises, RESET stays LOW. When VCC rises
above the reset threshold, an internal timer releases RESET after 200ms. RESET pulses
LOW whenever VCC dips below the reset threshold, such as in a brownout condition. When a
brownout condition occurs in the middle of a
previously initiated reset pulse, the pulse continues for at least another 140ms. On powerdown, once VCC falls below the reset threshold,
RESET stays LOW and is guaranteed to be 0.4V
or less until VCC drops below 1.1V.
The SP707/708 devices are the same as the
SP705/706 devices except for the active-HIGH
RESET substitution of the watchdog timer. The
SP813L is the same as the SP705 except an
active-HIGH RESET is provided rather than an
active-LOW RESET. The SP705/707/813L
devices generate a reset when the supply voltage
drops below 4.65V. The SP706/708
devices generate a reset below 4.40V.
The SP707/708/813L active-HIGH
RESET output is simply the complement of the
RESET output and is guaranteed to be valid with
VCC down to 1.1V. Some µPs, such as Intel's
80C51, require an active-HIGH reset pulse.
The SP705-708/813L series is ideally
suited for applications in automotive systems,
intelligent instruments, and battery-powered
computers and controllers. The SP705-708/813L
series is ideally applied in environments
where monitoring of power supply to a µP and its
related components is critical.
Watchdog Timer
The SP705/706/813L watchdog circuit
monitors the µP's activity. If the µP does not
toggle the watchdog input (WDI) within 1.6
seconds and WDI is not tri-stated, WDO goes
LOW. As long as RESET is asserted or the WDI
input is tri-stated, the watchdog timer will stay
cleared and will not count. As soon as RESET
is released and WDI is driven HIGH or LOW,
the timer will start counting. Pulses as short as
50ns can be detected.
THEORY OF OPERATION
The SP705-708/813L series is a
microprocessor (µP) supervisory circuit that
monitors the power supplied to digital circuits
such as microprocessors, microcontrollers, or
memory. The series is an ideal solution for
portable, battery-powered equipment that
requires power supply monitoring. Implementing
this series will reduce the number of components
and overall complexity. The watchdog functions
of this product family will continuously oversee
the operational status of a system. The operational
features and benefits of the SP705-708/813L
series are described in more detail below.
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tWP
tWD
tWD
+5V
WDI
0V
+5V
WDO
0V
tWD
+5V
RESET*
0V
tRS
+5V
RESET*
0V
* externally triggered LOW by MR,
RESET is for the SP813L only
Figure 14. SP705/706/813L Watchdog Timing Waveforms
Typically, WDO will be connected to the
non-maskable interrupt input (NMI) of a µP.
When VCC drops below the reset threshold,
WDO will go LOW whether or not the watchdog timer has timed out. Normally this would
trigger an NMI but RESET goes LOW simultaneously, and thus overrides the NMI.
+5V
VCC
If WDI is left unconnected, WDO can be used as
a low-line output. Since floating WDI disables
the internal timer, WDO goes LOW only when
VCC falls below the reset threshold, thus functioning as a low-line output.
VRT
VRT
0V
+5V
WDO
0V
tRS
tRS
+5V
RESET
0V
+5V
MR*
0V
tMD
*externally driven LOW
tMR
Figure 15. SP705/706 Timing Diagrams with WDI Tri-stated. The SP707/708/813L RESET Output is the Inverse
of the RESET Waveform Shown.
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Ensuring a Valid RESET Output Down to
VCC = 0V
Power-Fail Comparator
The power-fail comparator can be used for
various purposes because its output and
noninverting input are not internally connected.
The inverting input is internally connected to a
1.25V reference.
When VCC falls below 1.1V, the SP705/706/707/
708 RESET output no longer sinks current, it
becomes an open circuit. High-impedance
CMOS logic inputs can drift to undetermined
voltages if left undriven. If a pull-down resistor
is added to the RESET pin, any stray charge or
leakage currents will be shunted to ground,
holding RESET LOW. The resistor value is not
critical. It should be about 100KΩ, large enough
not to load RESET and small enough to pull
RESET to ground.
To build an early-warning circuit for power
failure, connect the PFI pin to a voltage divider
as shown in Figure 16. Choose the voltage
divider ratio so that the voltage at PFI falls
below 1.25V just before the +5V regulator drops
out. Use PFO to interrupt the µP so it can
prepare for an orderly power-down.
Manual Reset
Monitoring Voltages Other Than the
Unregulated DC Input
The manual-reset input (MR) allows RESET to
be triggered by a pushbutton switch. The switch
is effectively debounced by the 140ms minimum RESET pulse width. MR is TTL/CMOS
logic compatible, so it can be driven by an
external logic line. MR can be used to force a
watchdog timeout to generate a RESET pulse
in the SP705/706/813L. Simply connect
WDO to MR.
Monitor voltages other than the unregulated DC
by connecting a voltage divider to PFI and
adjusting the ratio appropriately. If required,
add hysteresis by connecting a resistor (with a
value approximately 10 times the sum of the
two resistors in the potential divider network)
between PFI and PFO. A capacitor between PFI
and GND will reduce the power-fail circuit's
Regulated +5V
Power Supply
+5V
Unregulated DC
Power Supply
0.1µF
VCC
RESET
PFO
I/O LINE
PFI
NMI
WDO
MR
R1
RESET
INTERRUPT
1MΩ
1%
VCC
VCC
µP
+12V
PFI
SP705
SP706
SP813L
PFO
130KΩ
1%
R2
to µP
MR
RESET
GND
GND
PFI
GND
PUSHBUTTON
SWITCH
Figure 16. Typical Operating Circuit
June 2008 Rev C
Figure 17. Monitoring Both +5V and +12V Power
Supplies
SP705 Low Power Microprocessor Supervisory Circuits
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© 2008 Exar Corporation
sensitivity to high-frequency noise on the
line being monitored. RESET can be used to
monitor voltages other than the +5V V CC
line. Connect PFO to MR to initiate a RESET
pulse when PFI drops below 1.25V. Figure 17
shows the SP705/706/707/708 configured to
assert RESET when the +5V supply falls below
the RESET threshold, or when the +12V supply
falls below approximately 11V.
Interfacing to mPs with Bidirectional
RESET Pins
µPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
SP705/706/707/708 RESET output. If, for
example, the RESET output is driven HIGH and
the µP wants to pull it LOW, indeterminate
logic levels may result. To correct this, connect
a 4.7KΩ resistor between the RESET output and
the µP reset I/O, as shown if Figure 19. Buffer
the RESET output to other system components.
Monitoring a Negative Voltage Supply
The power-fail comparator can also monitor a
negative supply rail, shown in Figure 18. When
the negative rail is good (a negative voltage of
large magnitude), PFO is LOW. By adding the
resistors and transistor as shown, a HIGH PFO
triggers RESET. As long as PFO remains HIGH,
the SP705-708/813L will keep RESET
asserted (where RESET = LOW and RESET =
HIGH). Note that this circuit's accuracy depends on the PFI threshold tolerance, the VCC
line, and the resistors.
+5V
VCC
100KΩ
10KΩ
MR
R1
Buffered RESET connects to System Components
PFI
PFO
2N3904
100KΩ
10KΩ
to µP
R2
RESET
+5V
V-
+5V
GND
VCC
VCC
R1 = 5.0 - 1.25 , VTRIP < 0
1.25 - VTRIP
R2
µP
RESET
RESET
4.7KΩ
+5V
MR
0V
V-
GND
GND
+5V
PFO
0V
VVTRIP
0V
Figure 18. Monitoring a Negative Voltage Supply
OCT 17-06 RevB
Figure 19. Interfacing to Microprocessors with
Bidirectional RESET I/O for the SP705/706/707/708
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45
45
44
44
43
43
4.75V
5.0V
5.5V
41
40
39
41
40
39
38
38
37
37
36
35
-40C
-40C
25C
+85C
42
Isupply (µA)
Isupply (µA)
42
36
25C
Centigrade Temperature
35
4.75V
+85C
5.0V
5.5V
VCC
Figure 20. Supply Current vs. Temperature
Figure 21. Supply Current vs. Supply Voltage
Applications
Unlike the DS1232, the SP705-708/813L
series has a separate watchdog output pin WDO
which can be simply connected to the MR input
to generate a Reset signal. The DS1232 has pin
selectable features, while the SP705-708/813L
series has more fixed functions of reset
threshold and watchdog time-out delay. For
most applications, the fixed functions will be
preferred, with the benefit of reduced cost due to
a less complex part. In addition, the SP705-708/
813L series has a power fail input and
output function not available with the DS1232
that is useful for monitoring systems with
unregulated supply voltages. The SP705-708/
813L series is available in one of the
industry's smallest space-saving package sizes,
the µSOIC.
The SP705-708/813L series offers
unmatched performance and the lowest power
consumption for these industry standard devices.
Refer to Figures 20 and 21 for supply current
performance characteristics rated against
temperature and supply voltages.
Table 2 shows how the SP705-708/813L
series can be used instead of the Dallas
Semiconductor DS1232LP/LPS. Table 2
illustrates to a designer the advantages and tradeoffs of the SP705-708/813L series
compared to the Dallas Semiconductor device.
While the names of the pin descriptions may
differ, the functions are the same or very similar.
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Dallas DS1232LP/LPS
Sipex Alternative Part Number
Pin
Number
DIP or
SOIC
Pin
Description
Sipex Part
Number
Manual Reset
1
PBRST
WDI Time Delay Set
2
VCC Trip 4.6V
Function
Pin Number
Pin Description
DIP or
SOIC
µSOIC
SP705-708/
813L/813M
1
3
MR
TD
SP705-708/
813L/813M
N/A
N/ A
1.6sec by design
3
TOL=GND
SP705/707/
813L
N/A
N/ A
4.6V by design
VCC Trip 4.4V
3
TOL=VCC
SP706/708/
813M
N/A
N/A
4.4V by design
Ground
4
GND
SP705-708/
813L/813M
3
5
GND
Reset Active HIGH
5
R ST
SP707/708
8
2
RESET
Reset Active HIGH
5
R ST
SP813L/813M
7
1
RESET
Reset Active LOW
6
R ST
SP705-708
7
1
RESET
Watchdog Input
7
ST (H to L)
SP705/706/
813L/813M
6
8
WDI (any trans.)
Voltage Input
8
VCC
SP705-708/
813L/813M
2
4
VCC
Power Fail Input
N/A
N/A
SP705-708/
813L/813M
4
6
P FI
Power Fail Output
N/A
N/A
SP705-708/
813L/813M
5
7
PFO
Watchdog Output
N/A
N/A
SP705/706/
813L/813M
8
2
WDO
Table 2. Device Overview on Dallas Semiconductor
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ORDERING INFORMATION
Model ....................................................................................... Temperature Range ................................................................................ Package
SP705CP .....................................................................................DISCONTINUED
SP705CN ....................................................................................... 0°C to +70°C ..................................................................... 8–pin Narrow SOIC
SP705CU ....................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP705EP ......................................................................................DISCONTINUED
SP705EN ..................................................................................... -40°C to +85°C ................................................................... 8–pin Narrow SOIC
SP705EU ..................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP706CP .....................................................................................DISCONTINUED
SP706CN ....................................................................................... 0°C to +70°C ..................................................................... 8–pin Narrow SOIC
SP706CU ....................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706EP ......................................................................................DISCONTINUED
SP706EN ..................................................................................... -40°C to +85°C ................................................................... 8–pin Narrow SOIC
SP706EU ..................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP707CP .....................................................................................DISCONTINUED
SP707CN ....................................................................................... 0°C to +70°C ..................................................................... 8–pin Narrow SOIC
SP707CU ....................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP707EP ......................................................................................DISCONTINUED
SP707EN ..................................................................................... -40°C to +85°C ................................................................... 8–pin Narrow SOIC
SP707EU ..................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP708CP .....................................................................................DISCONTINUED
SP708CN ....................................................................................... 0°C to +70°C ..................................................................... 8–pin Narrow SOIC
SP708CU ....................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP708EP ......................................................................................DISCONTINUED
SP708EN ..................................................................................... -40°C to +85°C ................................................................... 8–pin Narrow SOIC
SP708EU ..................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP813LCP ..................................................................................... 0°C to +70°C ......................................................................... 8–pin Plastic DIP
SP813LCN ....................................................................................DISCONTINUED
SP813LCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP813LEP .................................................................................... -40°C to +85°C ....................................................................... 8–pin Plastic DIP
SP813LEN ....................................................................................DISCONTINUED
SP813LEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP813MCP ...................................................................................DISCONTINUED
SP813MCN ...................................................................................DISCONTINUED
SP813MCU ...................................................................................DISCONTINUED
SP813MEP ....................................................................................DISCONTINUED
SP813MEN .................................................................................. DISCONTINUED
SP813MEU .................................................................................. DISCONTINUED
Please consult the factory for pricing and availability on a Tape-On-Reel option.
All parts available lead free and in tape & reel: Example SP708CU-L/TR
For further assistance:
Email:
EXAR Technical Documentation:
[email protected]
http://www.exar.com/TechDoc/default.aspx?
Exar Corporation
Headquarters and
Sales Office
48720 Kato Road
Fremont, CA 94538
main: 510-668-7000
fax: 510-668-7030
EXAR Corporation reserves the right to make changes to the products contained in this publication in
order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the
use of any circuits described herein, conveys no license under any patent or other right, and makes no
representation that the circuits are free of patent infringement. Charts and schedules contained here in
are only for illustration purposes and may vary depending upon a user’s specific application. While the
information in this publication has been carefully checked; no responsibility, however, is assumed for
inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where
the failure or malfunction of the product can reasonably be expected to cause failure of the life support
system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk
of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of
EXAR Corporation is adequately protected under the circumstances.
June 2008 Rev C
SP705 Low Power Microprocessor Supervisory Circuits
18
© 2008 Exar Corporation