® SP8024/8025/8026 Advanced 200V/µs Integrated APC Amplifier with Gain Adjust & Differential Output FEATURES ■ Slew Rate of 200V/µs ■ Fast Settling Time - 10ns ■ Gain Switch ■ 2V Output Swing ■ Low Offset Voltage: < 10mV ■ Low Offset Drift: < 20µV/°C ■ 12dB External Gain Adjust Range VCC 1 GAIN 2 RCOM 3 GND 4 SP8024/25/26 8 Pin COB 8 VOUT + 7 VOUT - 6 RGAIN2 5 RGAIN1 DESCRIPTION The SP8024, SP8025, and SP8026 are high-speed, differential output APC amplifiers that integrate the photodiode and adjustable gain block on one chip. This allows the user to control the laser power of the system in high-speed DVDRW, DVDRAM and CDRW systems. The wide 2V output swing also allows better system performance. FUNCTIONAL DIAGRAM GAIN VCC 2463 VOUT+ Buffer GND 31 850 31 Rf1 Rf2 TIA 1VP-P 50pF 1k (Flexible Flat Cable) 850 VOUTBuffer 1VP-P 2463 RG1 Rev. 6/02/03 1k RGAIN2 RGAIN1 RGCOM 50pF RG2 SP8024, 25, 26 200V/µs Integrated APC Amplifier 1 © Copyright 2003 Sipex Corporation ABSOLUTE MAXIMUM RATINGS TJ(MAX) ........................................................................................ 120°C VS(MAX) ............................................................................................... 6V VIN(MAX) .............................................................................................. 6V These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. ELECTRICAL SPECIFICATIONS Unless otherwise noted: VCC = +5.0V, CLOAD = 50pF to GND, RGAIN=262Ω and RLOAD = 1kΩ. -20°C≤TA≤ +85°C, nominal gain PARAMETER CONDITIONS Supply Voltage Nominal Output Sensitivity SP8024 SP8025 SP8026 Any Select Mode ODB Gain Input Optical Power Required to Produce 2 V Output Swing SP8024 SP8025 SP8026 Any Select Mode ODB Gain Full Scale Output Voltage Swing(Vp-p) MIN TYP 4.5 5 1.9 Output Common Mode Voltage MAX UNITS 5.5 V 1000 2000 3000 V/W 2 1 0.666 mW 2 V VCC/2 V Differential Output Offset Voltage -10 10 mV Differential Output Offset Voltage Drift -20 20 µV/°C 1 2 mV 3 5 Differential Output Noise BW: 1kHz to 1MHz Differential Output Noise BW: 1kHz to 100MHz Differential Output Slew Rate 200 Differential Output Settling Time to 1% of Final Value, 2V Step 250 10 Output Overshoot, 2V step Bandwidth (-3db) PSRR 4.5V < VCC < 5.5V Power Supply Current TA = 25°C Full Temp No Load Gain Adjust Range < 5% Overshoot, 150 < RGAIN < 1350Ω Input Voltage Vlow(TTL Level) Vhigh(TTL Level) Rev. 6/02/03 2 ns 5 % 100 60 65 dB 20 mA MHz 25 -9 75 SP8024, 25, 26 200V/µs Integrated APC Amplifier 15 65 2.2 TJA, 3mm x 3.5mm Package mV V/µs 3 dB 0.8 V V °C/W © Copyright 2003 Sipex Corporation PIN DESCRIPTION PIN NUMBER NAME FUNCTION 1 VCC 2 GAIN Gain Select 3 RCOM Common connection point for RGAIN1 and RGAIN2 4 GND Power Ground 5 RGAIN1 Gain Adjust 1 6 RGAIN2 Gain Adjust 2 7 VOUT- Output Voltage - 8 VOUT+ Output Voltage + Supply Voltage THEORY OF OPERATION Internal Operation The SP8024/25/26 APC circuits have an integrated photo detector and are designed with three nominal sensitivities of 1mV/µW, 2mV/ µW and 3mV/µW respectively. Each part’s sensitivity can also be adjusted continuously and independently for two different gain modes via two external resistors over a range of 12dB. The two gain modes are controlled by a TTL compatible logic input. This logic input also normalizes the internal photo detector’s responsivity for 650nm and 780nm laser wavelengths. The logic pin selects between the two external gain setting resistors to allow independent control and settings for the two gain functions. The 8024 APC family uses two stages of gain to optimize for speed and offset. The two stages consist of a differential trans-impedance amplifier (TIA), and a differential gain adjust amplifier. Variable Gain Amplifier This stage is used to vary the gain of the system. It provides selection for two different gain setting resistors, RGAIN1 and RGAIN2, at pins 5 and 6 via internal MOSFET switches S1 and S2. The logic input at pin 2 controls the selection of the two external gain set resistors. Table 1: Gain Select Logic Truth Table Rexternal, Pin 3 to: Gain Factor (x) Sensitivity (mV/µW) RG1 = RG2 = 262Ω 0 or Open RG1 - Pin 5 6.25 1 2 3 1 RG2 - Pin 6 6.25 1 2 3 SP8024 SP8025 SP8026 The gain of this balanced amplifier topology is given by: TIA The first stage is a differential trans-impedance amplifier (TIA) for converting the photo detector output current to a balanced differential voltage. This topology allows for fast settling of the photo detector and also cancels offset effects. The TIA has no external components. Rev. 6/02/03 Gain Select Pin 2 GAIN = 1 + Rf1 + Rf2 REXT where RGAIN is external and Rf1 = Rf2 = 850Ω in feedback. The nominal gain is defined as 6.25. SP8024, 25, 26 200V/µs Integrated APC Amplifier 3 © Copyright 2003 Sipex Corporation THEORY OF OPERATION : Continued Variable Gain Amplifier: continued There are internal buffering resistors and a MOSFET switch resistance in series with the external Rgain. These internal resistances add up to a nominal value of 62Ω. Therefore the true gain equation is: GAIN = 1 + with the internal compensation of the amplifier, instability occurs. This instability appears as overshoot in the transient response. The stray capacitance at pins 5 and 6 should be kept below 1pF. This stage also allows the part to drive high capacitive loads. The maximum load capacitance is 50pF bulk. The actual load is typically a flexible ribbon cable (FLEX) that acts like a transmission line. This presents a distributed capacitive load plus inductance and resistance. In this case care should be taken to match the characteristic impedance of the line at the far end to avoid standing waves and ringing. The buffer is designed to drive 1kΩ to ground. However, this resistor can be adjusted in value to accommodate the characteristic impedance of the signal trace. Rf1 + Rf2 REXT + 62 This gives a nominal external Rgain value of 324 - 62 = 262Ω for a gain of 6.25. The constraints on this stage are the parasitic capacitances associated with the input pins. The resistors used for setting the system gain are actually subminiature potentiometers. They are used for calibrating out systematic variations in the optical path. Pins 5 and 6 connect to the summing node of the gain stage through MOSFET switches. When a capacitor is added to the summing node of an inverting amplifier it creates a pole in the response. If this pole increases enough to interfere 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -4.0 -5.0 -6.0 -7.0 -8.0 -9.0 -10.0 -11.0 -12.0 REXT RGAIN Sensitivity 0 200 400 600 800 1000 1200 1400 1600 1800 2000 6.0 5.7 5.3 5.0 4.7 4.3 4.0 3.7 3.3 3.0 2.7 2.3 2.0 1.7 1.3 1.0 0.7 0.3 0.0 2200 System Sensitivity (mV/µW) Gain (dB) SP8026 Differential APC Sensitivity versus Gain Set Resistor Resistance (Ω) Figure 1. System Gain versus Gain Set Resisitor Rev. 6/02/03 SP8024, 25, 26 200V/µs Integrated APC Amplifier 4 © Copyright 2003 Sipex Corporation Layout and Routing Considerations Special care must be taken when designing the Flex or PCB for this part. The output peak current requirement is in the order of 12.5mA when driving 50pF of capacitive load with a slew rate of 200V/s Therefore care must be taken to provide low inductance, low resistance paths for power and ground and output traces. Supply coupling is also very important. Good supply decoupling is important to ensure the high frequency performance of the system by eliminating supply lead inductance effects. The decoupling capacitor C1 should be as close to the part as possible. This capacitor should be 0.1µF ceramic. C2 is optional to improve decoupling and is recommended to be 1µF tan- talum. The layout of the PCB is pictured here. Note the wide and short traces on the supply lines. The traces for the gain resistors R1 and R2 are kept as short as possible to avoid excessive parasitics. Any parasitics on these nodes will limit the performance of the system. R1 and R2 are subminiature potentiometers in the application. This is a single layer board done on FR4 material. In order to minimize coupling capacitance into the gain setting resistor nodes, it is also critical that VOUT+ and VOUT- are routed away from the traces associated with the gain-setting resistors. Top Bottom Figure 2. Test and Evaluation PCB Layout for COB 8 Lead Package Rev. 6/02/03 SP8024, 25, 26 200V/µs Integrated APC Amplifier 5 © Copyright 2003 Sipex Corporation +5V VOUT+ + C1 0.1µF RL1 1k VCC GAIN GAIN RGCOM GND 1 2 3 4 CL1 50pF VOUT+ 8 SP8024 SP8025 SP8026 + VOUT- 7 RGAIN2 6 RL2 1k + CL2 50pF RGAIN1 5 VOUTRG1 262 RG2 262 Figure 3. Test and Evaluation Schematic Rev. 6/02/03 SP8024, 25, 26 200V/µs Integrated APC Amplifier 6 © Copyright 2003 Sipex Corporation PACKAGE : 8 PIN COB 0.090 1 8 2 7 3 6 4 5 b 0.600 D e F S L H PIN SIDE VIEW TOP VIEW BOTTOM VIEW E 2X) DIMENSIONS in mm Minimum/Maximum 5° ( B A C SIDE VIEW DETECTOR SIZE 8–PIN COB A 0.90/1.10 B .127/.33 b 0.30/0.50 c 0.50 nom D 2.90/3.10 E 3.00/3.20 e 0.75 nom H 3.40/3.60 L 0.40/0.60 F 0.28/0.48 S 0.075/0.275 0.35mm 0.70mm 8 PIN COB (3.5mm x 3.0mm) Detector Area Rev. 6/02/03 SP8024, 25, 26 200V/µs Integrated APC Amplifier 7 © Copyright 2003 Sipex Corporation ORDERING INFORMATION Part Number Temperature Range Package Type SP8024 ................................................... -20°C to +85°C .............. 8 lead COB (3.0mm x 3.5mm) SP8025 ................................................... -20°C to +85°C .............. 8 lead COB (3.0mm x 3.5mm) SP8026 ................................................... -20°C to +85°C .............. 8 lead COB (3.0mm x 3.5mm) Corporation ANALOG EXCELLENCE Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: [email protected] Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Rev. 6/02/03 SP8024, 25, 26 200V/µs Integrated APC Amplifier 8 © Copyright 2003 Sipex Corporation