STV2110A PAL-SECAM LUMA-CHROMA & DEFLECTION PROCESSOR PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ ■ ■ RGB AND FAST BLANKING INPUTS AUTOMATIC CUT-OFF CONTROL DC-CONTROLLED BRIGHTNESS, CONTRAST AND SATURATION CERAMIC 500kHz VCO FOR LINE DEFLECTION CHROMA STANDARD AUTOMATIC IDENTIFICATION BIDIRECTIONAL I/O FOR CHROMA STANDARD PHASE-LOCKED REFERENCE OSCILLATOR USING A STANDARD 4.43MHz OSD CAPABILITY ON OUTPUTS VIDEO IDENTIFICATION GENERATOR Used with the TDA8222, this IC permits a complete low cost solution with external output stages. It is pin compatible with STV2102 PAL only processor. SHRINK 42 (Plastic Package) DESCRIPTION ORDER CODE : STV2110A The STV2110A is a PAL-SECAM chroma decoder, video and H/V deflection processor for CTV. 42 ICAT CATHODECURRENT 41 Vcc SUPPLY VOLTAGE INPUT 40 BIN BLUE INPUT 39 GIN GREEN INPUT 38 COR RED CUT-OFF CAPACITOR 37 RIN RED INPUT 7 36 BRIG BRIGHTNESS CONTROL COB 8 35 FBL FAST BLANKING INPUT YIN 9 34 CLPF CHROMA LOOP FILTER SLPF 10 33 CXTL CHROMA XTAL SXTL 11 32 CKP PAL KILLER CAPACITOR COMPOSITE VIDEO SIGNAL CVBS 12 31 F425 4.25MHz FILTER LINE FLYBACK INPUT LFB 13 30 ACC ACC CONTROL CAPACITOR VERTICAL OUTPUT VOUT 14 29 CDR RED DEEMPHASIS CAPACITOR HORIZONTAL OUTPUT HOUT 15 28 F440 4.40MHz FILTER CONTRAST CONTROL CTR 16 27 SAT SATURATION CONTROL SECAM CHROMA INPUT SECIN 17 26 CDB BLUE DEEMPHASIS CAPACITOR PAL CHROMA INPUT PALIN 18 25 F432 4.32MHz FILTER SUPPLY VOLTAGE Vcc BLANKING INPUT BLK GREEN CUT-OFF CAPACITOR COG RED OUTPUT ROUT HORIZONTAL Vcc HVcc GREEN OUTPUT GOUT BLUE OUTPUT BOUT BLUE CUT-OFF CAPACITOR LUMINANCE SIGNAL INPUT SCANNING LOOP FILTER SCANNING XTAL 1 2 3 4 5 6 GROUND GND 19 24 GND GROUND DELAY CHROMA INPUT DLI 20 23 CKS SECAM KILLER CAPACITOR CHROMA STANDARD I/O PS 21 22 DLO CHROMA OUTPUT September 1993 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without no tice. 2110A-01.EPS PIN CONNECTIONS 1/15 2/15 2110A-02.EPS SECIN 17 PALIN 18 19 GND GND 20 DLI 22 DLO DL Matrix ACC Killer Burst Detector ACC 30 CKP 32 90deg Phase Detector CLPF 34 24 CKS 23 35 SECAM Ident. SECAM Demod. 37 RIN Sync. Sep. 26 25 F432 CDR 29 SAT 28 F440 13 LFB 12 CVBS 10 SLPF Phase Comp. 1 Divider Phase Shift Phase Comp. 2 Burst Gate Generator Mute Frame Output Decoder Line Counter Frame Sync. Separator RGB Cut-off Blanking Blk. RGB Flip-Flop SECAM Flip-Flop PAL Leak. Current Meas. Tube Temp Meas. 36 BRIG RGB Switch 16 CTR Brightness 40 BIN Contrast + Clamp 39 GIN PS CDB 21 Standard Control Permutator FBL 31 F425 Saturation Black Reference Clamp PAL Demod. Matrix Black Insertion 27 5 Y Input Contrast SAT HVcc XVCO 41 CXTL 33 YIN 9 1 Vcc Vcc 11 SXTL VCO Line Output Blank. Comp. 15 HOUT 14 VOUT 2 BLK 42 ICAT 8 COB 3 COG 38 COR 7 BOUT 6 GOUT 4 ROUT STV2110A BLOCK DIAGRAM STV2110A FUNCTIONAL DESCRIPTION DEFLECTION Synchronization Separator The synchronization separator is based on the bottom of synchronization pulses alignment to an internal reference voltage. An external capacitor permits to align synchro. pulses, two external resistors determines the detection threshold of synchro pulses. The frame synchronization pulses are locked to a 32µs reference signal to perfect interlacing. Horizontal Scanning The horizontal scanning frequency is obtained from a 500kHz VCO. The circuit uses two phase-locked loops (PLL). The first one controls the frequency; the second one, fully integrated, controls the relative phase of the synchronization and the line flyback signals. The first PLL has two times constants : a long time constant during the picture to have a good noise immunity, a short time constant at the beginning of the frame to recapture faster the phase in case of VCR video signal. More over, the PLL is in short time constant three lines before frame pulses occured, it permits to ensure good interlacing when the video signal comes from a VCR tape with high phase error. The horizontal output signal is 28µs width. On starting up, horizontal pulses are enabled at VCC = 6.8V. On shutting down, horizontal pulses are inhibited for VCC = 6.2V. Vertical Scanning The windows for the frame sync detection are generated by a count down system. The selection of the windows is determined by the IC status : - video identification off - window : 248/314 - video identification on - window : 248/352 When a sync pulse is detected inside the window a 10.5 lines long pulse is provided to VOUT pin. The count down system provides also the needed signals for the time constant switch, the line PLL inhibition and service signals to the rest of the IC. CHROMA ACC Amplifier, DL Matrix, Permutator and Demodulator The correct chroma subcarrier input, issued from bandpassor bell filter, is internally selected with the standard. The ACC amplifier envolves three stages : the first one select the correct input, the second one the -6dB in picture (PAL mode), the third one is controled by the ACC voltage. The dynamic range is over than 30dB. The chrominance output signal is fed to the delay line. - PAL mode : the adding and substracting direct and delayed signals are performed by the DL matrix function. Two synchronous demodulators multiplies the (B-Y) signal with the 0 degree phase 4.43MHz reference signal and the (R-Y) signal with the alternate ± 90 deg. 4.43MHz phase reference signal. - SECAM mode : the permutator separatesthe two (B-Y) and (R-Y) subcarriers. These signals are demodulated by two FM demodulators with two external L, C centered on fO(blue) = 4.25MHz and fO(red) = 4.406MHz. 4.43MHz Phase Locked Loop The oscillating frequency of the 4.43MHz crystal oscillator is controlled by the output voltage of the loop filter. The phase detector will lock the 90 degree reference signal to the direct burst signal. A 90 degree phase shifter permits to recover the 0 degree reference signal. A flip-flop driven by line pulses permits to generate the alternate ± 90 degree signal. ACC Control and Color Killer PAL mode : the direct burst signal is demodulated with the ± 90 degree reference signal. The demodulation result is used by ACC control and killer function. SECAM mode : ACC control is done by a X2 demodulator. For identification the burst signals of the red and blue lines are demodulated by the external LC connected on Pin 31, it is centered at 4.32MHz. This give positive and negative signals which are inverted by the signal coming out of the SECAM flip-flop. In both standard, if the demodulation result is always positive, the killer capacitor is charged and the standard is identified (color ON). When demodulation result is always negative, the killer capacitor voltage reaches the flip-flop inhibition level, so the alternace sequence is reversed and the capacitor is charged again. In case of no video signal, both killer capacitors voltage are maintained about VCC/2, below the color off threshold. In PAL or SECAM, the ACC control voltage is obtained by the peak detection of the demodulated burst. 3/15 STV2110A Automatic Standard Identification The circuit is alternatelyforced in eachmode during two fields (PAL mode, SECAM mode disabled or SECAM mode, PAL mode disabled). If PALsignal is identified, the alternate PAL/SECAM sequency is locked in PAL mode. To have a SECAM identification, the circuit must memorizes a first SECAM identification, than test the PAL mode and confirm a second SECAM identification. The SECAM identification will take from four to six fields. Output Pin 21, named PS, is high level in PAL mode and low level in SECAM mode. Forced standard : Pin 21 can be used for the purpose : - Pin 21 to HVCC : PAL mode - Pin 21 to ground : SECAM mode The color signals are sent to an RGB switch which will drive to the outputs either internal RGB signals or external RGB signals. VIDEO RGB Inputs To avoid the black level of the inserted signal differing from the black level of the normal video signal, the external RGB are clamped to the black level of the luminance signal. Therefore, an AC coupling is required for the RGB inputs. The RGB inputs are controlled by a 12dB range contrast control stage. Input Stage The luminance input is controlled by the contrast control stage which range is 20dB. The luminance and color difference signals are added in the video matrix circuit to obtain the color signals. Automatic Cut-off Control The black levels of the RGB outputs are controlled with the cut-off loops during three line periods after the frame retrace. The cut-off measurements are sequentially achieved during these three lines. The leakage current measurement is achieved during the frame retrace and memorized on an internal capacitor, thus the circuit is able to extract the cut-off current from the total current measurement. Warm-up Detector At the start-up, the cut-off loops are switch off, a white level is inserted on the luminance signal until a cathode current is detected. Then the cut-off loops are released. ABSOLUTE MAXIMUM RATINGS HV cc Vcc H OUT Parameter Value Horizontal Supply Voltage (Pin 5) Video & Chroma Supply Voltage (Pins 1-41) 12 V HV CC + 0.5 V Horizontal Output (Pin 15) Tstg Storage Temperature Toper Operating Temperature Unit 12 V -55, +150 o C 0, +70 o C 2110A-01.TBL Symbol Symbol R th (j-a) Parameter Value Junction-ambient Thermal Resistance Max. Unit o 60 C/W 2110A-02.TBL THERMAL DATA Symbol HV cc Parameter Test Conditions Scanning Supply Voltage (Pin 5) Min. Typ. Max. Unit 8.1 9 9.9 V Vcc Video & Chroma Supply Voltage (Pins 1-41) 9 9.9 V Icch Scanning Supply Current (pin 5) No load 25 35 mA Video & Chroma Supply Current (Pins 1-41) No load 45 55 mA Total Power Dissipation No load 630 890 mW Iccv&c PD 4/15 8.1 2110A-03.TBL DC AND AC ELECTRICAL CHARACTERISTICS (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified) STV2110A DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit 350 LUMINANCE INPUT (Pin 9) VBW9 Input Voltage VDC9 DC Level No input signal Input Current • During burst period • Out of burst period Ig G9 BW467 Luma Gain Bandwidth (Y to R, G, B outputs) 490 mVPP 2.6 V ±150 1 µA µA 7.4 -3dB 6 MHz 2 to 4 V CONTRAST CONTROL (Pin 16) V16 Contrast Control Voltage V16 (Max.) Allowed Control Voltage G16 Contrast Control Range I16 Input Current 5 20 V dB 10 µA BRIGHTNESS CONTROL (Pin 36) V36 V36 (Max.) I36 Brightness Control Voltage 1.8 to 4.3 V Allowed Control Voltage 5 V Input Current 10 µA SATURATION CONTROL INPUT (Pin 27) V27 Saturation Control Voltage 2 to 4 V V27 (Max.) Allowed Control Voltage G27 Saturation Control Range V27M Mute Level 0.5 V Input Current 10 µA I27 5 -50 V dB RGB OUTPUTS (Pins 4-6-7) VBW 4-6-7 I4-6-7 Output Signal Amplitude (black to white) • 0.35V B to W @ Pin 9 • Contrast @ 4V • Sat. & Brig. @ 3V Individual Output Sinking Current 2.6 V 2 mA Maximum Peak White Level 7.8 V Blanking Level 0.5 V VCO min. Minimum Level of Inserted Cut-off Lines 2.5 V VCO max. Maximum Level of Inserted Cut-off Lines 4.5 VM4-6-7 Vblank 4-6-7 Relative Variation in Black Level with Various CONT. SAT. BRIG between the 3 channels ∆Vtemp V 20 Black Level Thermal Drift o 0.5 Tracking between Luminance and Chrominance Signals over 10dB Contrast Control mV mV/ C 2 dB 2 V RGB INPUTS (Pins 37-39-40) Vclamp 37-39-40 Clamp Level I37-39-40 Control Current Ii37-39-40 Leakage Current BW 37-39-40 Bandwidth GCTR G37-39-40 0.7 Contrast max 1.8 V ±150 µA 1 -3dB µA 8 MHz RGB Contrast Control Range 14 dB RGB Gain 3.7 5/15 2110A-04.TBL VBW37-39-40 Input Amplitude (B to W) STV2110A DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit FAST BLANKING INPUT (Pin 35) VTH1-35 First Threshold (switching) 0.7 VTH2-35 Second Threshold (blanking) 2.1 V Tswitch Switching Delay 50 ns Tblank Blanking Delay 100 ns V CATHODE CURRENT INPUT (Pin 42) VREF42 Leakage Current Reference Voltage 1.75 V ∆VREF42 CO Reference refered to Leakage Current Reference 250 mV I42 Vsb42 Output Current µA 150 Start-beam Current Detection Reference Voltage 2.4 V ± 100 µA AUTOMATIC CUT-OFF (Pin 3-8-38) Cut-off Capacitor Clamping Current PAL CHROMINANCE INPUT (Pin 18) V18 Vburst-18 GACC R18 VDC-18 Input Level 0.3 Minimum Burst Signal Amplitude within the ACC Control Range 30 mVPP Change of burst over whole ACC Control Range < 1dB 30 dB 8 kΩ No input signal 3.5 V ACC Control Range Input Impedance DC Level 1.0 VPP SECAM CHROMINANCE INPUT (Pin 17) V17 Vburst-17 R17 VDC-17 Input Level 0.3 Minimum Burst Signal Amplitude within the ACC Control Range 30 mVPP Input Impedance 20 kΩ No input signal 3.5 V 250 DC Level 1.0 VPP ACC CAPACITOR (Pin 30) I30 Charging Current During burst gate period Ii30 Leakage Current Out of burst gate period µA 1 µA PLL LOOP FILTER (Pin 34) I34 Control Current 400 µA ±700 Hz 2 Vpp CHROMAXTAL (Pin 33) CR33 Catching Range SUBCARRIER OUTPUT (Pin 22) Vburst-22 Output Burst Amplitude (PAL mode) Within ACC Control Range VOFF-32 Color off Threshold 5.0 V VON-32 Color on Threshold 5.4 V VINH-32 PAL Flip-flop Inhibition Level 3.2 V Control Current 250 µA Voltage with Nominal Input Signal 6.0 V I32 Vnom-32 6/15 2110A-05.TBL PAL KILLER CAPACITOR (Pin 32) STV2110A DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit SECAM KILLER CAPACITOR (Pin 23) VOFF-23 Color off Threshold 5.6 V VON-23 Color on Threshold 6 V VINH-23 SECAM Flip-flop Inhibition Level 3.2 V Control Current 250 µA Voltage with Nominal input Signal 7.3 V I23 Vnom-23 DELAYED CHANNEL INPUT (Pin 20) VDC-20 R20 DC Level No input Signal 2.2 V Input Impedance PAL standard SECAM standard 8 20 kΩ kΩ No input signal 2.3 V 20 kΩ 4.25MHz AND 4.40MHz FILTER (Pins 28-31) VDC-28-31 R28-31 DC Level Input Impedance RED AND BLUE DEEMPHASIS CAPACITORS (Pins 26-29) VDC-26-29 R26-29 DC Level No input signal Input Impedance 6.4 V 6 kΩ 4.32MHz FILTER (Pin 25) VDC-25 R25 DC Level No input signal Input Impedance 3.5 V 40 kΩ FORCING/STANDARD IDENTIFICATION (Pin 21) Max.Current on PS Output PAL SECAM +5 -5 mA mA DC Output Voltage PAL SECAM 7.5 1.5 V V DC input Voltage PAL SECAM HV CC 0.0 V V COMPOSITE VIDEO BASE BAND SIGNAL (Pin 12) VREF-12 Clamp Voltage I12 = - 1µA 1.6 1.85 2.1 V V12 Video Input Signal (sync to white) 1 VPP I12 Sync Threshold 12 µA 15.625 kHz ±700 Hz SCANNING XTAL (Pin 11) F 11 CR11 Frequency after Divider Frequency Control Range after Divider PLL LOOP FILTER (Pin 10) Iiow-10 Output Current Long time constant 0.15 mA Ihigh-10 Output Current Short time constant 0.40 mA VTH-13 Threshold V13 Allowed Voltage Range I13 Input Current 0.6 - 0.4 V13 < 0.6V V HVCC V 5 µA 7/15 2110A-06.TBL DELAYED LINE FLYBACK INPUT (Pin 13) STV2110A DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit HV CC V 5 µA 29 µs DIRECT BLANKING INPUT (Pin 2) VTH-2 Threshold 0.6 V2 Allowed Voltage Range I2 Input Current - 0.4 V V2 < 0.6V HORIZONTAL OUTPUT (Pin 15) T 15 Output Pulse Width 26 Vlow-15 Output Voltage (open collector) V5 start V5 stop ∆t15 I15 = 10mA 28 1.5 V HVCC Start Threshold 6.8 V HVCC Stop Threshold 6.2 V ϕ2 Phase Range 12 µs Output Pulse Width Frame Synchro. Window (search) Vlow-14 Output Voltage (open collector) Figure 1 : Contrast Control Curve Figure 2 : RGB Output Signal 50% 50% V16 (V) 0% 2V 3 4 5 2110A-03.EPS 100% Figure 3 : Difference between Black Level and measuring Level at RGB Outputs as a function of the Brightness Control Input ∆V 1V V36 (V) -1V 8/15 3 4 5 2110A-05.RPS 0V 2 line line 1 V Saturation Control Curve RGB Output Signal 100% 2 10.5 248 to 352 V 27 (V) 0% 2 3 4 5 2110A-04.EPS T 14 Tsync1 2110A-07.TBL VERTICAL OUTPUT (Pin 14) STV2110A Figure 4 : Pins 3-8-38-42 (COG, COB, COR, ICAT) 3-8-38 2110A-06.EPS 42 Figure 5 : Pins 37-39-40 (RIN, GIN, BIN) Figure 6 : Pins 4-6-7 (ROUT, GOUT, BOUT) 4-6-7 2110A-07.EPS 2110A-08.EPS 37-39-40 Figure 7 : Pin 9 (YIN) Figure 8 : Pin 10 (SLPF) 10 2110A-10.EPS 2110A-09.EPS 9 9/15 STV2110A Figure 9 : Pin 11 (SXTL) Figure 10 : Pin 12 (CVBS) V REF 12 2110A-11.EPS 2110A-12.EPS 11 Figure 11 : Pins 2-13 (BLK, LFB) Figure 12 : Pins 14 (VOUT) 14 Figure 13 : Pin 15 (HOUT) 2110A-14.EPS 2110A-13.EPS 2-13 Figure 14 : Pins 16-27 (CTR, SAT) 15 10/15 Mute (Pin 27) 2110A-16.EPS 2110A-15.EPS 16-27 STV2110A Figure 15 : Pin 20 (DLI) 20 V REF1 IPAL 2110A-17.EPS V REF2 ISEC Figure 16 : Pin 21 (PS) Figure 17 : Pin 25 (F432) V REF 25 2110A-18.EPS 2110A-19.EPS 21 11/15 STV2110A Figure 18 : Pins 17-18 (SECIN, PALIN) Figure 19 : Pins 28-31 (F440, F425) V REF2 28 31 17 18 2110A-20.EPS Figure 20 : Pins 26-29 (CDB, CDR) 2110A-21.EPS V REF V REF Figure 21 : Pins 23-32 (CKS, CKP) V REF 2110A-22.EPS 23-32 Figure 22 : Pin 22 (DLO) 2110A-23.EPS 26 29 Figure 23 : Pin 36 (BRIG) 12/15 2110A-25.EPS 22 2110A-24.EPS 36 STV2110A Figure 24 : Pin 30 (ACC) ISEC 2110A-26.EPS IPAL 30 Figure 25 : Pin 33 (CXTL) Figure 26 : Pin 34 (CLPF) Base Current Compensation Phase Comparator 33 2110A-28.EPS 2110A-27.EPS 34 Figure 27 : Pin 35 (FBL) 2110A-29.EPS 35 13/15 4.7nF 2110A-30.EPS CVBS CVBS 100nF 18kΩ CVBS 330pF 2k Ω 120pF 1kΩ VCC 1kΩ 330kΩ 270kΩ 10nF 10µH 10µH 100µF 100µF 17 18 23 32 30 34 33 9 GND 22 8.2µH 24 Vcc 1 41 10nF 390Ω DLO PS 21 SECIN 750Ω 10nF CKS CKP ACC CLPF CXTL YIN 22nF 22nF PALIN 6.8nF 33nF 4.43MHz 10nF 47nF 1kΩ DL & TRAP 9V Vcc 9V DL 10µH 10nF RIN 75Ω GIN 75Ω BIN 75Ω 100nF 100nF 100nF ICAT 47kΩ CTR 1kΩ 100pF 1kΩ 28 26 29 F440 CDB CDR 180pF 180pF 10nF 100pF 10µH STV2110A 1kΩ 10nF 31 F425 10µH 150pF 10nF 10kΩ 2 BLK 10µH 25 13 LFB F432 1.2kΩ CVBS SLPF SXTL HOUT 1.2kΩ 1kΩ 4.7nF 56pF 3.9kΩ 2Vpp CVBS 1kΩ 390Ω 503kHz 100nF MUTE 15kΩ 22kΩ 39kΩ 3.3nF +V RAMP GENERATOR (TDA1771) BOUT GOUT ROUT 47nF H VCC VOUT SAT 100nF H VCC 470Ω 470Ω 470Ω SAT 5.6kΩ 12 10 11 15 14 7 6 4 27 15kΩ 22kΩ 39kΩ Vcc 100nF BRIG BRIG 36 15kΩ 22kΩ 39kΩ Vcc 100nF 1kΩ 22nF 22nF 22nF CTR COR COG COB ICAT RIN GIN BIN 37 40 42 38 3 8 16 39 20 DLI FBL 35 100Ω 19 2 x 1N4148 HVc c GND 5 FBL 75 Ω HVcc 680Ω 14/15 560kΩ Vcc 1µ F 22kΩ 18kΩ H VCC LINE YOKE VERTICAL DEFLECTION STV2110A APPLICATION DIAGRAM STV2110A PACKAGE MECHANICAL DATA 42 PINS - PLASTIC SHRINK DIP e4 A I b1 L a1 F b2 e b E Stand-off e3 A a1 b b1 b2 b3 D E e e3 e4 F i L 22 1 21 Min. 3.30 Millimeters Typ. 0.51 0.35 0.20 0.75 0.75 15.57 Max. Min. 0.130 0.020 0.014 0.008 0.030 0.030 0.59 0.36 1.42 39.12 17.35 1.778 35.56 15.24 Inches Typ. 0.613 Max. 0.023 0.014 0.056 1.540 0.683 0.070 1.400 0.600 14.48 5.08 2.54 0.570 0.200 SDIP42.TBL Dimensions 42 PMSDIP42.EPS D 0.100 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 15/15