TI TL712CPSR

SLCS002D − JUNE 1983 − REVISED AUGUST 2003
D Operates From a Single 5-V Supply
D 0-V to 5.5-V Common-Mode Input Voltage
D
D
D
D
D
D, P, PS, OR PW PACKAGE
(TOP VIEW)
Range
Self-Biased Inputs
Complementary 3-State Outputs
Enable Capability
Hysteresis . . . 5 mV Typ
Response Times . . . 25 ns Typ
NC
IN−
IN+
OE
1
8
2
7
3
6
4
5
VCC
OUT−
OUT+
GND
NC −No internal connection
description/ordering information
The TL712 is a high-speed comparator fabricated with bipolar Schottky process technology. The circuit has
differential analog inputs and complementary 3-state TTL-compatible logic outputs with symmetrical switching
characteristics. When the output enable (OE) is low, both outputs are in the high-impedance state. This device
operates from a single 5-V supply and is useful as a disk memory read-chain data comparator.
ORDERING INFORMATION
PACKAGE†
TA
PDIP (P)
SOIC (D)
0°C to 70°C
SOP (PS)
TSSOP (PW)
ORDERABLE
PART NUMBER
Tube of 50
TL712CP
Tube of 75
TL712CD
Reel of 2500
TL712CDR
Reel of 2000
TL712CPSR
Tube of 150
TL712CPW
Reel of 2000
TL712CPWR
TOP-SIDE
MARKING
TL712CP
TL712C
T712
T712
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
symbol (positive logic)
OE
IN−
IN+
4
2
7
3
6
OUT−
OUT+
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
! "#
" $ % "" &'# " ( " !' !"
( !! #
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1
SLCS002D − JUNE 1983 − REVISED AUGUST 2003
schematics of inputs and outputs
EQUIVALENT OF EACH
DIFFERENTIAL INPUT
VCC
EQUIVALENT OF EACH ENABLE INPUT
VCC
8.3 kΩ
Nom
4 kΩ
Nom
TYPICAL OF ALL OUTPUTS
VCC
85 Ω
Nom
960 Ω
Nom
OE
Input
960 Ω
Nom
Output
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
Input voltage, VI, any differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
Output enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Low-level output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θJA (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated in the “recommended operating conditions” section of
this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the network ground.
2. Differential voltage values are at IN+ with respect to IN −.
3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
4. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SLCS002D − JUNE 1983 − REVISED AUGUST 2003
recommended operating conditions
VCC
VIC
IOH
Supply voltage
IOL
TA
Low-level output current
Common-mode input voltage
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
0
High-level output current
Operating free-air temperature
0
5.5
V
−1
mA
16
mA
70
°C
electrical characteristics at VCC = 5 V, TA = 25°C
PARAMETER
VT
Vhys
Threshold voltage (VT + and VT −)
VOH
VOL
High-level output voltage
IOZ
II
Off-state output current
IIH
IIL
High-level enable current
ri
Differential input resistance
ro
Output resistance
IOS
ICC
Short-circuit output current
TEST CONDITIONS
VICR = 0 to 5 V
MIN
−100†
Hysteresis (VT + − VT −)
TYP
MAX
UNIT
100
mV
5
VID = 100 mV,
VID = − 100 mV,
Low-level output voltage
Enable current
Low-level enable current
IOH = − 1 mA
IOL = 16 mA
2.7
mV
3.5
0.4
V
0.5
V
VO = 2.4 V
VI = 5.5 V
−20
µA
100
µA
VIH = 2.7 V
VIL = 0.4 V
20
µA
−360
µA
4
−15
kΩ
100
Ω
−85
mA
Supply current
VID = 0,
No load
17
20
mA
† The algebraic convention, where the more-negative limit is designated as minimum, is used in this data sheet for input threshold voltage levels
only.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
tPLH
tPHL
TEST CONDITIONS
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
TTL load,
See Note 5 and Figure 1
TYP
UNIT
25
ns
25
ns
NOTE 5: The response time specified is for a 100-mV input step with 5-mV overdrive (105 mV total) and is the interval between the input step
function and the instant when the output crosses 2.5 V.
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3
SLCS002D − JUNE 1983 − REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
5V
2 kΩ
Output
NOTE A: All diodes are 1N4148 or equivalent.
Figure 1. TTL Output Load Circuit
TYPICAL CHARACTERISTICS
OUTPUT RESPONSE FOR VARIOUS
INPUT OVERDRIVE VOLTAGES
3
100 mV + Overdrive
VO − Output Voltage − V
4
VCC = 5 V
TTL Load
TA = 25°C
Differential
Input Voltage
VCC = 5 V
TTL Load
TA = 25°C
Differential
Input Voltage
VO − Output Voltage − V
5
OUTPUT RESPONSE FOR VARIOUS
INPUT OVERDRIVE VOLTAGES
100 mV
50 mV
20 mV
5 mV
2
1
0
100 mV + Overdrive
5
4
3
100 mV
50 mV
20 mV
2
1
0
0
5
10
15
20
25
30
35
0
40
5
10
15
20 25
t − Time − ns
t − Time − ns
Figure 2
4
5 mV
Figure 3
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30
35
40
SLCS002D − JUNE 1983 − REVISED AUGUST 2003
VO − Output Voltage − V
VIC − Common-Mode
Input Voltage
TYPICAL CHARACTERISTICS
COMMON-MODE
PULSE RESPONSE
4
VCC = 5 V
TA = 25°C
3
2
1
0
50 Ω
VO
1.7
50 Ω
VIC
1.65
1.6
1.55
1.5
0
20
40
60
80 100 120 140 160
t − Time − ns
Figure 4
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5
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL712CD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL712CPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL712CPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CPSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CPWE4
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CPWR
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL712CPWRE4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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