UTC-IC U3525

UNISONIC TECHNOLOGIES CO., LTD
U3525
LINEAR INTEGRATED CIRCUIT
REGULATING PWM IC
DESCRIPTION
The UTC U3525 is a pulse width modulator IC and designed for
switching power supplies application to improve performance and
reduce external parts usage.
A shutdown terminal controls both the soft-start circuitry and the
output stages, providing instantaneous turn off through the PWM
latch with pulsed shutdown, as well as soft-start recycle with longer
shutdown commands. The output stage features NOR logic, giving
a LOW output for an OFF state. An under-voltage lockout circuitry,
which keeps the outputs off and the soft-start capacitor discharged
for sub-normal input voltages, includes approximately 500 mV of
hysteresis for jitter free operation. The PWM circuits also feature a
latch following the comparator. When a PWM pulses has been
terminated, the outputs will remain off for the duration of the period.
The latch is reset with each clock pulse. The output stages are
totem-pole designs capable of sourcing or sinking in excess of
200mA.
SOP-16
DIP- 16
*Pb-free plating product number: U3525L
FEATURES
* Input Voltage: 8~35V
* On-chip +5.1V reference is trimmed to ±1%
* 100HZ ~ 500KHZ oscillator range
* Separate oscillator sync terminal
* Adjustable dead time control
* Internal soft-start
* Pulse-by-pulse shutdown
* Input under-voltage lockout with hysteresis
* Latching PWM to prevent multiple pulses
* Dual source/sink output drivers
ORDERING INFORMATION
Normal
U3525-D16-T
U3525-S16-R
U3525-S16-T
Order Number
Lead Free Plating
U3525L-D16-T
U3525L-S16-R
U3525L-S16-T
Package
Packing
DIP-16
SOP-16
SOP-16
Tube
Tape Reel
Tube
U3525L-D16-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
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Copyright © 2005 Unisonic Technologies Co., Ltd
(1) R: Tape Reel, T: Tube
(2) D16: DIP-16, S16: SOP-16
(3) L: Lead Free Plating, Blank: Pb/Sn
1of 9
QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
PIN CONNECTIONS (top view)
INV.INPUT
1
16
VREF
N.I.INPUT
2
15
+VI
SYNC
3
14
OUTPUT B
OSC.OUTPUT
4
13
VC
CT
5
12
GROUND
RT
6
11
OUTPUT A
DISCHARGE
7
10
SHUT DOWN
SOFT-START
8
9
COMP
THERMAL DATA
PARAMETER
SYMBOL
RATING
UNIT
DIP16
θJA
80
°C/W
Thermal Resistance Junction-ambient
SOP-16
θJA
50
°C/W
Note:Thermal resistance junction-alumina with the device soldered on the middle of an alumina supporting
substrate measuring 15×20 mm; 0.65 mm thickness with infinite heat sink.
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2 of 9
QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
3
OSCI LLATOR
13
6
7
A
11
B
14
5
9
PWM
8
1
-
2
+
EA
50μA
12
10
5kΩ
5kΩ
15
VREF
16
4
FLIP/
FLOP
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QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
ABSOLUATE MAXIUM RATINGS
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
ViN
40
V
Collector Supply Voltage
VC
40
V
Oscillator Charging Current
IOSC
5
mA
Output Current, Source or Sink
Io
500
mA
Reference Output Current
IR
50
mA
mA
Current through CT Terminal
5
V
Logic Inputs
IT
- 0.3 ~ + 5.5
V
Analog Inputs
-0.3 ~ Vi
Total Power Dissipation at Ta=70 °C
PD
1000
mW
Junction Temperature
TJ
-55 ~ +125
℃
Operating Ambient Temperature
TORP
0 ~ +70
℃
Storage Temperature
TSTG
-65 ~ +150
℃
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING CONDITIONS (Note)
PARAMETER
SYMBOL
RATINGS
Input Voltage
VIN
8 ~ 35
Collector Supply Voltage
VC
4.5 ~ 35
Sink/Source Load Current (steady state)
ISTEAD
0 ~ 100
Sink/Source Load Current (peak)
IPEAK
0 ~ 400
Reference Load Current
ILOAD
0 ~ 20
Oscillator Frequency Range
FO
100 ~ 400K
Oscillator Timing Resistor
RO
2 ~ 150
Oscillator Timing Capacitor
CO
0.001 ~ 0.1
Dead Time Resistor Range
RT
0 ~ 500
Note: Range over which the device is functional and parameter limits are guaranteed.
UNIT
V
V
mA
mA
mA
Hz
KΩ
µF
Ω
ELECTRICAL CHARACTERISTICS(VIN= 25V, unless otherwise specified)
PARAMETER
REFERENCE SECTION
Output Voltage
Total Output Variation (Note 1)
Long Term Stability (Note 1)
Line Regulation
Load Regulation
Temp. Stability (Note 1)
Output Noise Voltage (Note 1)
Short Circuit Current
OSCILLATOR SECTION
Clock Amplitude (Note 1, 2)
Sync Threshold
Sync Input Current
Current Mirror
Maximum Frequency
Minimum Frequency
Clock Width (Note 1, 2)
Initial Accuracy (Note 1, 2)
Voltage Stability (Note 1, 2)
Temperature Stability (Note 1)
SYMBOL
TEST CONDITIONS
TJ= 25℃
Line, Load and Temperature
△VREF TJ= 125℃, 1000 hrs
△VREF VIN= 8 ~ 35 V
△VREF IL = 0 ~ 20 mA
△VREF/△T Over Operating Range
10 Hz ≤ f ≤ 10 kHz, TJ = 25℃
VREF = 0, TJ = 25℃
VREF
TYP
MAX
5
4.95
5.1
20
10
20
20
40
80
5.2
V
5.25
V
50
mV
20
mV
50
mV
50
mV
200 µVrms
100
mA
3.5
2
1
2
2.8
2.5
2.2
0.5
±2
±1
±3
120
1
±6
±2
±6
3
1.2
fMAX
fMIN
△f/△T
Sync Voltage = 3.5 V
IRT = 2 mA
RT = 2 KΩ, CT = 470 pF
RT = 200KΩ, CT = 0.1µF
TJ = 25℃
TJ = 25℃
VIN = 8 ~ 35 V
Over Operating Range
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MIN
1.7
400
0.3
UNIT
V
V
mA
mA
KHz
Hz
µs
%
%
%
4 of 9
QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
ERROR AMPLIFIER SECTION (VCM = 5.1 V)
Output Low Level
Output High Level
Input Offset Voltage
VOS
Input Bias Current
Ib
Input Offset Current
Ios
Comm. Mode Reject.
CMR
Supply Voltage Rejection
PSR
DC Open Loop Gain
DC Transconduct. (Note 1, 3)
Gain Bandwidth Product (Note 1)
PWM COMPARATOR
Input Threshold (Note 2)
Input Bias Current (Note 1)
Minimum Duty-cycle
Maximum Duty-cycle (Note 2)
SHUTDOWN SECTION
Soft Start Low Level
Shutdown Threshold
Shutdown Input Current
Soft Start Current
Shutdown Delay (Note 1)
OUTPUT DRIVERS (each output) (VC = 20 V)
Output Low Level
Output High Level
TEST CONDITIONS
MIN
3.8
TYP
0.2
5.6
2
1
VCM = 1.5 ~ 5.2 V
VIN = 8 ~ 35 V
RL ≥10 MΩ
30 KΩ ≤RL≤1 MΩ, TJ = 25℃
Gv = 0 dB, TJ = 25℃
60
50
60
1.1
1
75
60
75
1.5
2
Zero Duty-cycle
Maximum Duty-cycle
0.7
0.9
3.3
0.05
45
VSD = 2.5 V
To outputs, VSS = 5.1 V, TJ = 25℃
VSD = 2.5 V
VSD = 0 V, VSS = 0 V
VSD = 2.5 V, TJ = 25℃
ISINK = 20 mA
ISINK = 100 mA
ISOURCE = 20 mA
ISOURCE = 100 mA
VCOMP and VSS = High
VC = 35 V
CL = 1 nF, TJ = 25 °C
CL = 1 nF, TJ = 25 °C
0.6
25
18
17
6
MAX UNIT
0.5
10
10
1
V
V
mV
µA
µA
dB
dB
dB
ms
MHz
3.6
1
0
V
V
µA
%
%
0.4
0.8
0.4
50
0.2
0.7
1
1
80
0.5
V
V
mA
µA
µs
0.2
1
19
18
7
0.4
2
V
V
V
V
V
µA
ns
ns
49
Under-Voltage Lockout
8
Collector Leakage
IC
200
Rise Time (Note 1)
tR
100 600
Fall Time (Note 1)
tF
50
300
TOTAL STANDBY CURRENT
Supply Current
IS
VIN = 35 V
14
20
mA
Note:1.The parameters are not 100% tested in production.
2.Tested at fosc=40 KHz (RT=3.6 KΩ, CT=10nF, RD=0 Ω). Approximate oscillator frequency is defined by :
1
f=
C T(0.7R T + 3R D)
3.DC transconductance (gM) relates to DC open-loop voltage gain (GV) according to the following equation:
GV=gM RL where RL is the resistance from pin 9 to ground. The minimum gM specification is used to calculate
minimum GV when the error amplifier output is loaded.
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5 of 9
QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
TEST CIRCUIT
VREF
+V1
16
15
0.1μF
0.1μF
VC
13
4
CLOCK
0.1μF
OUTA
3kΩ
11
3
SYNC
1KΩ
RT
PWM
ADJ.
3.6kΩ
10kΩ
1W
1KΩ
6
DEAD
TIME
7
9nF
RAMP
100Ω
UTC
U3525
1W
14
OUT B
5
1.5kΩ
CT
GND
12
COMP
1nF
10kΩ
0.1μF
9
2
3
V/I METER
VOS = 1
(+) = 2
(-) = 3
1
2
3
1
2
0.01μF
3
21
3
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1
2
SOFT
START
8
5μF
VREF
10
2kΩ
SHUT
DOWN
6 of 9
QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION AND CIRCUIT
SHUTDOWN OPTIONS (see Block Diagram)
Since both the compensation and soft-start terminals (Pins 9 and 8) have current source pull-ups, either can
readily accept a pull-down signal which only has to sink a maximum of 100µA to turn off the outputs. This is
subject to the added requirement of discharging whatever external capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance the
available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions:
the PWM latch is immediately set providing the fastest turn-off signal to the outputs; and a 150µA current sink
begins to discharge the external soft-start capacitor. If the shutdown command is short, the PWM signal is
terminated without significant discharge of the soft-start capacitor, thus, allowing, for example, a convenient
implementation of pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, will
ultimately discharge this external capacitor, recycling slow turn-on upon release.
Pin 10 should not be left floating as noise pickup could conceivably interrupt normal operation.
OSCILLATOR SCHEMATIC
VREF 15
Q1
RT 6
Q2
Q3
CT 5
7.4KΩ
Q5
Q4
Q6
Q7
Q8
TO PWM
COMPARATOR
Q9
2kΩ
SYNC.
DISCHARGE
14KΩ
7
3
Q17
400μA
2kΩ
25KΩ
Q10 Q11
Q14
1KΩ
GND
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Q12
BLANKING
TO OUTPUT
5pF
Q13
Q15
23KΩ
1KΩ Q16
3KΩ
250Ω
4 CLOCK
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QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION AND CIRCUIT(Cont.)
OUTPUT CIRCUIT (1/2 CIRCUIT SHOWN)
13 +VC
+VI
Q5
Q7
Q10
Q6
Q4
Q11
11
5KΩ
+VREF
OUTPUT
14
Q8
Q12
Q9
Q3
5KΩ
CLOCK
Q3
Q3
10KΩ
10KΩ
F/F
2KΩ
PWM
ERROR AMPLIFIER
+VI
15
Q3
Q4
9
Q5
INV
INPUT
1
N. I.
INPUT
2
Q1
COMP.
100Ω
Q2
TO PWM
COMPARATOR
200μA
100μA
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5.8V
8 of 9
QW-R103-032,A
U3525
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
Oscillator Charge Time vs. RT and CT
Oscillator DisCharge Time vs. R D and CT
CT=1
nF
CT=2
nF
CT =
5nF
CT =
1 0n
F
CT =
20 n
F
CT =
1 0n
F
CT =
0.1
μF
400
20
10
5
2
RT
300
RD (Ω)
CT
=
CT = 1nF
2
C
n
C T =5n F
C T =10n F
T=
20 F
C
n
T=
50 F
CT
nF
=0
.1 μ
F
RT (KΩ)
50
RD=0
6
5
200
100
RD7
CT
0
1
2
5 10 20 50 100 2005001ms2ms
0.5
1
2
5
10 20
50
T (μs)
T (μs)
Output Saturation Characteristics
Error Amplifier Voltage Gain and Phase vs. Frequency
80 R L=∞
VIN=20V
Tamb=25℃
2
SOURCE SAT,VC-VOH
1
V IN=20V
40 30kΩ
Values below 30kΩ
20 will begin to limit the
maximum duty cycle
0
PHASE
SINK SAT, VOL
0
0.01
0.1
IOUT (A)
Open Loop Phase
G V (dB)
VCE (V)
3
1MΩ
60 300kΩ
100kΩ
100
1k
10k
100k 1M
-180°
-270°
-360°
f (Hz)
UTC assumes no responsibility for equipm ent failures that result from using products at values that
exceed, even mom entarily, rated values (such as m aximum ratings, operating condition ranges, or
other param eters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or system s where
m alfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The inform ation
presented in this docum ent does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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QW-R103-032,A